41397701 |
1 | #ifndef __SH2_H__\r |
2 | #define __SH2_H__\r |
3 | \r |
4 | // pico memhandlers\r |
5 | // XXX: move somewhere else\r |
6 | unsigned int p32x_sh2_read8(unsigned int a, int id);\r |
7 | unsigned int p32x_sh2_read16(unsigned int a, int id);\r |
8 | unsigned int p32x_sh2_read32(unsigned int a, int id);\r |
9 | void p32x_sh2_write8(unsigned int a, unsigned int d, int id);\r |
10 | void p32x_sh2_write16(unsigned int a, unsigned int d, int id);\r |
11 | void p32x_sh2_write32(unsigned int a, unsigned int d, int id);\r |
12 | \r |
13 | \r |
14 | typedef struct\r |
15 | {\r |
16 | unsigned int r[16];\r |
17 | unsigned int ppc;\r |
18 | unsigned int pc;\r |
19 | unsigned int pr;\r |
20 | unsigned int sr;\r |
21 | unsigned int gbr, vbr;\r |
22 | unsigned int mach, macl;\r |
23 | \r |
24 | unsigned int ea;\r |
25 | unsigned int delay;\r |
26 | unsigned int test_irq;\r |
27 | \r |
28 | int pending_irl;\r |
29 | int pending_int_irq; // internal irq\r |
30 | int pending_int_vector;\r |
31 | void (*irq_callback)(int id, int level);\r |
32 | int is_slave;\r |
33 | \r |
34 | int icount; // cycles left in current timeslice\r |
35 | unsigned int cycles_aim; // subtract sh2_icount to get global counter\r |
36 | unsigned int cycles_done;\r |
37 | } SH2;\r |
38 | \r |
39 | extern SH2 *sh2; // active sh2\r |
40 | \r |
41 | void sh2_init(SH2 *sh2, int is_slave);\r |
42 | void sh2_reset(SH2 *sh2);\r |
43 | void sh2_irl_irq(SH2 *sh2, int level);\r |
44 | void sh2_internal_irq(SH2 *sh2, int level, int vector);\r |
45 | \r |
46 | void sh2_execute(SH2 *sh2, int cycles);\r |
47 | \r |
48 | #endif /* __SH2_H__ */\r |