[picodrive.git] / pico / 32x / memory.c

#include "../pico_int.h"
#include "../memory.h"

static const char str_mars[] = "MARS";

struct Pico32xMem *Pico32xMem;

static void bank_switch(int b);

#define MSB8(x) ((x) >> 8)

// SH2 faking
#define FAKE_SH2
int p32x_csum_faked;
#ifdef FAKE_SH2
static const u16 comm_fakevals[] = {
  0x4d5f, 0x4f4b, // M_OK
  0x535f, 0x4f4b, // S_OK
  0x4D41, 0x5346, // MASF - Brutal Unleashed
  0x5331, 0x4d31, // Darxide
  0x5332, 0x4d32,
  0x5333, 0x4d33,
  0x0000, 0x0000, // eq for doom
  0x0002, // Mortal Kombat
//  0, // pad
};

static u32 sh2_comm_faker(u32 a)
{
  static int f = 0;
  if (a == 0x28 && !p32x_csum_faked) {
    p32x_csum_faked = 1;
    return *(unsigned short *)(Pico.rom + 0x18e);
  }
  if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
    f = 0;
  return comm_fakevals[f++];
}
#endif

static u32 p32x_reg_read16(u32 a)
{
  a &= 0x3e;

#ifdef FAKE_SH2
  if ((a & 0x30) == 0x20)
    return sh2_comm_faker(a);
#endif

  return Pico32x.regs[a / 2];
}

static void p32x_reg_write8(u32 a, u32 d)
{
  u16 *r = Pico32x.regs;
  a &= 0x3f;

  if (a == 1 && !(r[0] & 1)) {
    r[0] |= 1;
    Pico32xStartup();
    return;
  }

  if (!(r[0] & 1))
    return;

  switch (a) {
    case 0:
      r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
      break;
    case 5:
      d &= 7;
      if (r[4/2] != d) {
        r[4/2] = d;
        bank_switch(d);
      }
      break;
  }
}

static void p32x_reg_write16(u32 a, u32 d)
{
  u16 *r = Pico32x.regs;
  a &= 0x3e;

  switch (a) {
    case 0:
      r[0] = (r[0] & 0x83) | (d & P32XS_FM);
      return;
  }

  if ((a & 0x30) == 0x20) {
    r[a / 2] = d;
    return;
  }

  p32x_reg_write8(a + 1, d);
}

// VDP regs
static u32 p32x_vdp_read16(u32 a)
{
  a &= 0x0e;

  return Pico32x.vdp_regs[a / 2];
}

static void p32x_vdp_write8(u32 a, u32 d)
{
  u16 *r = Pico32x.vdp_regs;
  a &= 0x0f;

  // TODO: verify what's writeable
  switch (a) {
    case 0x01:
      if (((r[0] & 3) == 0) != ((d & 3) == 0)) { // forced blanking changed
        if (Pico.video.status & 8)
          r[0x0a/2] |=  P32XV_VBLK;
        else
          r[0x0a/2] &= ~P32XV_VBLK;
      }
      // priority inversion is handled in palette
      if ((r[0] ^ d) & P32XV_PRI)
        Pico32x.dirty_pal = 1;
      r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
      break;
    case 0x0b:
      d &= 1;
      Pico32x.pending_fb = d;
      // if we are blanking and FS bit is changing
      if ((r[0x0a/2] & P32XV_VBLK) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
        r[0x0a/2] ^= 1;
	Pico32xSwapDRAM(d ^ 1);
      }
      break;
  }
}

static void p32x_vdp_write16(u32 a, u32 d)
{
  p32x_vdp_write8(a | 1, d);
}

// SH2 regs
static u32 p32x_sh2reg_read16(u32 a)
{
  a &= 0xff; // ?
  if (a == 0) {
    return (Pico32x.regs[0] & P32XS_FM) | P32XS2_ADEN;
  }

  return 0;
}

static void p32x_sh2reg_write8(u32 a, u32 d)
{
}

static void p32x_sh2reg_write16(u32 a, u32 d)
{
  a &= 0xff;

  if ((a & 0x30) == 0x20) {
    Pico32x.regs[a/2] = d;
    return;
  }

  p32x_sh2reg_write8(a | 1, d);
}

// default 32x handlers
u32 PicoRead8_32x(u32 a)
{
  u32 d = 0;
  if ((a & 0xffc0) == 0x5100) { // a15100
    d = p32x_reg_read16(a);
    goto out_16to8;
  }

  if (!(Pico32x.regs[0] & 1))
    goto no_vdp;

  if ((a & 0xfff0) == 0x5180) { // a15180
    d = p32x_vdp_read16(a);
    goto out_16to8;
  }

  if ((a & 0xfe00) == 0x5200) { // a15200
    d = Pico32xMem->pal[(a & 0x1ff) / 2];
    goto out_16to8;
  }

no_vdp:
  if ((a & 0xfffc) == 0x30ec) { // a130ec
    d = str_mars[a & 3];
    goto out;
  }

  elprintf(EL_UIO, "m68k unmapped r8  [%06x] @%06x", a, SekPc);
  return d;

out_16to8:
  if (a & 1)
    d &= 0xff;
  else
    d >>= 8;

out:
  elprintf(EL_32X, "m68k 32x r8  [%06x]   %02x @%06x", a, d, SekPc);
  return d;
}

u32 PicoRead16_32x(u32 a)
{
  u32 d = 0;
  if ((a & 0xffc0) == 0x5100) { // a15100
    d = p32x_reg_read16(a);
    goto out;
  }

  if (!(Pico32x.regs[0] & 1))
    goto no_vdp;

  if ((a & 0xfff0) == 0x5180) { // a15180
    d = p32x_vdp_read16(a);
    goto out;
  }

  if ((a & 0xfe00) == 0x5200) { // a15200
    d = Pico32xMem->pal[(a & 0x1ff) / 2];
    goto out;
  }

no_vdp:
  if ((a & 0xfffc) == 0x30ec) { // a130ec
    d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
    goto out;
  }

  elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  return d;

out:
  elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
  return d;
}

void PicoWrite8_32x(u32 a, u32 d)
{
  if ((a & 0xfc00) == 0x5000)
    elprintf(EL_32X, "m68k 32x w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);

  if ((a & 0xffc0) == 0x5100) { // a15100
    p32x_reg_write8(a, d);
    return;
  }

  if (!(Pico32x.regs[0] & 1))
    goto no_vdp;

  if ((a & 0xfff0) == 0x5180) { // a15180
    p32x_vdp_write8(a, d);
    return;
  }

  // TODO: verify
  if ((a & 0xfe00) == 0x5200) { // a15200
    elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
    ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
    Pico32x.dirty_pal = 1;
    return;
  }

no_vdp:
  elprintf(EL_UIO, "m68k unmapped w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
}

void PicoWrite16_32x(u32 a, u32 d)
{
  if ((a & 0xfc00) == 0x5000)
    elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);

  if ((a & 0xffc0) == 0x5100) { // a15100
    p32x_reg_write16(a, d);
    return;
  }

  if (!(Pico32x.regs[0] & 1))
    goto no_vdp;

  if ((a & 0xfff0) == 0x5180) { // a15180
    p32x_vdp_write16(a, d);
    return;
  }

  if ((a & 0xfe00) == 0x5200) { // a15200
    Pico32xMem->pal[(a & 0x1ff) / 2] = d;
    Pico32x.dirty_pal = 1;
    return;
  }

no_vdp:
  elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
}

// hint vector is writeable
static void PicoWrite8_hint(u32 a, u32 d)
{
  if ((a & 0xfffc) == 0x0070) {
    Pico32xMem->m68k_rom[a ^ 1] = d;
    return;
  }

  elprintf(EL_UIO, "m68k unmapped w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
}

static void PicoWrite16_hint(u32 a, u32 d)
{
  if ((a & 0xfffc) == 0x0070) {
    ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
    return;
  }

  elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
}

void Pico32xSwapDRAM(int b)
{
  cpu68k_map_set(m68k_read8_map,   0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
  cpu68k_map_set(m68k_read16_map,  0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
  cpu68k_map_set(m68k_write8_map,  0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
  cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
}

static void bank_switch(int b)
{
  unsigned int rs, bank;

  bank = b << 20;
  if (bank >= Pico.romsize) {
    elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
    return;
  }

  // 32X ROM (unbanked, XXX: consider mirroring?)
  rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
  rs -= bank;
  if (rs > 0x100000)
    rs = 0x100000;
  cpu68k_map_set(m68k_read8_map,   0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
  cpu68k_map_set(m68k_read16_map,  0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);

  elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
}

// -----------------------------------------------------------------
//                              SH2  
// -----------------------------------------------------------------

u32 pico32x_read8(u32 a)
{
  u32 d = 0;
  if (a < sizeof(Pico32xMem->sh2_rom_m))
    return Pico32xMem->sh2_rom_m[a ^ 1];

  if ((a & 0x0ffc0000) == 0x06000000)
    return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];

  if ((a & 0x0fc00000) == 0x02000000)
    if ((a & 0x003fffff) < Pico.romsize)
      return Pico.rom[(a & 0x3fffff) ^ 1];

  if ((a & 0x0fffff00) == 0x4000) {
    d = p32x_sh2reg_read16(a);
    goto out_16to8;
  }

  if ((a & 0x0fffff00) == 0x4100) {
    d = p32x_vdp_read16(a);
    goto out_16to8;
  }

  if ((a & 0x0fffff00) == 0x4200) {
    d = Pico32xMem->pal[(a & 0x1ff) / 2];
    goto out_16to8;
  }

  elprintf(EL_UIO, "sh2 unmapped r8  [%08x]       %02x @%06x", a, d, ash2_pc());
  return d;

out_16to8:
  if (a & 1)
    d &= 0xff;
  else
    d >>= 8;

  elprintf(EL_32X, "sh2 r8  [%08x]       %02x @%06x", a, d, ash2_pc());
  return d;
}

u32 pico32x_read16(u32 a)
{
  u32 d = 0;
  if (a < sizeof(Pico32xMem->sh2_rom_m))
    return *(u16 *)(Pico32xMem->sh2_rom_m + a);

  if ((a & 0x0ffc0000) == 0x06000000)
    return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];

  if ((a & 0x0fc00000) == 0x02000000)
    if ((a & 0x003fffff) < Pico.romsize)
      return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];

  if ((a & 0x0fffff00) == 0x4000) {
    d = p32x_sh2reg_read16(a);
    goto out;
  }

  if ((a & 0x0fffff00) == 0x4100) {
    d = p32x_vdp_read16(a);
    goto out;
  }

  if ((a & 0x0fffff00) == 0x4200) {
    d = Pico32xMem->pal[(a & 0x1ff) / 2];
    goto out;
  }

  elprintf(EL_UIO, "sh2 unmapped r16 [%08x]     %04x @%06x", a, d, ash2_pc());
  return d;

out:
  elprintf(EL_32X, "sh2 r16 [%08x]     %04x @%06x", a, d, ash2_pc());
  return d;
}

u32 pico32x_read32(u32 a)
{
//  elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
  return (pico32x_read16(a) << 16) | pico32x_read16(a + 2);
}

void pico32x_write8(u32 a, u32 d)
{
  if ((a & 0x0ffffc00) == 0x4000)
    elprintf(EL_32X, "sh2 w8  [%08x]       %02x @%06x", a, d & 0xff, ash2_pc());

  if ((a & 0x0ffc0000) == 0x06000000) {
    Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
    return;
  }

  if ((a & 0x0fffff00) == 0x4100) {
    p32x_vdp_write8(a, d);
    return;
  }

  if ((a & 0x0fffff00) == 0x4000) {
    p32x_sh2reg_write8(a, d);
    return;
  }

  elprintf(EL_UIO, "sh2 unmapped w8  [%08x]       %02x @%06x", a, d & 0xff, ash2_pc());
}

void pico32x_write16(u32 a, u32 d)
{
  if ((a & 0x0ffffc00) == 0x4000)
    elprintf(EL_32X, "sh2 w16 [%08x]     %04x @%06x", a, d & 0xffff, ash2_pc());

  if ((a & 0x0ffc0000) == 0x06000000) {
    ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
    return;
  }

  if ((a & 0x0fffff00) == 0x4100) {
    p32x_vdp_write16(a, d);
    return;
  }

  if ((a & 0x0ffffe00) == 0x4200) {
    Pico32xMem->pal[(a & 0x1ff) / 2] = d;
    Pico32x.dirty_pal = 1;
    return;
  }

  if ((a & 0x0fffff00) == 0x4000) {
    p32x_sh2reg_write16(a, d);
    return;
  }

  elprintf(EL_UIO, "sh2 unmapped w16 [%08x]     %04x @%06x", a, d & 0xffff, ash2_pc());
}

void pico32x_write32(u32 a, u32 d)
{
//  elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
  pico32x_write16(a, d >> 16);
  pico32x_write16(a + 2, d);
}

#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
void PicoMemSetup32x(void)
{
  unsigned short *ps;
  unsigned int *pl;
  unsigned int rs;
  int i;

  Pico32xMem = calloc(1, sizeof(*Pico32xMem));
  if (Pico32xMem == NULL) {
    elprintf(EL_STATUS, "OOM");
    return;
  }

  // generate 68k ROM
  ps = (unsigned short *)Pico32xMem->m68k_rom;
  pl = (unsigned int *)Pico32xMem->m68k_rom;
  for (i = 1; i < 0xc0/4; i++)
    pl[i] = HWSWAP(0x880200 + (i - 1) * 6);

  // fill with nops
  for (i = 0xc0/2; i < 0x100/2; i++)
    ps[i] = 0x4e71;

#if 0
  ps[0xc0/2] = 0x46fc;
  ps[0xc2/2] = 0x2700; // move #0x2700,sr
  ps[0xfe/2] = 0x60fe; // jump to self
#else
  ps[0xfe/2] = 0x4e75; // rts
#endif

  // fill remaining mem with ROM
  memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);

  // 32X ROM
  // TODO: move
  {
    FILE *f = fopen("32X_M_BIOS.BIN", "rb");
    int i;
    if (f == NULL) {
      printf("missing BIOS\n");
      exit(1);
    }
    fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
    fclose(f);
    for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
      int t = Pico32xMem->sh2_rom_m[i];
      Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
      Pico32xMem->sh2_rom_m[i + 1] = t;
    }
  }

  // cartridge area becomes unmapped
  // XXX: we take the easy way and don't unmap ROM,
  // so that we can avoid handling the RV bit.
  // m68k_map_unmap(0x000000, 0x3fffff);

  // MD ROM area
  rs = sizeof(Pico32xMem->m68k_rom);
  cpu68k_map_set(m68k_read8_map,   0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
  cpu68k_map_set(m68k_read16_map,  0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
  cpu68k_map_set(m68k_write8_map,  0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
  cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);

  // DRAM area
  Pico32xSwapDRAM(1);

  // 32X ROM (unbanked, XXX: consider mirroring?)
  rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
  if (rs > 0x80000)
    rs = 0x80000;
  cpu68k_map_set(m68k_read8_map,   0x880000, 0x880000 + rs - 1, Pico.rom, 0);
  cpu68k_map_set(m68k_read16_map,  0x880000, 0x880000 + rs - 1, Pico.rom, 0);

  // 32X ROM (banked)
  bank_switch(0);
}
Commit	Line	Data
be2c4208	1	#include "../pico_int.h"
	2	#include "../memory.h"
	3
	4	static const char str_mars[] = "MARS";
	5
974fdb5b	6	struct Pico32xMem *Pico32xMem;
974fdb5b	7
5e49c3a8	8	static void bank_switch(int b);
5e49c3a8	9
acd35d4c	10	#define MSB8(x) ((x) >> 8)
acd35d4c	11
974fdb5b	12	// SH2 faking
acd35d4c	13	#define FAKE_SH2
	14	int p32x_csum_faked;
	15	#ifdef FAKE_SH2
974fdb5b	16	static const u16 comm_fakevals[] = {
	17	0x4d5f, 0x4f4b, // M_OK
	18	0x535f, 0x4f4b, // S_OK
5e49c3a8	19	0x4D41, 0x5346, // MASF - Brutal Unleashed
	20	0x5331, 0x4d31, // Darxide
	21	0x5332, 0x4d32,
	22	0x5333, 0x4d33,
	23	0x0000, 0x0000, // eq for doom
974fdb5b	24	0x0002, // Mortal Kombat
acd35d4c	25	// 0, // pad
be2c4208	26	};
acd35d4c	27
	28	static u32 sh2_comm_faker(u32 a)
	29	{
	30	static int f = 0;
	31	if (a == 0x28 && !p32x_csum_faked) {
	32	p32x_csum_faked = 1;
	33	return (unsigned short )(Pico.rom + 0x18e);
	34	}
	35	if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
	36	f = 0;
	37	return comm_fakevals[f++];
	38	}
	39	#endif
be2c4208	40
be2c4208	41	static u32 p32x_reg_read16(u32 a)
	42	{
	43	a &= 0x3e;
	44
acd35d4c	45	#ifdef FAKE_SH2
974fdb5b	46	if ((a & 0x30) == 0x20)
acd35d4c	47	return sh2_comm_faker(a);
acd35d4c	48	#endif
974fdb5b	49
be2c4208	50	return Pico32x.regs[a / 2];
	51	}
	52
be2c4208	53	static void p32x_reg_write8(u32 a, u32 d)
be2c4208	54	{
acd35d4c	55	u16 *r = Pico32x.regs;
be2c4208	56	a &= 0x3f;
be2c4208	57
acd35d4c	58	if (a == 1 && !(r[0] & 1)) {
acd35d4c	59	r[0] \|= 1;
be2c4208	60	Pico32xStartup();
	61	return;
	62	}
5e49c3a8	63
acd35d4c	64	if (!(r[0] & 1))
5e49c3a8	65	return;
5e49c3a8	66
acd35d4c	67	switch (a) {
	68	case 0:
	69	r[0] = (r[0] & 0x83) \| ((d << 8) & P32XS_FM);
	70	break;
	71	case 5:
	72	d &= 7;
	73	if (r[4/2] != d) {
	74	r[4/2] = d;
	75	bank_switch(d);
	76	}
	77	break;
5e49c3a8	78	}
	79	}
	80
	81	static void p32x_reg_write16(u32 a, u32 d)
	82	{
acd35d4c	83	u16 *r = Pico32x.regs;
	84	a &= 0x3e;
	85
	86	switch (a) {
	87	case 0:
	88	r[0] = (r[0] & 0x83) \| (d & P32XS_FM);
	89	return;
	90	}
	91
	92	if ((a & 0x30) == 0x20) {
	93	r[a / 2] = d;
	94	return;
	95	}
	96
5e49c3a8	97	p32x_reg_write8(a + 1, d);
be2c4208	98	}
	99
	100	// VDP regs
	101	static u32 p32x_vdp_read16(u32 a)
	102	{
	103	a &= 0x0e;
	104
	105	return Pico32x.vdp_regs[a / 2];
	106	}
	107
be2c4208	108	static void p32x_vdp_write8(u32 a, u32 d)
be2c4208	109	{
974fdb5b	110	u16 *r = Pico32x.vdp_regs;
be2c4208	111	a &= 0x0f;
be2c4208	112
974fdb5b	113	// TODO: verify what's writeable
be2c4208	114	switch (a) {
974fdb5b	115	case 0x01:
	116	if (((r[0] & 3) == 0) != ((d & 3) == 0)) { // forced blanking changed
	117	if (Pico.video.status & 8)
	118	r[0x0a/2] \|= P32XV_VBLK;
	119	else
	120	r[0x0a/2] &= ~P32XV_VBLK;
	121	}
5e49c3a8	122	// priority inversion is handled in palette
	123	if ((r[0] ^ d) & P32XV_PRI)
	124	Pico32x.dirty_pal = 1;
974fdb5b	125	r[0] = (r[0] & P32XV_nPAL) \| (d & 0xff);
974fdb5b	126	break;
be2c4208	127	case 0x0b:
974fdb5b	128	d &= 1;
	129	Pico32x.pending_fb = d;
	130	// if we are blanking and FS bit is changing
	131	if ((r[0x0a/2] & P32XV_VBLK) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
	132	r[0x0a/2] ^= 1;
	133	Pico32xSwapDRAM(d ^ 1);
be2c4208	134	}
	135	break;
	136	}
	137	}
	138
974fdb5b	139	static void p32x_vdp_write16(u32 a, u32 d)
	140	{
	141	p32x_vdp_write8(a \| 1, d);
	142	}
	143
acd35d4c	144	// SH2 regs
	145	static u32 p32x_sh2reg_read16(u32 a)
	146	{
	147	a &= 0xff; // ?
	148	if (a == 0) {
	149	return (Pico32x.regs[0] & P32XS_FM) \| P32XS2_ADEN;
	150	}
	151
	152	return 0;
	153	}
	154
	155	static void p32x_sh2reg_write8(u32 a, u32 d)
	156	{
	157	}
	158
	159	static void p32x_sh2reg_write16(u32 a, u32 d)
	160	{
	161	a &= 0xff;
	162
	163	if ((a & 0x30) == 0x20) {
	164	Pico32x.regs[a/2] = d;
	165	return;
	166	}
	167
	168	p32x_sh2reg_write8(a \| 1, d);
	169	}
	170
be2c4208	171	// default 32x handlers
	172	u32 PicoRead8_32x(u32 a)
	173	{
	174	u32 d = 0;
	175	if ((a & 0xffc0) == 0x5100) { // a15100
	176	d = p32x_reg_read16(a);
	177	goto out_16to8;
	178	}
	179
974fdb5b	180	if (!(Pico32x.regs[0] & 1))
	181	goto no_vdp;
	182
	183	if ((a & 0xfff0) == 0x5180) { // a15180
be2c4208	184	d = p32x_vdp_read16(a);
	185	goto out_16to8;
	186	}
	187
974fdb5b	188	if ((a & 0xfe00) == 0x5200) { // a15200
	189	d = Pico32xMem->pal[(a & 0x1ff) / 2];
	190	goto out_16to8;
	191	}
	192
	193	no_vdp:
be2c4208	194	if ((a & 0xfffc) == 0x30ec) { // a130ec
	195	d = str_mars[a & 3];
	196	goto out;
	197	}
	198
	199	elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
	200	return d;
	201
	202	out_16to8:
	203	if (a & 1)
	204	d &= 0xff;
	205	else
	206	d >>= 8;
	207
	208	out:
	209	elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
	210	return d;
	211	}
	212
	213	u32 PicoRead16_32x(u32 a)
	214	{
	215	u32 d = 0;
	216	if ((a & 0xffc0) == 0x5100) { // a15100
	217	d = p32x_reg_read16(a);
	218	goto out;
	219	}
	220
974fdb5b	221	if (!(Pico32x.regs[0] & 1))
	222	goto no_vdp;
	223
	224	if ((a & 0xfff0) == 0x5180) { // a15180
be2c4208	225	d = p32x_vdp_read16(a);
	226	goto out;
	227	}
	228
974fdb5b	229	if ((a & 0xfe00) == 0x5200) { // a15200
	230	d = Pico32xMem->pal[(a & 0x1ff) / 2];
	231	goto out;
	232	}
	233
	234	no_vdp:
be2c4208	235	if ((a & 0xfffc) == 0x30ec) { // a130ec
	236	d = !(a & 2) ? ('M'<<8)\|'A' : ('R'<<8)\|'S';
	237	goto out;
	238	}
	239
	240	elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
	241	return d;
	242
	243	out:
	244	elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
	245	return d;
	246	}
	247
	248	void PicoWrite8_32x(u32 a, u32 d)
	249	{
	250	if ((a & 0xfc00) == 0x5000)
	251	elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
	252
	253	if ((a & 0xffc0) == 0x5100) { // a15100
	254	p32x_reg_write8(a, d);
	255	return;
	256	}
	257
974fdb5b	258	if (!(Pico32x.regs[0] & 1))
	259	goto no_vdp;
	260
	261	if ((a & 0xfff0) == 0x5180) { // a15180
be2c4208	262	p32x_vdp_write8(a, d);
	263	return;
	264	}
	265
974fdb5b	266	// TODO: verify
	267	if ((a & 0xfe00) == 0x5200) { // a15200
	268	elprintf(EL_32X\|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
	269	((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
	270	Pico32x.dirty_pal = 1;
	271	return;
	272	}
	273
	274	no_vdp:
be2c4208	275	elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
	276	}
	277
	278	void PicoWrite16_32x(u32 a, u32 d)
	279	{
	280	if ((a & 0xfc00) == 0x5000)
	281	elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
	282
	283	if ((a & 0xffc0) == 0x5100) { // a15100
	284	p32x_reg_write16(a, d);
	285	return;
	286	}
	287
974fdb5b	288	if (!(Pico32x.regs[0] & 1))
	289	goto no_vdp;
	290
	291	if ((a & 0xfff0) == 0x5180) { // a15180
be2c4208	292	p32x_vdp_write16(a, d);
	293	return;
	294	}
	295
974fdb5b	296	if ((a & 0xfe00) == 0x5200) { // a15200
	297	Pico32xMem->pal[(a & 0x1ff) / 2] = d;
	298	Pico32x.dirty_pal = 1;
	299	return;
	300	}
	301
	302	no_vdp:
be2c4208	303	elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
	304	}
	305
	306	// hint vector is writeable
	307	static void PicoWrite8_hint(u32 a, u32 d)
	308	{
	309	if ((a & 0xfffc) == 0x0070) {
	310	Pico32xMem->m68k_rom[a ^ 1] = d;
	311	return;
	312	}
	313
	314	elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
	315	}
	316
	317	static void PicoWrite16_hint(u32 a, u32 d)
	318	{
	319	if ((a & 0xfffc) == 0x0070) {
	320	((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
	321	return;
	322	}
	323
	324	elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
	325	}
	326
974fdb5b	327	void Pico32xSwapDRAM(int b)
	328	{
	329	cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
	330	cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
	331	cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
	332	cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
	333	}
	334
5e49c3a8	335	static void bank_switch(int b)
	336	{
	337	unsigned int rs, bank;
	338
	339	bank = b << 20;
	340	if (bank >= Pico.romsize) {
	341	elprintf(EL_32X\|EL_ANOMALY, "missing bank @ %06x", bank);
	342	return;
	343	}
	344
	345	// 32X ROM (unbanked, XXX: consider mirroring?)
	346	rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
	347	rs -= bank;
	348	if (rs > 0x100000)
	349	rs = 0x100000;
	350	cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
	351	cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
	352
	353	elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
	354	}
	355
acd35d4c	356	// -----------------------------------------------------------------
	357	// SH2
	358	// -----------------------------------------------------------------
	359
	360	u32 pico32x_read8(u32 a)
	361	{
	362	u32 d = 0;
	363	if (a < sizeof(Pico32xMem->sh2_rom_m))
	364	return Pico32xMem->sh2_rom_m[a ^ 1];
	365
	366	if ((a & 0x0ffc0000) == 0x06000000)
	367	return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
	368
	369	if ((a & 0x0fc00000) == 0x02000000)
	370	if ((a & 0x003fffff) < Pico.romsize)
	371	return Pico.rom[(a & 0x3fffff) ^ 1];
	372
	373	if ((a & 0x0fffff00) == 0x4000) {
	374	d = p32x_sh2reg_read16(a);
	375	goto out_16to8;
	376	}
	377
	378	if ((a & 0x0fffff00) == 0x4100) {
	379	d = p32x_vdp_read16(a);
	380	goto out_16to8;
	381	}
	382
	383	if ((a & 0x0fffff00) == 0x4200) {
	384	d = Pico32xMem->pal[(a & 0x1ff) / 2];
	385	goto out_16to8;
	386	}
	387
	388	elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc());
	389	return d;
	390
	391	out_16to8:
	392	if (a & 1)
	393	d &= 0xff;
	394	else
	395	d >>= 8;
	396
	397	elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc());
	398	return d;
	399	}
	400
	401	u32 pico32x_read16(u32 a)
	402	{
	403	u32 d = 0;
	404	if (a < sizeof(Pico32xMem->sh2_rom_m))
	405	return (u16 )(Pico32xMem->sh2_rom_m + a);
	406
	407	if ((a & 0x0ffc0000) == 0x06000000)
	408	return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
	409
	410	if ((a & 0x0fc00000) == 0x02000000)
	411	if ((a & 0x003fffff) < Pico.romsize)
	412	return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
	413
	414	if ((a & 0x0fffff00) == 0x4000) {
	415	d = p32x_sh2reg_read16(a);
	416	goto out;
	417	}
	418
	419	if ((a & 0x0fffff00) == 0x4100) {
420	d = p32x_vdp_read16(a);
421	goto out;
422	}
423
424	if ((a & 0x0fffff00) == 0x4200) {
425	d = Pico32xMem->pal[(a & 0x1ff) / 2];
426	goto out;
427	}
428
429	elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc());
430	return d;
431
432	out:
433	elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc());
434	return d;
435	}
436
437	u32 pico32x_read32(u32 a)
438	{
439	// elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
440	return (pico32x_read16(a) << 16) \| pico32x_read16(a + 2);
441	}
442
443	void pico32x_write8(u32 a, u32 d)
444	{
445	if ((a & 0x0ffffc00) == 0x4000)
446	elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
447
448	if ((a & 0x0ffc0000) == 0x06000000) {
449	Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
450	return;
451	}
452
453	if ((a & 0x0fffff00) == 0x4100) {
454	p32x_vdp_write8(a, d);
455	return;
456	}
457
458	if ((a & 0x0fffff00) == 0x4000) {
459	p32x_sh2reg_write8(a, d);
460	return;
461	}
462
463	elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
464	}
465
466	void pico32x_write16(u32 a, u32 d)
467	{
468	if ((a & 0x0ffffc00) == 0x4000)
469	elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
470
471	if ((a & 0x0ffc0000) == 0x06000000) {
472	((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
473	return;
474	}
475
476	if ((a & 0x0fffff00) == 0x4100) {
477	p32x_vdp_write16(a, d);
478	return;
479	}
480
481	if ((a & 0x0ffffe00) == 0x4200) {
482	Pico32xMem->pal[(a & 0x1ff) / 2] = d;
483	Pico32x.dirty_pal = 1;
484	return;
485	}
486
487	if ((a & 0x0fffff00) == 0x4000) {
488	p32x_sh2reg_write16(a, d);
489	return;
490	}
491
492	elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
493	}
494
495	void pico32x_write32(u32 a, u32 d)
496	{
497	// elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
498	pico32x_write16(a, d >> 16);
499	pico32x_write16(a + 2, d);
500	}
501
be2c4208	502	#define HWSWAP(x) (((x) << 16) \| ((x) >> 16))
	503	void PicoMemSetup32x(void)
	504	{
	505	unsigned short *ps;
	506	unsigned int *pl;
5e49c3a8	507	unsigned int rs;
be2c4208	508	int i;
	509
	510	Pico32xMem = calloc(1, sizeof(*Pico32xMem));
	511	if (Pico32xMem == NULL) {
	512	elprintf(EL_STATUS, "OOM");
	513	return;
	514	}
	515
	516	// generate 68k ROM
	517	ps = (unsigned short *)Pico32xMem->m68k_rom;
	518	pl = (unsigned int *)Pico32xMem->m68k_rom;
	519	for (i = 1; i < 0xc0/4; i++)
974fdb5b	520	pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
be2c4208	521
	522	// fill with nops
	523	for (i = 0xc0/2; i < 0x100/2; i++)
	524	ps[i] = 0x4e71;
	525
5e49c3a8	526	#if 0
be2c4208	527	ps[0xc0/2] = 0x46fc;
	528	ps[0xc2/2] = 0x2700; // move #0x2700,sr
	529	ps[0xfe/2] = 0x60fe; // jump to self
5e49c3a8	530	#else
	531	ps[0xfe/2] = 0x4e75; // rts
	532	#endif
be2c4208	533
be2c4208	534	// fill remaining mem with ROM
974fdb5b	535	memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
be2c4208	536
acd35d4c	537	// 32X ROM
	538	// TODO: move
	539	{
	540	FILE *f = fopen("32X_M_BIOS.BIN", "rb");
	541	int i;
	542	if (f == NULL) {
	543	printf("missing BIOS\n");
	544	exit(1);
	545	}
	546	fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
	547	fclose(f);
	548	for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
	549	int t = Pico32xMem->sh2_rom_m[i];
	550	Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
	551	Pico32xMem->sh2_rom_m[i + 1] = t;
	552	}
	553	}
	554
be2c4208	555	// cartridge area becomes unmapped
	556	// XXX: we take the easy way and don't unmap ROM,
	557	// so that we can avoid handling the RV bit.
	558	// m68k_map_unmap(0x000000, 0x3fffff);
	559
	560	// MD ROM area
974fdb5b	561	rs = sizeof(Pico32xMem->m68k_rom);
	562	cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
	563	cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
	564	cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
	565	cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
	566
	567	// DRAM area
	568	Pico32xSwapDRAM(1);
be2c4208	569
be2c4208	570	// 32X ROM (unbanked, XXX: consider mirroring?)
5e49c3a8	571	rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
	572	if (rs > 0x80000)
	573	rs = 0x80000;
	574	cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
	575	cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
be2c4208	576
be2c4208	577	// 32X ROM (banked)
5e49c3a8	578	bank_switch(0);
be2c4208	579	}
be2c4208	580