cff531af |
1 | /* |
2 | * PicoDrive |
a7f82a77 |
3 | * (C) notaz, 2009,2010,2013 |
cff531af |
4 | * |
5 | * This work is licensed under the terms of MAME license. |
6 | * See COPYING file in the top-level directory. |
7 | */ |
db1d3564 |
8 | #include "../pico_int.h" |
9 | |
db1d3564 |
10 | static int pwm_cycles; |
11 | static int pwm_mult; |
12 | static int pwm_ptr; |
df63f1a6 |
13 | static int pwm_irq_reload; |
8ad1d2ad |
14 | static int pwm_doing_fifo; |
db1d3564 |
15 | |
045a4c52 |
16 | void p32x_pwm_ctl_changed(void) |
db1d3564 |
17 | { |
df63f1a6 |
18 | int control = Pico32x.regs[0x30 / 2]; |
db1d3564 |
19 | int cycles = Pico32x.regs[0x32 / 2]; |
db1d3564 |
20 | |
21 | cycles = (cycles - 1) & 0x0fff; |
db1d3564 |
22 | pwm_cycles = cycles; |
23 | pwm_mult = 0x10000 / cycles; |
1d7a28a7 |
24 | |
df63f1a6 |
25 | pwm_irq_reload = (control & 0x0f00) >> 8; |
26 | pwm_irq_reload = ((pwm_irq_reload - 1) & 0x0f) + 1; |
27 | |
28 | if (Pico32x.pwm_irq_cnt == 0) |
29 | Pico32x.pwm_irq_cnt = pwm_irq_reload; |
db1d3564 |
30 | } |
31 | |
c1931173 |
32 | static void do_pwm_irq(SH2 *sh2, unsigned int m68k_cycles) |
df63f1a6 |
33 | { |
34 | Pico32x.sh2irqs |= P32XI_PWM; |
c1931173 |
35 | p32x_update_irls(sh2, m68k_cycles); |
df63f1a6 |
36 | |
37 | if (Pico32x.regs[0x30 / 2] & P32XP_RTP) { |
38 | p32x_event_schedule(m68k_cycles, P32X_EVENT_PWM, pwm_cycles / 3 + 1); |
39 | // note: might recurse |
40 | p32x_dreq1_trigger(); |
41 | } |
42 | } |
43 | |
c1931173 |
44 | #define consume_fifo(sh2, m68k_cycles) { \ |
df63f1a6 |
45 | int cycles_diff = ((m68k_cycles) * 3) - Pico32x.pwm_cycle_p; \ |
a7f82a77 |
46 | if (cycles_diff >= pwm_cycles) \ |
c1931173 |
47 | consume_fifo_do(sh2, m68k_cycles, cycles_diff); \ |
a7f82a77 |
48 | } |
49 | |
c1931173 |
50 | static void consume_fifo_do(SH2 *sh2, unsigned int m68k_cycles, |
51 | int sh2_cycles_diff) |
db1d3564 |
52 | { |
8ad1d2ad |
53 | if (pwm_cycles == 0 || pwm_doing_fifo) |
a7f82a77 |
54 | return; |
55 | |
56 | elprintf(EL_PWM, "pwm: %u: consume %d/%d, %d,%d ptr %d", |
df63f1a6 |
57 | m68k_cycles, sh2_cycles_diff, sh2_cycles_diff / pwm_cycles, |
a7f82a77 |
58 | Pico32x.pwm_p[0], Pico32x.pwm_p[1], pwm_ptr); |
59 | |
8ad1d2ad |
60 | // this is for recursion from dreq1 writes |
61 | pwm_doing_fifo = 1; |
07e5dbab |
62 | |
df63f1a6 |
63 | while (sh2_cycles_diff >= pwm_cycles) { |
a7f82a77 |
64 | struct Pico32xMem *mem = Pico32xMem; |
65 | short *fifo_l = mem->pwm_fifo[0]; |
66 | short *fifo_r = mem->pwm_fifo[1]; |
1d7a28a7 |
67 | |
a7f82a77 |
68 | if (Pico32x.pwm_p[0] > 0) { |
69 | fifo_l[0] = fifo_l[1]; |
70 | fifo_l[1] = fifo_l[2]; |
71 | fifo_l[2] = fifo_l[3]; |
72 | Pico32x.pwm_p[0]--; |
bc3aea8e |
73 | } |
a7f82a77 |
74 | if (Pico32x.pwm_p[1] > 0) { |
75 | fifo_r[0] = fifo_r[1]; |
76 | fifo_r[1] = fifo_r[2]; |
77 | fifo_r[2] = fifo_r[3]; |
78 | Pico32x.pwm_p[1]--; |
79 | } |
80 | |
81 | mem->pwm[pwm_ptr * 2 ] = fifo_l[0]; |
82 | mem->pwm[pwm_ptr * 2 + 1] = fifo_r[0]; |
83 | pwm_ptr = (pwm_ptr + 1) & (PWM_BUFF_LEN - 1); |
df63f1a6 |
84 | |
85 | sh2_cycles_diff -= pwm_cycles; |
86 | |
87 | if (--Pico32x.pwm_irq_cnt == 0) { |
88 | Pico32x.pwm_irq_cnt = pwm_irq_reload; |
8ad1d2ad |
89 | do_pwm_irq(sh2, m68k_cycles); |
df63f1a6 |
90 | } |
a8fd6e37 |
91 | } |
df63f1a6 |
92 | Pico32x.pwm_cycle_p = m68k_cycles * 3 - sh2_cycles_diff; |
8ad1d2ad |
93 | pwm_doing_fifo = 0; |
a7f82a77 |
94 | } |
95 | |
c1931173 |
96 | static int p32x_pwm_schedule_(SH2 *sh2, unsigned int m68k_now) |
a8fd6e37 |
97 | { |
df63f1a6 |
98 | unsigned int sh2_now = m68k_now * 3; |
99 | int cycles_diff_sh2; |
100 | |
101 | if (pwm_cycles == 0) |
102 | return 0; |
103 | |
104 | cycles_diff_sh2 = sh2_now - Pico32x.pwm_cycle_p; |
105 | if (cycles_diff_sh2 >= pwm_cycles) |
c1931173 |
106 | consume_fifo_do(sh2, m68k_now, cycles_diff_sh2); |
a8fd6e37 |
107 | |
a8fd6e37 |
108 | if (Pico32x.sh2irqs & P32XI_PWM) |
19886062 |
109 | return 0; // previous not acked |
a8fd6e37 |
110 | if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 1)) |
19886062 |
111 | return 0; // masked by everyone |
a8fd6e37 |
112 | |
df63f1a6 |
113 | cycles_diff_sh2 = sh2_now - Pico32x.pwm_cycle_p; |
114 | return (Pico32x.pwm_irq_cnt * pwm_cycles |
115 | - cycles_diff_sh2) / 3 + 1; |
19886062 |
116 | } |
117 | |
df63f1a6 |
118 | void p32x_pwm_schedule(unsigned int m68k_now) |
19886062 |
119 | { |
c1931173 |
120 | int after = p32x_pwm_schedule_(NULL, m68k_now); |
19886062 |
121 | if (after != 0) |
df63f1a6 |
122 | p32x_event_schedule(m68k_now, P32X_EVENT_PWM, after); |
19886062 |
123 | } |
124 | |
125 | void p32x_pwm_schedule_sh2(SH2 *sh2) |
126 | { |
c1931173 |
127 | int after = p32x_pwm_schedule_(sh2, sh2_cycles_done_m68k(sh2)); |
19886062 |
128 | if (after != 0) |
129 | p32x_event_schedule_sh2(sh2, P32X_EVENT_PWM, after); |
a8fd6e37 |
130 | } |
131 | |
df63f1a6 |
132 | void p32x_pwm_irq_event(unsigned int m68k_now) |
133 | { |
134 | p32x_pwm_schedule(m68k_now); |
135 | } |
136 | |
c1931173 |
137 | unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2, |
138 | unsigned int m68k_cycles) |
db1d3564 |
139 | { |
140 | unsigned int d = 0; |
a7f82a77 |
141 | |
c1931173 |
142 | consume_fifo(sh2, m68k_cycles); |
db1d3564 |
143 | |
144 | a &= 0x0e; |
145 | switch (a) { |
146 | case 0: // control |
147 | case 2: // cycle |
a7f82a77 |
148 | d = Pico32x.regs[(0x30 + a) / 2]; |
149 | break; |
db1d3564 |
150 | |
151 | case 4: // L ch |
a7f82a77 |
152 | if (Pico32x.pwm_p[0] == 3) |
153 | d |= P32XP_FULL; |
154 | else if (Pico32x.pwm_p[0] == 0) |
155 | d |= P32XP_EMPTY; |
156 | break; |
157 | |
db1d3564 |
158 | case 6: // R ch |
159 | case 8: // MONO |
a7f82a77 |
160 | if (Pico32x.pwm_p[1] == 3) |
db1d3564 |
161 | d |= P32XP_FULL; |
a7f82a77 |
162 | else if (Pico32x.pwm_p[1] == 0) |
db1d3564 |
163 | d |= P32XP_EMPTY; |
164 | break; |
165 | } |
166 | |
df63f1a6 |
167 | elprintf(EL_PWM, "pwm: %u: r16 %02x %04x (p %d %d)", |
168 | m68k_cycles, a, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]); |
db1d3564 |
169 | return d; |
170 | } |
171 | |
df63f1a6 |
172 | void p32x_pwm_write16(unsigned int a, unsigned int d, |
c1931173 |
173 | SH2 *sh2, unsigned int m68k_cycles) |
db1d3564 |
174 | { |
df63f1a6 |
175 | elprintf(EL_PWM, "pwm: %u: w16 %02x %04x (p %d %d)", |
176 | m68k_cycles, a & 0x0e, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]); |
177 | |
c1931173 |
178 | consume_fifo(sh2, m68k_cycles); |
a7f82a77 |
179 | |
db1d3564 |
180 | a &= 0x0e; |
a7f82a77 |
181 | if (a == 0) { // control |
182 | // supposedly we should stop FIFO when xMd is 0, |
183 | // but mars test disagrees |
db1d3564 |
184 | Pico32x.regs[0x30 / 2] = d; |
045a4c52 |
185 | p32x_pwm_ctl_changed(); |
df63f1a6 |
186 | Pico32x.pwm_irq_cnt = pwm_irq_reload; // ? |
a7f82a77 |
187 | } |
db1d3564 |
188 | else if (a == 2) { // cycle |
189 | Pico32x.regs[0x32 / 2] = d & 0x0fff; |
045a4c52 |
190 | p32x_pwm_ctl_changed(); |
db1d3564 |
191 | } |
192 | else if (a <= 8) { |
a7f82a77 |
193 | d = (d - 1) & 0x0fff; |
db1d3564 |
194 | if (d > pwm_cycles) |
195 | d = pwm_cycles; |
196 | d = (d - pwm_cycles / 2) * pwm_mult; |
197 | |
a7f82a77 |
198 | if (a == 4 || a == 8) { // L ch or MONO |
199 | short *fifo = Pico32xMem->pwm_fifo[0]; |
200 | if (Pico32x.pwm_p[0] < 3) |
201 | Pico32x.pwm_p[0]++; |
202 | else { |
203 | fifo[1] = fifo[2]; |
204 | fifo[2] = fifo[3]; |
205 | } |
206 | fifo[Pico32x.pwm_p[0]] = d; |
207 | } |
208 | if (a == 6 || a == 8) { // R ch or MONO |
209 | short *fifo = Pico32xMem->pwm_fifo[1]; |
210 | if (Pico32x.pwm_p[1] < 3) |
211 | Pico32x.pwm_p[1]++; |
212 | else { |
213 | fifo[1] = fifo[2]; |
214 | fifo[2] = fifo[3]; |
215 | } |
216 | fifo[Pico32x.pwm_p[1]] = d; |
db1d3564 |
217 | } |
218 | } |
219 | } |
220 | |
221 | void p32x_pwm_update(int *buf32, int length, int stereo) |
222 | { |
db1d3564 |
223 | short *pwmb; |
224 | int step; |
225 | int p = 0; |
a7f82a77 |
226 | int xmd; |
db1d3564 |
227 | |
8ad1d2ad |
228 | consume_fifo(NULL, SekCyclesDoneT2()); |
229 | |
a7f82a77 |
230 | xmd = Pico32x.regs[0x30 / 2] & 0x0f; |
8ad1d2ad |
231 | if (xmd == 0 || xmd == 0x06 || xmd == 0x09 || xmd == 0x0f) |
232 | goto out; // invalid? |
db1d3564 |
233 | |
8ad1d2ad |
234 | step = (pwm_ptr << 16) / length; |
db1d3564 |
235 | pwmb = Pico32xMem->pwm; |
236 | |
237 | if (stereo) |
238 | { |
8ad1d2ad |
239 | if (xmd == 0x05) { |
240 | // normal |
241 | while (length-- > 0) { |
242 | *buf32++ += pwmb[0]; |
243 | *buf32++ += pwmb[1]; |
244 | |
245 | p += step; |
246 | pwmb += (p >> 16) * 2; |
247 | p &= 0xffff; |
248 | } |
249 | } |
250 | else if (xmd == 0x0a) { |
a7f82a77 |
251 | // channel swap |
252 | while (length-- > 0) { |
253 | *buf32++ += pwmb[1]; |
254 | *buf32++ += pwmb[0]; |
db1d3564 |
255 | |
a7f82a77 |
256 | p += step; |
257 | pwmb += (p >> 16) * 2; |
258 | p &= 0xffff; |
259 | } |
260 | } |
261 | else { |
8ad1d2ad |
262 | // mono - LMD, RMD specify dst |
263 | if (xmd & 0x06) // src is R |
264 | pwmb++; |
265 | if (xmd & 0x0c) // dst is R |
266 | buf32++; |
a7f82a77 |
267 | while (length-- > 0) { |
8ad1d2ad |
268 | *buf32 += *pwmb; |
a7f82a77 |
269 | |
270 | p += step; |
271 | pwmb += (p >> 16) * 2; |
272 | p &= 0xffff; |
8ad1d2ad |
273 | buf32 += 2; |
a7f82a77 |
274 | } |
db1d3564 |
275 | } |
276 | } |
277 | else |
278 | { |
8ad1d2ad |
279 | // mostly unused |
db1d3564 |
280 | while (length-- > 0) { |
281 | *buf32++ += pwmb[0]; |
282 | |
283 | p += step; |
284 | pwmb += (p >> 16) * 2; |
285 | p &= 0xffff; |
286 | } |
287 | } |
288 | |
1b3f5844 |
289 | elprintf(EL_PWM, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d", |
db1d3564 |
290 | pwm_ptr, length, step, (pwmb - Pico32xMem->pwm) / 2); |
291 | |
a7f82a77 |
292 | out: |
db1d3564 |
293 | pwm_ptr = 0; |
294 | } |
295 | |
df63f1a6 |
296 | void p32x_pwm_state_loaded(void) |
297 | { |
298 | int cycles_diff_sh2; |
299 | |
045a4c52 |
300 | p32x_pwm_ctl_changed(); |
df63f1a6 |
301 | |
302 | // for old savestates |
303 | cycles_diff_sh2 = SekCycleCntT * 3 - Pico32x.pwm_cycle_p; |
304 | if (cycles_diff_sh2 >= pwm_cycles || cycles_diff_sh2 < 0) { |
305 | Pico32x.pwm_irq_cnt = pwm_irq_reload; |
306 | Pico32x.pwm_cycle_p = SekCycleCntT * 3; |
307 | p32x_pwm_schedule(SekCycleCntT); |
308 | } |
309 | } |
310 | |
a8fd6e37 |
311 | // vim:shiftwidth=2:ts=2:expandtab |