32x: fix some more timing problems
[picodrive.git] / pico / 32x / pwm.c
CommitLineData
cff531af 1/*
2 * PicoDrive
a7f82a77 3 * (C) notaz, 2009,2010,2013
cff531af 4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
db1d3564 8#include "../pico_int.h"
9
db1d3564 10static int pwm_cycles;
11static int pwm_mult;
12static int pwm_ptr;
df63f1a6 13static int pwm_irq_reload;
db1d3564 14
045a4c52 15void p32x_pwm_ctl_changed(void)
db1d3564 16{
df63f1a6 17 int control = Pico32x.regs[0x30 / 2];
db1d3564 18 int cycles = Pico32x.regs[0x32 / 2];
db1d3564 19
20 cycles = (cycles - 1) & 0x0fff;
db1d3564 21 pwm_cycles = cycles;
22 pwm_mult = 0x10000 / cycles;
1d7a28a7 23
df63f1a6 24 pwm_irq_reload = (control & 0x0f00) >> 8;
25 pwm_irq_reload = ((pwm_irq_reload - 1) & 0x0f) + 1;
26
27 if (Pico32x.pwm_irq_cnt == 0)
28 Pico32x.pwm_irq_cnt = pwm_irq_reload;
db1d3564 29}
30
c1931173 31static void do_pwm_irq(SH2 *sh2, unsigned int m68k_cycles)
df63f1a6 32{
33 Pico32x.sh2irqs |= P32XI_PWM;
c1931173 34 p32x_update_irls(sh2, m68k_cycles);
df63f1a6 35
36 if (Pico32x.regs[0x30 / 2] & P32XP_RTP) {
37 p32x_event_schedule(m68k_cycles, P32X_EVENT_PWM, pwm_cycles / 3 + 1);
38 // note: might recurse
39 p32x_dreq1_trigger();
40 }
41}
42
c1931173 43#define consume_fifo(sh2, m68k_cycles) { \
df63f1a6 44 int cycles_diff = ((m68k_cycles) * 3) - Pico32x.pwm_cycle_p; \
a7f82a77 45 if (cycles_diff >= pwm_cycles) \
c1931173 46 consume_fifo_do(sh2, m68k_cycles, cycles_diff); \
a7f82a77 47}
48
c1931173 49static void consume_fifo_do(SH2 *sh2, unsigned int m68k_cycles,
50 int sh2_cycles_diff)
db1d3564 51{
df63f1a6 52 int do_irq = 0;
53
a7f82a77 54 if (pwm_cycles == 0)
55 return;
56
57 elprintf(EL_PWM, "pwm: %u: consume %d/%d, %d,%d ptr %d",
df63f1a6 58 m68k_cycles, sh2_cycles_diff, sh2_cycles_diff / pwm_cycles,
a7f82a77 59 Pico32x.pwm_p[0], Pico32x.pwm_p[1], pwm_ptr);
60
df63f1a6 61 if (sh2_cycles_diff >= pwm_cycles * 17) {
a7f82a77 62 // silence/skip
df63f1a6 63 Pico32x.pwm_cycle_p = m68k_cycles * 3;
a7f82a77 64 Pico32x.pwm_p[0] = Pico32x.pwm_p[1] = 0;
65 return;
66 }
07e5dbab 67
df63f1a6 68 while (sh2_cycles_diff >= pwm_cycles) {
a7f82a77 69 struct Pico32xMem *mem = Pico32xMem;
70 short *fifo_l = mem->pwm_fifo[0];
71 short *fifo_r = mem->pwm_fifo[1];
1d7a28a7 72
a7f82a77 73 if (Pico32x.pwm_p[0] > 0) {
74 fifo_l[0] = fifo_l[1];
75 fifo_l[1] = fifo_l[2];
76 fifo_l[2] = fifo_l[3];
77 Pico32x.pwm_p[0]--;
bc3aea8e 78 }
a7f82a77 79 if (Pico32x.pwm_p[1] > 0) {
80 fifo_r[0] = fifo_r[1];
81 fifo_r[1] = fifo_r[2];
82 fifo_r[2] = fifo_r[3];
83 Pico32x.pwm_p[1]--;
84 }
85
86 mem->pwm[pwm_ptr * 2 ] = fifo_l[0];
87 mem->pwm[pwm_ptr * 2 + 1] = fifo_r[0];
88 pwm_ptr = (pwm_ptr + 1) & (PWM_BUFF_LEN - 1);
df63f1a6 89
90 sh2_cycles_diff -= pwm_cycles;
91
92 if (--Pico32x.pwm_irq_cnt == 0) {
93 Pico32x.pwm_irq_cnt = pwm_irq_reload;
94 // irq also does dreq1, so call it after cycle update
95 do_irq = 1;
96 break;
97 }
a8fd6e37 98 }
df63f1a6 99 Pico32x.pwm_cycle_p = m68k_cycles * 3 - sh2_cycles_diff;
100
101 if (do_irq)
c1931173 102 do_pwm_irq(sh2, m68k_cycles);
a7f82a77 103}
104
c1931173 105static int p32x_pwm_schedule_(SH2 *sh2, unsigned int m68k_now)
a8fd6e37 106{
df63f1a6 107 unsigned int sh2_now = m68k_now * 3;
108 int cycles_diff_sh2;
109
110 if (pwm_cycles == 0)
111 return 0;
112
113 cycles_diff_sh2 = sh2_now - Pico32x.pwm_cycle_p;
114 if (cycles_diff_sh2 >= pwm_cycles)
c1931173 115 consume_fifo_do(sh2, m68k_now, cycles_diff_sh2);
a8fd6e37 116
a8fd6e37 117 if (Pico32x.sh2irqs & P32XI_PWM)
19886062 118 return 0; // previous not acked
a8fd6e37 119 if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 1))
19886062 120 return 0; // masked by everyone
a8fd6e37 121
df63f1a6 122 cycles_diff_sh2 = sh2_now - Pico32x.pwm_cycle_p;
123 return (Pico32x.pwm_irq_cnt * pwm_cycles
124 - cycles_diff_sh2) / 3 + 1;
19886062 125}
126
df63f1a6 127void p32x_pwm_schedule(unsigned int m68k_now)
19886062 128{
c1931173 129 int after = p32x_pwm_schedule_(NULL, m68k_now);
19886062 130 if (after != 0)
df63f1a6 131 p32x_event_schedule(m68k_now, P32X_EVENT_PWM, after);
19886062 132}
133
134void p32x_pwm_schedule_sh2(SH2 *sh2)
135{
c1931173 136 int after = p32x_pwm_schedule_(sh2, sh2_cycles_done_m68k(sh2));
19886062 137 if (after != 0)
138 p32x_event_schedule_sh2(sh2, P32X_EVENT_PWM, after);
a8fd6e37 139}
140
df63f1a6 141void p32x_pwm_irq_event(unsigned int m68k_now)
142{
143 p32x_pwm_schedule(m68k_now);
144}
145
c1931173 146unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2,
147 unsigned int m68k_cycles)
db1d3564 148{
149 unsigned int d = 0;
a7f82a77 150
c1931173 151 consume_fifo(sh2, m68k_cycles);
db1d3564 152
153 a &= 0x0e;
154 switch (a) {
155 case 0: // control
156 case 2: // cycle
a7f82a77 157 d = Pico32x.regs[(0x30 + a) / 2];
158 break;
db1d3564 159
160 case 4: // L ch
a7f82a77 161 if (Pico32x.pwm_p[0] == 3)
162 d |= P32XP_FULL;
163 else if (Pico32x.pwm_p[0] == 0)
164 d |= P32XP_EMPTY;
165 break;
166
db1d3564 167 case 6: // R ch
168 case 8: // MONO
a7f82a77 169 if (Pico32x.pwm_p[1] == 3)
db1d3564 170 d |= P32XP_FULL;
a7f82a77 171 else if (Pico32x.pwm_p[1] == 0)
db1d3564 172 d |= P32XP_EMPTY;
173 break;
174 }
175
df63f1a6 176 elprintf(EL_PWM, "pwm: %u: r16 %02x %04x (p %d %d)",
177 m68k_cycles, a, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]);
db1d3564 178 return d;
179}
180
df63f1a6 181void p32x_pwm_write16(unsigned int a, unsigned int d,
c1931173 182 SH2 *sh2, unsigned int m68k_cycles)
db1d3564 183{
df63f1a6 184 elprintf(EL_PWM, "pwm: %u: w16 %02x %04x (p %d %d)",
185 m68k_cycles, a & 0x0e, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]);
186
c1931173 187 consume_fifo(sh2, m68k_cycles);
a7f82a77 188
db1d3564 189 a &= 0x0e;
a7f82a77 190 if (a == 0) { // control
191 // supposedly we should stop FIFO when xMd is 0,
192 // but mars test disagrees
db1d3564 193 Pico32x.regs[0x30 / 2] = d;
045a4c52 194 p32x_pwm_ctl_changed();
df63f1a6 195 Pico32x.pwm_irq_cnt = pwm_irq_reload; // ?
a7f82a77 196 }
db1d3564 197 else if (a == 2) { // cycle
198 Pico32x.regs[0x32 / 2] = d & 0x0fff;
045a4c52 199 p32x_pwm_ctl_changed();
db1d3564 200 }
201 else if (a <= 8) {
a7f82a77 202 d = (d - 1) & 0x0fff;
db1d3564 203 if (d > pwm_cycles)
204 d = pwm_cycles;
205 d = (d - pwm_cycles / 2) * pwm_mult;
206
a7f82a77 207 if (a == 4 || a == 8) { // L ch or MONO
208 short *fifo = Pico32xMem->pwm_fifo[0];
209 if (Pico32x.pwm_p[0] < 3)
210 Pico32x.pwm_p[0]++;
211 else {
212 fifo[1] = fifo[2];
213 fifo[2] = fifo[3];
214 }
215 fifo[Pico32x.pwm_p[0]] = d;
216 }
217 if (a == 6 || a == 8) { // R ch or MONO
218 short *fifo = Pico32xMem->pwm_fifo[1];
219 if (Pico32x.pwm_p[1] < 3)
220 Pico32x.pwm_p[1]++;
221 else {
222 fifo[1] = fifo[2];
223 fifo[2] = fifo[3];
224 }
225 fifo[Pico32x.pwm_p[1]] = d;
db1d3564 226 }
227 }
228}
229
230void p32x_pwm_update(int *buf32, int length, int stereo)
231{
db1d3564 232 short *pwmb;
233 int step;
234 int p = 0;
a7f82a77 235 int xmd;
db1d3564 236
a7f82a77 237 xmd = Pico32x.regs[0x30 / 2] & 0x0f;
238 if ((xmd != 0x05 && xmd != 0x0a) || pwm_ptr <= 16)
239 goto out;
db1d3564 240
241 step = (pwm_ptr << 16) / length; // FIXME: division..
242 pwmb = Pico32xMem->pwm;
243
244 if (stereo)
245 {
a7f82a77 246 if (xmd == 0x0a) {
247 // channel swap
248 while (length-- > 0) {
249 *buf32++ += pwmb[1];
250 *buf32++ += pwmb[0];
db1d3564 251
a7f82a77 252 p += step;
253 pwmb += (p >> 16) * 2;
254 p &= 0xffff;
255 }
256 }
257 else {
258 while (length-- > 0) {
259 *buf32++ += pwmb[0];
260 *buf32++ += pwmb[1];
261
262 p += step;
263 pwmb += (p >> 16) * 2;
264 p &= 0xffff;
265 }
db1d3564 266 }
267 }
268 else
269 {
270 while (length-- > 0) {
271 *buf32++ += pwmb[0];
272
273 p += step;
274 pwmb += (p >> 16) * 2;
275 p &= 0xffff;
276 }
277 }
278
1b3f5844 279 elprintf(EL_PWM, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d",
db1d3564 280 pwm_ptr, length, step, (pwmb - Pico32xMem->pwm) / 2);
281
a7f82a77 282out:
db1d3564 283 pwm_ptr = 0;
284}
285
df63f1a6 286void p32x_pwm_state_loaded(void)
287{
288 int cycles_diff_sh2;
289
045a4c52 290 p32x_pwm_ctl_changed();
df63f1a6 291
292 // for old savestates
293 cycles_diff_sh2 = SekCycleCntT * 3 - Pico32x.pwm_cycle_p;
294 if (cycles_diff_sh2 >= pwm_cycles || cycles_diff_sh2 < 0) {
295 Pico32x.pwm_irq_cnt = pwm_irq_reload;
296 Pico32x.pwm_cycle_p = SekCycleCntT * 3;
297 p32x_pwm_schedule(SekCycleCntT);
298 }
299}
300
a8fd6e37 301// vim:shiftwidth=2:ts=2:expandtab