[picodrive.git] / pico / carthw / carthw.c

/*
 * Support for a few cart mappers and some protection.
 * (C) notaz, 2008-2011
 *
 * This work is licensed under the terms of MAME license.
 * See COPYING file in the top-level directory.
 */

#include "../pico_int.h"
#include "../memory.h"
#include "eeprom_spi.h"


static int have_bank(u32 base)
{
  // the loader allocs in 512K quantities
  if (base >= Pico.romsize) {
    elprintf(EL_ANOMALY|EL_STATUS, "carthw: missing bank @ %06x", base);
    return 0;
  }
  return 1;
}

/* The SSFII mapper */
static unsigned char ssf2_banks[8];

static carthw_state_chunk carthw_ssf2_state[] =
{
	{ CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
	{ 0,            0,                  NULL }
};

static void carthw_ssf2_write8(u32 a, u32 d)
{
	u32 target, base;

	if ((a & 0xfffff0) != 0xa130f0) {
		PicoWrite8_io(a, d);
		return;
	}

	a &= 0x0e;
	if (a == 0)
		return;

	ssf2_banks[a >> 1] = d;
	base = d << 19;
	target = a << 18;
	if (!have_bank(base))
		return;

	cpu68k_map_set(m68k_read8_map,  target, target + 0x80000 - 1, Pico.rom + base, 0);
	cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
}

static void carthw_ssf2_mem_setup(void)
{
	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_ssf2_write8, 1);
}

static void carthw_ssf2_statef(void)
{
	int i;
	for (i = 1; i < 8; i++)
		carthw_ssf2_write8(0xa130f0 | (i << 1), ssf2_banks[i]);
}

void carthw_ssf2_startup(void)
{
	int i;

	elprintf(EL_STATUS, "SSF2 mapper startup");

	// default map
	for (i = 0; i < 8; i++)
		ssf2_banks[i] = i;

	PicoCartMemSetup  = carthw_ssf2_mem_setup;
	PicoLoadStateHook = carthw_ssf2_statef;
	carthw_chunks     = carthw_ssf2_state;
}


/* Common *-in-1 pirate mapper.
 * Switches banks based on addr lines when /TIME is set.
 * TODO: verify
 */
static unsigned int carthw_Xin1_baddr = 0;

static void carthw_Xin1_do(u32 a, int mask, int shift)
{
	int len;

	carthw_Xin1_baddr = a;
	a &= mask;
	a <<= shift;
	len = Pico.romsize - a;
	if (len <= 0) {
		elprintf(EL_ANOMALY|EL_STATUS, "X-in-1: missing bank @ %06x", a);
		return;
	}

	len = (len + M68K_BANK_MASK) & ~M68K_BANK_MASK;
	cpu68k_map_set(m68k_read8_map,  0x000000, len - 1, Pico.rom + a, 0);
	cpu68k_map_set(m68k_read16_map, 0x000000, len - 1, Pico.rom + a, 0);
}

static carthw_state_chunk carthw_Xin1_state[] =
{
	{ CHUNK_CARTHW, sizeof(carthw_Xin1_baddr), &carthw_Xin1_baddr },
	{ 0,            0,                         NULL }
};

// TODO: test a0, reads, w16
static void carthw_Xin1_write8(u32 a, u32 d)
{
	if ((a & 0xffff00) != 0xa13000) {
		PicoWrite8_io(a, d);
		return;
	}

	carthw_Xin1_do(a, 0x3f, 16);
}

static void carthw_Xin1_mem_setup(void)
{
	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_Xin1_write8, 1);
}

static void carthw_Xin1_reset(void)
{
	carthw_Xin1_write8(0xa13000, 0);
}

static void carthw_Xin1_statef(void)
{
	carthw_Xin1_write8(carthw_Xin1_baddr, 0);
}

void carthw_Xin1_startup(void)
{
	elprintf(EL_STATUS, "X-in-1 mapper startup");

	PicoCartMemSetup  = carthw_Xin1_mem_setup;
	PicoResetHook     = carthw_Xin1_reset;
	PicoLoadStateHook = carthw_Xin1_statef;
	carthw_chunks     = carthw_Xin1_state;
}


/* Realtec, based on TascoDLX doc
 * http://www.sharemation.com/TascoDLX/REALTEC%20Cart%20Mapper%20-%20description%20v1.txt
 */
static int realtec_bank = 0x80000000, realtec_size = 0x80000000;

static void carthw_realtec_write8(u32 a, u32 d)
{
	int i, bank_old = realtec_bank, size_old = realtec_size;

	if (a == 0x400000)
	{
		realtec_bank &= 0x0e0000;
		realtec_bank |= 0x300000 & (d << 19);
		if (realtec_bank != bank_old)
			elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	}
	else if (a == 0x402000)
	{
		realtec_size = (d << 17) & 0x3e0000;
		if (realtec_size != size_old)
			elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	}
	else if (a == 0x404000)
	{
		realtec_bank &= 0x300000;
		realtec_bank |= 0x0e0000 & (d << 17);
		if (realtec_bank != bank_old)
			elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	}
	else
		elprintf(EL_ANOMALY, "realtec: unexpected write [%06x] %02x @ %06x", a, d, SekPc);

	if (realtec_bank >= 0 && realtec_size >= 0 &&
		(realtec_bank != bank_old || realtec_size != size_old))
	{
		elprintf(EL_ANOMALY, "realtec: new bank %06x, size %06x", realtec_bank, realtec_size, SekPc);
		if (realtec_size > Pico.romsize - realtec_bank)
		{
			elprintf(EL_ANOMALY, "realtec: bank too large / out of range?");
			return;
		}

		for (i = 0; i < 0x400000; i += realtec_size) {
			cpu68k_map_set(m68k_read8_map,  i, realtec_size - 1, Pico.rom + realtec_bank, 0);
			cpu68k_map_set(m68k_read16_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
		}
	}
}

static void carthw_realtec_reset(void)
{
	int i;

	/* map boot code */
	for (i = 0; i < 0x400000; i += M68K_BANK_SIZE) {
		cpu68k_map_set(m68k_read8_map,  i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
		cpu68k_map_set(m68k_read16_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
	}
	cpu68k_map_set(m68k_write8_map, 0x400000, 0x400000 + M68K_BANK_SIZE - 1, carthw_realtec_write8, 1);
	realtec_bank = realtec_size = 0x80000000;
}

void carthw_realtec_startup(void)
{
	int i;

	elprintf(EL_STATUS, "Realtec mapper startup");

	// allocate additional bank for boot code
	// (we know those ROMs have aligned size)
	i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
	if (i != 0) {
		elprintf(EL_STATUS, "OOM");
		return;
	}

	// create bank for boot code
	for (i = 0; i < M68K_BANK_SIZE; i += 0x2000)
		memcpy(Pico.rom + Pico.romsize + i, Pico.rom + Pico.romsize - 0x2000, 0x2000);

	PicoResetHook = carthw_realtec_reset;
}

/* Radica mapper, based on DevSter's info
 * http://devster.monkeeh.com/sega/radica/
 * XXX: mostly the same as X-in-1, merge?
 */
static u32 carthw_radica_read16(u32 a)
{
	if ((a & 0xffff00) != 0xa13000)
		return PicoRead16_io(a);

	carthw_Xin1_do(a, 0x7e, 15);

	return 0;
}

static void carthw_radica_mem_setup(void)
{
	cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_radica_read16, 1);
}

static void carthw_radica_statef(void)
{
	carthw_radica_read16(carthw_Xin1_baddr);
}

static void carthw_radica_reset(void)
{
	carthw_radica_read16(0xa13000);
}

void carthw_radica_startup(void)
{
	elprintf(EL_STATUS, "Radica mapper startup");

	PicoCartMemSetup  = carthw_radica_mem_setup;
	PicoResetHook     = carthw_radica_reset;
	PicoLoadStateHook = carthw_radica_statef;
	carthw_chunks     = carthw_Xin1_state;
}


/* Pier Solar. Based on my own research */
static unsigned char pier_regs[8];
static unsigned char pier_dump_prot;

static carthw_state_chunk carthw_pier_state[] =
{
  { CHUNK_CARTHW,     sizeof(pier_regs),      pier_regs },
  { CHUNK_CARTHW + 1, sizeof(pier_dump_prot), &pier_dump_prot },
  { CHUNK_CARTHW + 2, 0,                      NULL }, // filled later
  { 0,                0,                      NULL }
};

static void carthw_pier_write8(u32 a, u32 d)
{
  u32 a8, target, base;

  if ((a & 0xffff00) != 0xa13000) {
    PicoWrite8_io(a, d);
    return;
  }

  a8 = a & 0x0f;
  pier_regs[a8 / 2] = d;

      elprintf(EL_UIO, "pier w8  [%06x] %02x @%06x", a, d & 0xffff, SekPc);
  switch (a8) {
    case 0x01:
      break;
    case 0x03:
      if (!(pier_regs[0] & 2))
        goto unmapped;
      target = 0x280000;
      base = d << 19;
      goto do_map;
    case 0x05:
      if (!(pier_regs[0] & 2))
        goto unmapped;
      target = 0x300000;
      base = d << 19;
      goto do_map;
    case 0x07:
      if (!(pier_regs[0] & 2))
        goto unmapped;
      target = 0x380000;
      base = d << 19;
      goto do_map;
    case 0x09:
      SRam.changed = 1;
      eeprom_spi_write(d);
      break;
    case 0x0b:
      // eeprom read
    default:
    unmapped:
      //elprintf(EL_UIO, "pier w8  [%06x] %02x @%06x", a, d & 0xffff, SekPc);
      elprintf(EL_STATUS, "-- unmapped w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
      break;
  }
  return;

do_map:
  if (!have_bank(base))
    return;

  cpu68k_map_set(m68k_read8_map,  target, target + 0x80000 - 1, Pico.rom + base, 0);
  cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
}

static void carthw_pier_write16(u32 a, u32 d)
{
  if ((a & 0xffff00) != 0xa13000) {
    PicoWrite16_io(a, d);
    return;
  }

  elprintf(EL_UIO, "pier w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  carthw_pier_write8(a + 1, d);
}

static u32 carthw_pier_read8(u32 a)
{
  if ((a & 0xffff00) != 0xa13000)
    return PicoRead8_io(a);

  if (a == 0xa1300b)
    return eeprom_spi_read(a);

  elprintf(EL_UIO, "pier r8  [%06x] @%06x", a, SekPc);
  return 0;
}

static void carthw_pier_statef(void);

static u32 carthw_pier_prot_read8(u32 a)
{
  /* it takes more than just these reads here to disable ROM protection,
   * but for game emulation purposes this is enough. */
  if (pier_dump_prot > 0)
    pier_dump_prot--;
  if (pier_dump_prot == 0) {
    carthw_pier_statef();
    elprintf(EL_STATUS, "prot off on r8 @%06x", SekPc);
  }
  elprintf(EL_UIO, "pier r8  [%06x] @%06x", a, SekPc);

  return Pico.rom[(a & 0x7fff) ^ 1];
}

static void carthw_pier_mem_setup(void)
{
  cpu68k_map_set(m68k_write8_map,  0xa10000, 0xa1ffff, carthw_pier_write8, 1);
  cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, carthw_pier_write16, 1);
  cpu68k_map_set(m68k_read8_map,   0xa10000, 0xa1ffff, carthw_pier_read8, 1);
}

static void carthw_pier_prot_mem_setup(int prot_enable)
{
  if (prot_enable) {
    /* the dump protection.. */
    int a;
    for (a = 0x000000; a < 0x400000; a += M68K_BANK_SIZE) {
      cpu68k_map_set(m68k_read8_map,  a, a + 0xffff, Pico.rom + Pico.romsize, 0);
      cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
    }
    cpu68k_map_set(m68k_read8_map, M68K_BANK_SIZE, M68K_BANK_SIZE * 2 - 1,
      carthw_pier_prot_read8, 1);
  }
  else {
    cpu68k_map_set(m68k_read8_map,  0, 0x27ffff, Pico.rom, 0);
    cpu68k_map_set(m68k_read16_map, 0, 0x27ffff, Pico.rom, 0);
  }
}

static void carthw_pier_statef(void)
{
  carthw_pier_prot_mem_setup(pier_dump_prot);

  if (!pier_dump_prot) {
    /* setup all banks */
    u32 r0 = pier_regs[0];
    carthw_pier_write8(0xa13001, 3);
    carthw_pier_write8(0xa13003, pier_regs[1]);
    carthw_pier_write8(0xa13005, pier_regs[2]);
    carthw_pier_write8(0xa13007, pier_regs[3]);
    carthw_pier_write8(0xa13001, r0);
  }
}

static void carthw_pier_reset(void)
{
  pier_regs[0] = 1;
  pier_regs[1] = pier_regs[2] = pier_regs[3] = 0;
  pier_dump_prot = 3;
  carthw_pier_statef();
  eeprom_spi_init(NULL);
}

void carthw_pier_startup(void)
{
  void *eeprom_state;
  int eeprom_size = 0;
  int i;

  elprintf(EL_STATUS, "Pier Solar mapper startup");

  // mostly same as for realtec..
  i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
  if (i != 0) {
    elprintf(EL_STATUS, "OOM");
    return;
  }

  // create dump protection bank
  for (i = 0; i < M68K_BANK_SIZE; i += 0x8000)
    memcpy(Pico.rom + Pico.romsize + i, Pico.rom, 0x8000);

  // save EEPROM
  eeprom_state = eeprom_spi_init(&eeprom_size);
  SRam.flags = 0;
  SRam.size = 0x10000;
  SRam.data = calloc(1, SRam.size);
  if (!SRam.data)
    SRam.size = 0;
  carthw_pier_state[2].ptr = eeprom_state;
  carthw_pier_state[2].size = eeprom_size;

  PicoCartMemSetup  = carthw_pier_mem_setup;
  PicoResetHook     = carthw_pier_reset;
  PicoLoadStateHook = carthw_pier_statef;
  carthw_chunks     = carthw_pier_state;
}

/* Simple unlicensed ROM protection emulation */
static struct {
  u32 addr;
  u32 mask;
  u16 val;
  u16 readonly;
} *sprot_items;
static int sprot_item_alloc;
static int sprot_item_count;

static u16 *carthw_sprot_get_val(u32 a, int rw_only)
{
  int i;

  for (i = 0; i < sprot_item_count; i++)
    if ((a & sprot_items[i].mask) == sprot_items[i].addr)
      if (!rw_only || !sprot_items[i].readonly)
        return &sprot_items[i].val;

  return NULL;
}

static u32 PicoRead8_sprot(u32 a)
{
  u16 *val;
  u32 d;

  if (0xa10000 <= a && a < 0xa12000)
    return PicoRead8_io(a);

  val = carthw_sprot_get_val(a, 0);
  if (val != NULL) {
    d = *val;
    if (!(a & 1))
      d >>= 8;
    elprintf(EL_UIO, "prot r8  [%06x]   %02x @%06x", a, d, SekPc);
    return d;
  }
  else {
    elprintf(EL_UIO, "prot r8  [%06x] MISS @%06x", a, SekPc);
    return 0;
  }
}

static u32 PicoRead16_sprot(u32 a)
{
  u16 *val;

  if (0xa10000 <= a && a < 0xa12000)
    return PicoRead16_io(a);

  val = carthw_sprot_get_val(a, 0);
  if (val != NULL) {
    elprintf(EL_UIO, "prot r16 [%06x] %04x @%06x", a, *val, SekPc);
    return *val;
  }
  else {
    elprintf(EL_UIO, "prot r16 [%06x] MISS @%06x", a, SekPc);
    return 0;
  }
}

static void PicoWrite8_sprot(u32 a, u32 d)
{
  u16 *val;

  if (0xa10000 <= a && a < 0xa12000) {
    PicoWrite8_io(a, d);
    return;
  }

  val = carthw_sprot_get_val(a, 1);
  if (val != NULL) {
    if (a & 1)
      *val = (*val & 0xff00) | (d | 0xff);
    else
      *val = (*val & 0x00ff) | (d << 8);
    elprintf(EL_UIO, "prot w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
  }
  else
    elprintf(EL_UIO, "prot w8  [%06x]   %02x MISS @%06x", a, d & 0xff, SekPc);
}

static void PicoWrite16_sprot(u32 a, u32 d)
{
  u16 *val;

  if (0xa10000 <= a && a < 0xa12000) {
    PicoWrite16_io(a, d);
    return;
  }

  val = carthw_sprot_get_val(a, 1);
  if (val != NULL) {
    *val = d;
    elprintf(EL_UIO, "prot w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  }
  else
    elprintf(EL_UIO, "prot w16 [%06x] %04x MISS @%06x", a, d & 0xffff, SekPc);
}

void carthw_sprot_new_location(unsigned int a, unsigned int mask, unsigned short val, int is_ro)
{
  if (sprot_items == NULL) {
    sprot_items = calloc(8, sizeof(sprot_items[0]));
    sprot_item_alloc = 8;
    sprot_item_count = 0;
  }

  if (sprot_item_count == sprot_item_alloc) {
    void *tmp;
    sprot_item_alloc *= 2;
    tmp = realloc(sprot_items, sprot_item_alloc);
    if (tmp == NULL) {
      elprintf(EL_STATUS, "OOM");
      return;
    }
    sprot_items = tmp;
  }

  sprot_items[sprot_item_count].addr = a;
  sprot_items[sprot_item_count].mask = mask;
  sprot_items[sprot_item_count].val = val;
  sprot_items[sprot_item_count].readonly = is_ro;
  sprot_item_count++;
}

static void carthw_sprot_unload(void)
{
  free(sprot_items);
  sprot_items = NULL;
  sprot_item_count = sprot_item_alloc = 0;
}

static void carthw_sprot_mem_setup(void)
{
  int start;

  // map ROM - 0x7fffff, /TIME areas (which are tipically used)
  start = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
  cpu68k_map_set(m68k_read8_map,   start, 0x7fffff, PicoRead8_sprot, 1);
  cpu68k_map_set(m68k_read16_map,  start, 0x7fffff, PicoRead16_sprot, 1);
  cpu68k_map_set(m68k_write8_map,  start, 0x7fffff, PicoWrite8_sprot, 1);
  cpu68k_map_set(m68k_write16_map, start, 0x7fffff, PicoWrite16_sprot, 1);

  cpu68k_map_set(m68k_read8_map,   0xa10000, 0xa1ffff, PicoRead8_sprot, 1);
  cpu68k_map_set(m68k_read16_map,  0xa10000, 0xa1ffff, PicoRead16_sprot, 1);
  cpu68k_map_set(m68k_write8_map,  0xa10000, 0xa1ffff, PicoWrite8_sprot, 1);
  cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_sprot, 1);
}

void carthw_sprot_startup(void)
{
  elprintf(EL_STATUS, "Prot emu startup");

  PicoCartMemSetup   = carthw_sprot_mem_setup;
  PicoCartUnloadHook = carthw_sprot_unload;
}

/* Protection emulation for Lion King 3. Credits go to Haze */
static u8 prot_lk3_cmd, prot_lk3_data;

static u32 PicoRead8_plk3(u32 a)
{
  u32 d = 0;
  switch (prot_lk3_cmd) {
    case 1: d = prot_lk3_data >> 1; break;
    case 2: // nibble rotate
      d = ((prot_lk3_data >> 4) | (prot_lk3_data << 4)) & 0xff;
      break;
    case 3: // bit rotate
      d = prot_lk3_data;
      d = (d >> 4) | (d << 4);
      d = ((d & 0xcc) >> 2) | ((d & 0x33) << 2);
      d = ((d & 0xaa) >> 1) | ((d & 0x55) << 1);
      break;
/* Top Fighter 2000 MK VIII (Unl)
      case 0x98: d = 0x50; break; // prot_lk3_data == a8 here
      case 0x67: d = 0xde; break; // prot_lk3_data == 7b here (rot!)
      case 0xb5: d = 0x9f; break; // prot_lk3_data == 4a
*/
    default:
      elprintf(EL_UIO, "unhandled prot cmd %02x @%06x", prot_lk3_cmd, SekPc);
      break;
  }

  elprintf(EL_UIO, "prot r8  [%06x]   %02x @%06x", a, d, SekPc);
  return d;
}

static void PicoWrite8_plk3p(u32 a, u32 d)
{
  elprintf(EL_UIO, "prot w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
  if (a & 2)
    prot_lk3_cmd = d;
  else
    prot_lk3_data = d;
}

static void PicoWrite8_plk3b(u32 a, u32 d)
{
  int addr;

  elprintf(EL_UIO, "prot w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);
  addr = d << 15;
  if (addr + 0x8000 > Pico.romsize) {
    elprintf(EL_UIO|EL_ANOMALY, "prot_lk3: bank too large: %02x", d);
    return;
  }
  if (addr == 0)
    memcpy(Pico.rom, Pico.rom + Pico.romsize, 0x8000);
  else
    memcpy(Pico.rom, Pico.rom + addr, 0x8000);
}

static void carthw_prot_lk3_mem_setup(void)
{
  cpu68k_map_set(m68k_read8_map,   0x600000, 0x7fffff, PicoRead8_plk3, 1);
  cpu68k_map_set(m68k_write8_map,  0x600000, 0x6fffff, PicoWrite8_plk3p, 1);
  cpu68k_map_set(m68k_write8_map,  0x700000, 0x7fffff, PicoWrite8_plk3b, 1);
}

void carthw_prot_lk3_startup(void)
{
  int ret;

  elprintf(EL_STATUS, "lk3 prot emu startup");

  // allocate space for bank0 backup
  ret = PicoCartResize(Pico.romsize + 0x8000);
  if (ret != 0) {
    elprintf(EL_STATUS, "OOM");
    return;
  }
  memcpy(Pico.rom + Pico.romsize, Pico.rom, 0x8000);

  PicoCartMemSetup = carthw_prot_lk3_mem_setup;
}

// vim:ts=2:sw=2:expandtab
Commit	Line	Data
a12b1b29	1	/*
000f5335	2	* Support for a few cart mappers and some protection.
30f0fdd4	3	* (C) notaz, 2008-2011
65ca3034	4	*
cff531af	5	* This work is licensed under the terms of MAME license.
cff531af	6	* See COPYING file in the top-level directory.
a12b1b29	7	*/
a12b1b29	8
efcba75f	9	#include "../pico_int.h"
45f2f245	10	#include "../memory.h"
6a47c2d4	11	#include "eeprom_spi.h"
757f8dae	12
a12b1b29	13
f5080654	14	static int have_bank(u32 base)
	15	{
	16	// the loader allocs in 512K quantities
	17	if (base >= Pico.romsize) {
	18	elprintf(EL_ANOMALY\|EL_STATUS, "carthw: missing bank @ %06x", base);
	19	return 0;
	20	}
	21	return 1;
	22	}
	23
000f5335	24	/* The SSFII mapper */
30f0fdd4	25	static unsigned char ssf2_banks[8];
000f5335	26
	27	static carthw_state_chunk carthw_ssf2_state[] =
	28	{
	29	{ CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
	30	{ 0, 0, NULL }
	31	};
	32
	33	static void carthw_ssf2_write8(u32 a, u32 d)
	34	{
	35	u32 target, base;
	36
	37	if ((a & 0xfffff0) != 0xa130f0) {
	38	PicoWrite8_io(a, d);
	39	return;
	40	}
	41
	42	a &= 0x0e;
	43	if (a == 0)
	44	return;
	45
	46	ssf2_banks[a >> 1] = d;
	47	base = d << 19;
	48	target = a << 18;
f5080654	49	if (!have_bank(base))
000f5335	50	return;
000f5335	51
	52	cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
	53	cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
	54	}
	55
	56	static void carthw_ssf2_mem_setup(void)
	57	{
	58	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_ssf2_write8, 1);
	59	}
	60
	61	static void carthw_ssf2_statef(void)
	62	{
	63	int i;
	64	for (i = 1; i < 8; i++)
	65	carthw_ssf2_write8(0xa130f0 \| (i << 1), ssf2_banks[i]);
	66	}
	67
	68	void carthw_ssf2_startup(void)
	69	{
	70	int i;
	71
	72	elprintf(EL_STATUS, "SSF2 mapper startup");
	73
	74	// default map
	75	for (i = 0; i < 8; i++)
	76	ssf2_banks[i] = i;
	77
	78	PicoCartMemSetup = carthw_ssf2_mem_setup;
	79	PicoLoadStateHook = carthw_ssf2_statef;
	80	carthw_chunks = carthw_ssf2_state;
	81	}
	82
	83
45f2f245	84	/* Common *-in-1 pirate mapper.
	85	* Switches banks based on addr lines when /TIME is set.
	86	* TODO: verify
	87	*/
	88	static unsigned int carthw_Xin1_baddr = 0;
757f8dae	89
45f2f245	90	static void carthw_Xin1_do(u32 a, int mask, int shift)
757f8dae	91	{
	92	int len;
	93
45f2f245	94	carthw_Xin1_baddr = a;
	95	a &= mask;
	96	a <<= shift;
757f8dae	97	len = Pico.romsize - a;
757f8dae	98	if (len <= 0) {
45f2f245	99	elprintf(EL_ANOMALY\|EL_STATUS, "X-in-1: missing bank @ %06x", a);
757f8dae	100	return;
	101	}
	102
45f2f245	103	len = (len + M68K_BANK_MASK) & ~M68K_BANK_MASK;
	104	cpu68k_map_set(m68k_read8_map, 0x000000, len - 1, Pico.rom + a, 0);
	105	cpu68k_map_set(m68k_read16_map, 0x000000, len - 1, Pico.rom + a, 0);
757f8dae	106	}
757f8dae	107
45f2f245	108	static carthw_state_chunk carthw_Xin1_state[] =
757f8dae	109	{
45f2f245	110	{ CHUNK_CARTHW, sizeof(carthw_Xin1_baddr), &carthw_Xin1_baddr },
	111	{ 0, 0, NULL }
	112	};
	113
	114	// TODO: test a0, reads, w16
	115	static void carthw_Xin1_write8(u32 a, u32 d)
	116	{
	117	if ((a & 0xffff00) != 0xa13000) {
	118	PicoWrite8_io(a, d);
	119	return;
	120	}
	121
	122	carthw_Xin1_do(a, 0x3f, 16);
757f8dae	123	}
757f8dae	124
45f2f245	125	static void carthw_Xin1_mem_setup(void)
bdec53c9	126	{
45f2f245	127	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_Xin1_write8, 1);
bdec53c9	128	}
bdec53c9	129
45f2f245	130	static void carthw_Xin1_reset(void)
757f8dae	131	{
45f2f245	132	carthw_Xin1_write8(0xa13000, 0);
45f2f245	133	}
757f8dae	134
45f2f245	135	static void carthw_Xin1_statef(void)
	136	{
	137	carthw_Xin1_write8(carthw_Xin1_baddr, 0);
	138	}
757f8dae	139
45f2f245	140	void carthw_Xin1_startup(void)
	141	{
	142	elprintf(EL_STATUS, "X-in-1 mapper startup");
757f8dae	143
45f2f245	144	PicoCartMemSetup = carthw_Xin1_mem_setup;
	145	PicoResetHook = carthw_Xin1_reset;
	146	PicoLoadStateHook = carthw_Xin1_statef;
	147	carthw_chunks = carthw_Xin1_state;
757f8dae	148	}
757f8dae	149
a12b1b29	150
	151	/* Realtec, based on TascoDLX doc
	152	* http://www.sharemation.com/TascoDLX/REALTEC%20Cart%20Mapper%20-%20description%20v1.txt
	153	*/
	154	static int realtec_bank = 0x80000000, realtec_size = 0x80000000;
a12b1b29	155
45f2f245	156	static void carthw_realtec_write8(u32 a, u32 d)
a12b1b29	157	{
	158	int i, bank_old = realtec_bank, size_old = realtec_size;
	159
	160	if (a == 0x400000)
	161	{
	162	realtec_bank &= 0x0e0000;
	163	realtec_bank \|= 0x300000 & (d << 19);
	164	if (realtec_bank != bank_old)
	165	elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	166	}
	167	else if (a == 0x402000)
	168	{
	169	realtec_size = (d << 17) & 0x3e0000;
	170	if (realtec_size != size_old)
	171	elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	172	}
	173	else if (a == 0x404000)
	174	{
	175	realtec_bank &= 0x300000;
	176	realtec_bank \|= 0x0e0000 & (d << 17);
	177	if (realtec_bank != bank_old)
	178	elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
	179	}
	180	else
	181	elprintf(EL_ANOMALY, "realtec: unexpected write [%06x] %02x @ %06x", a, d, SekPc);
65ca3034	182
a12b1b29	183	if (realtec_bank >= 0 && realtec_size >= 0 &&
	184	(realtec_bank != bank_old \|\| realtec_size != size_old))
	185	{
	186	elprintf(EL_ANOMALY, "realtec: new bank %06x, size %06x", realtec_bank, realtec_size, SekPc);
45f2f245	187	if (realtec_size > Pico.romsize - realtec_bank)
a12b1b29	188	{
	189	elprintf(EL_ANOMALY, "realtec: bank too large / out of range?");
	190	return;
	191	}
	192
45f2f245	193	for (i = 0; i < 0x400000; i += realtec_size) {
	194	cpu68k_map_set(m68k_read8_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
	195	cpu68k_map_set(m68k_read16_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
	196	}
a12b1b29	197	}
	198	}
	199
0b35350d	200	static void carthw_realtec_reset(void)
a12b1b29	201	{
a12b1b29	202	int i;
45f2f245	203
a12b1b29	204	/* map boot code */
45f2f245	205	for (i = 0; i < 0x400000; i += M68K_BANK_SIZE) {
	206	cpu68k_map_set(m68k_read8_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
	207	cpu68k_map_set(m68k_read16_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
	208	}
	209	cpu68k_map_set(m68k_write8_map, 0x400000, 0x400000 + M68K_BANK_SIZE - 1, carthw_realtec_write8, 1);
a12b1b29	210	realtec_bank = realtec_size = 0x80000000;
	211	}
	212
	213	void carthw_realtec_startup(void)
	214	{
45f2f245	215	int i;
a12b1b29	216
45f2f245	217	elprintf(EL_STATUS, "Realtec mapper startup");
a12b1b29	218
45f2f245	219	// allocate additional bank for boot code
45f2f245	220	// (we know those ROMs have aligned size)
a736af3e	221	i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
a736af3e	222	if (i != 0) {
a12b1b29	223	elprintf(EL_STATUS, "OOM");
	224	return;
	225	}
a12b1b29	226
45f2f245	227	// create bank for boot code
	228	for (i = 0; i < M68K_BANK_SIZE; i += 0x2000)
	229	memcpy(Pico.rom + Pico.romsize + i, Pico.rom + Pico.romsize - 0x2000, 0x2000);
	230
a12b1b29	231	PicoResetHook = carthw_realtec_reset;
	232	}
	233
0b35350d	234	/* Radica mapper, based on DevSter's info
0b35350d	235	* http://devster.monkeeh.com/sega/radica/
45f2f245	236	* XXX: mostly the same as X-in-1, merge?
0b35350d	237	*/
45f2f245	238	static u32 carthw_radica_read16(u32 a)
0b35350d	239	{
45f2f245	240	if ((a & 0xffff00) != 0xa13000)
45f2f245	241	return PicoRead16_io(a);
0b35350d	242
45f2f245	243	carthw_Xin1_do(a, 0x7e, 15);
0b35350d	244
	245	return 0;
	246	}
	247
45f2f245	248	static void carthw_radica_mem_setup(void)
	249	{
	250	cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_radica_read16, 1);
	251	}
	252
0b35350d	253	static void carthw_radica_statef(void)
0b35350d	254	{
45f2f245	255	carthw_radica_read16(carthw_Xin1_baddr);
0b35350d	256	}
	257
	258	static void carthw_radica_reset(void)
	259	{
45f2f245	260	carthw_radica_read16(0xa13000);
0b35350d	261	}
	262
	263	void carthw_radica_startup(void)
	264	{
45f2f245	265	elprintf(EL_STATUS, "Radica mapper startup");
0b35350d	266
45f2f245	267	PicoCartMemSetup = carthw_radica_mem_setup;
45f2f245	268	PicoResetHook = carthw_radica_reset;
0b35350d	269	PicoLoadStateHook = carthw_radica_statef;
45f2f245	270	carthw_chunks = carthw_Xin1_state;
0b35350d	271	}
0b35350d	272
30f0fdd4	273
	274	/* Pier Solar. Based on my own research */
	275	static unsigned char pier_regs[8];
	276	static unsigned char pier_dump_prot;
	277
	278	static carthw_state_chunk carthw_pier_state[] =
	279	{
	280	{ CHUNK_CARTHW, sizeof(pier_regs), pier_regs },
	281	{ CHUNK_CARTHW + 1, sizeof(pier_dump_prot), &pier_dump_prot },
6a47c2d4	282	{ CHUNK_CARTHW + 2, 0, NULL }, // filled later
30f0fdd4	283	{ 0, 0, NULL }
	284	};
	285
	286	static void carthw_pier_write8(u32 a, u32 d)
	287	{
	288	u32 a8, target, base;
	289
	290	if ((a & 0xffff00) != 0xa13000) {
	291	PicoWrite8_io(a, d);
	292	return;
	293	}
	294
	295	a8 = a & 0x0f;
	296	pier_regs[a8 / 2] = d;
	297
	298	elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
	299	switch (a8) {
	300	case 0x01:
	301	break;
	302	case 0x03:
	303	if (!(pier_regs[0] & 2))
	304	goto unmapped;
	305	target = 0x280000;
	306	base = d << 19;
	307	goto do_map;
	308	case 0x05:
	309	if (!(pier_regs[0] & 2))
	310	goto unmapped;
	311	target = 0x300000;
	312	base = d << 19;
	313	goto do_map;
	314	case 0x07:
	315	if (!(pier_regs[0] & 2))
	316	goto unmapped;
	317	target = 0x380000;
	318	base = d << 19;
	319	goto do_map;
	320	case 0x09:
6a47c2d4	321	SRam.changed = 1;
6a47c2d4	322	eeprom_spi_write(d);
30f0fdd4	323	break;
	324	case 0x0b:
	325	// eeprom read
	326	default:
	327	unmapped:
	328	//elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
	329	elprintf(EL_STATUS, "-- unmapped w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
	330	break;
	331	}
	332	return;
	333
	334	do_map:
f5080654	335	if (!have_bank(base))
30f0fdd4	336	return;
f5080654	337
30f0fdd4	338	cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
	339	cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
	340	}
	341
	342	static void carthw_pier_write16(u32 a, u32 d)
	343	{
	344	if ((a & 0xffff00) != 0xa13000) {
	345	PicoWrite16_io(a, d);
	346	return;
	347	}
	348
	349	elprintf(EL_UIO, "pier w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
	350	carthw_pier_write8(a + 1, d);
	351	}
	352
	353	static u32 carthw_pier_read8(u32 a)
	354	{
	355	if ((a & 0xffff00) != 0xa13000)
	356	return PicoRead8_io(a);
	357
	358	if (a == 0xa1300b)
6a47c2d4	359	return eeprom_spi_read(a);
30f0fdd4	360
	361	elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
	362	return 0;
	363	}
	364
	365	static void carthw_pier_statef(void);
	366
	367	static u32 carthw_pier_prot_read8(u32 a)
	368	{
	369	/* it takes more than just these reads here to disable ROM protection,
	370	* but for game emulation purposes this is enough. */
	371	if (pier_dump_prot > 0)
	372	pier_dump_prot--;
	373	if (pier_dump_prot == 0) {
	374	carthw_pier_statef();
	375	elprintf(EL_STATUS, "prot off on r8 @%06x", SekPc);
	376	}
	377	elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
	378
	379	return Pico.rom[(a & 0x7fff) ^ 1];
	380	}
	381
	382	static void carthw_pier_mem_setup(void)
	383	{
	384	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_pier_write8, 1);
	385	cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, carthw_pier_write16, 1);
	386	cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, carthw_pier_read8, 1);
	387	}
	388
	389	static void carthw_pier_prot_mem_setup(int prot_enable)
	390	{
	391	if (prot_enable) {
	392	/* the dump protection.. */
	393	int a;
	394	for (a = 0x000000; a < 0x400000; a += M68K_BANK_SIZE) {
	395	cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
	396	cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
	397	}
	398	cpu68k_map_set(m68k_read8_map, M68K_BANK_SIZE, M68K_BANK_SIZE * 2 - 1,
	399	carthw_pier_prot_read8, 1);
	400	}
	401	else {
	402	cpu68k_map_set(m68k_read8_map, 0, 0x27ffff, Pico.rom, 0);
	403	cpu68k_map_set(m68k_read16_map, 0, 0x27ffff, Pico.rom, 0);
	404	}
	405	}
	406
	407	static void carthw_pier_statef(void)
	408	{
	409	carthw_pier_prot_mem_setup(pier_dump_prot);
	410
	411	if (!pier_dump_prot) {
	412	/* setup all banks */
	413	u32 r0 = pier_regs[0];
	414	carthw_pier_write8(0xa13001, 3);
	415	carthw_pier_write8(0xa13003, pier_regs[1]);
	416	carthw_pier_write8(0xa13005, pier_regs[2]);
	417	carthw_pier_write8(0xa13007, pier_regs[3]);
	418	carthw_pier_write8(0xa13001, r0);
	419	}
	420	}
	421
	422	static void carthw_pier_reset(void)
	423	{
424	pier_regs[0] = 1;
425	pier_regs[1] = pier_regs[2] = pier_regs[3] = 0;
426	pier_dump_prot = 3;
427	carthw_pier_statef();
6a47c2d4	428	eeprom_spi_init(NULL);
30f0fdd4	429	}
	430
	431	void carthw_pier_startup(void)
	432	{
6a47c2d4	433	void *eeprom_state;
6a47c2d4	434	int eeprom_size = 0;
30f0fdd4	435	int i;
	436
	437	elprintf(EL_STATUS, "Pier Solar mapper startup");
	438
	439	// mostly same as for realtec..
	440	i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
	441	if (i != 0) {
	442	elprintf(EL_STATUS, "OOM");
	443	return;
	444	}
	445
	446	// create dump protection bank
	447	for (i = 0; i < M68K_BANK_SIZE; i += 0x8000)
	448	memcpy(Pico.rom + Pico.romsize + i, Pico.rom, 0x8000);
	449
6a47c2d4	450	// save EEPROM
	451	eeprom_state = eeprom_spi_init(&eeprom_size);
	452	SRam.flags = 0;
	453	SRam.size = 0x10000;
	454	SRam.data = calloc(1, SRam.size);
	455	if (!SRam.data)
	456	SRam.size = 0;
	457	carthw_pier_state[2].ptr = eeprom_state;
	458	carthw_pier_state[2].size = eeprom_size;
	459
30f0fdd4	460	PicoCartMemSetup = carthw_pier_mem_setup;
	461	PicoResetHook = carthw_pier_reset;
	462	PicoLoadStateHook = carthw_pier_statef;
	463	carthw_chunks = carthw_pier_state;
	464	}
	465
000f5335	466	/* Simple unlicensed ROM protection emulation */
000f5335	467	static struct {
30f0fdd4	468	u32 addr;
	469	u32 mask;
	470	u16 val;
	471	u16 readonly;
000f5335	472	} *sprot_items;
	473	static int sprot_item_alloc;
	474	static int sprot_item_count;
	475
	476	static u16 *carthw_sprot_get_val(u32 a, int rw_only)
	477	{
30f0fdd4	478	int i;
	479
	480	for (i = 0; i < sprot_item_count; i++)
	481	if ((a & sprot_items[i].mask) == sprot_items[i].addr)
	482	if (!rw_only \|\| !sprot_items[i].readonly)
	483	return &sprot_items[i].val;
000f5335	484
30f0fdd4	485	return NULL;
000f5335	486	}
	487
	488	static u32 PicoRead8_sprot(u32 a)
	489	{
	490	u16 *val;
	491	u32 d;
	492
	493	if (0xa10000 <= a && a < 0xa12000)
	494	return PicoRead8_io(a);
	495
	496	val = carthw_sprot_get_val(a, 0);
	497	if (val != NULL) {
	498	d = *val;
	499	if (!(a & 1))
	500	d >>= 8;
	501	elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
	502	return d;
	503	}
	504	else {
	505	elprintf(EL_UIO, "prot r8 [%06x] MISS @%06x", a, SekPc);
	506	return 0;
	507	}
	508	}
	509
	510	static u32 PicoRead16_sprot(u32 a)
	511	{
	512	u16 *val;
	513
	514	if (0xa10000 <= a && a < 0xa12000)
	515	return PicoRead16_io(a);
	516
	517	val = carthw_sprot_get_val(a, 0);
	518	if (val != NULL) {
	519	elprintf(EL_UIO, "prot r16 [%06x] %04x @%06x", a, *val, SekPc);
	520	return *val;
	521	}
	522	else {
	523	elprintf(EL_UIO, "prot r16 [%06x] MISS @%06x", a, SekPc);
	524	return 0;
	525	}
	526	}
	527
	528	static void PicoWrite8_sprot(u32 a, u32 d)
	529	{
	530	u16 *val;
	531
	532	if (0xa10000 <= a && a < 0xa12000) {
	533	PicoWrite8_io(a, d);
	534	return;
	535	}
	536
	537	val = carthw_sprot_get_val(a, 1);
	538	if (val != NULL) {
	539	if (a & 1)
	540	val = (val & 0xff00) \| (d \| 0xff);
	541	else
	542	val = (val & 0x00ff) \| (d << 8);
	543	elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
	544	}
	545	else
	546	elprintf(EL_UIO, "prot w8 [%06x] %02x MISS @%06x", a, d & 0xff, SekPc);
	547	}
	548
	549	static void PicoWrite16_sprot(u32 a, u32 d)
550	{
551	u16 *val;
552
553	if (0xa10000 <= a && a < 0xa12000) {
554	PicoWrite16_io(a, d);
555	return;
556	}
557
558	val = carthw_sprot_get_val(a, 1);
559	if (val != NULL) {
560	*val = d;
561	elprintf(EL_UIO, "prot w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
562	}
563	else
564	elprintf(EL_UIO, "prot w16 [%06x] %04x MISS @%06x", a, d & 0xffff, SekPc);
565	}
566
567	void carthw_sprot_new_location(unsigned int a, unsigned int mask, unsigned short val, int is_ro)
568	{
569	if (sprot_items == NULL) {
570	sprot_items = calloc(8, sizeof(sprot_items[0]));
571	sprot_item_alloc = 8;
572	sprot_item_count = 0;
573	}
574
575	if (sprot_item_count == sprot_item_alloc) {
576	void *tmp;
577	sprot_item_alloc *= 2;
578	tmp = realloc(sprot_items, sprot_item_alloc);
579	if (tmp == NULL) {
580	elprintf(EL_STATUS, "OOM");
581	return;
582	}
583	sprot_items = tmp;
584	}
585
586	sprot_items[sprot_item_count].addr = a;
587	sprot_items[sprot_item_count].mask = mask;
588	sprot_items[sprot_item_count].val = val;
589	sprot_items[sprot_item_count].readonly = is_ro;
590	sprot_item_count++;
591	}
592
593	static void carthw_sprot_unload(void)
594	{
595	free(sprot_items);
596	sprot_items = NULL;
597	sprot_item_count = sprot_item_alloc = 0;
598	}
599
600	static void carthw_sprot_mem_setup(void)
601	{
602	int start;
603
604	// map ROM - 0x7fffff, /TIME areas (which are tipically used)
605	start = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
606	cpu68k_map_set(m68k_read8_map, start, 0x7fffff, PicoRead8_sprot, 1);
607	cpu68k_map_set(m68k_read16_map, start, 0x7fffff, PicoRead16_sprot, 1);
608	cpu68k_map_set(m68k_write8_map, start, 0x7fffff, PicoWrite8_sprot, 1);
609	cpu68k_map_set(m68k_write16_map, start, 0x7fffff, PicoWrite16_sprot, 1);
610
611	cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_sprot, 1);
612	cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_sprot, 1);
613	cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_sprot, 1);
614	cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_sprot, 1);
615	}
616
617	void carthw_sprot_startup(void)
618	{
619	elprintf(EL_STATUS, "Prot emu startup");
620
621	PicoCartMemSetup = carthw_sprot_mem_setup;
622	PicoCartUnloadHook = carthw_sprot_unload;
623	}
624
625	/* Protection emulation for Lion King 3. Credits go to Haze */
626	static u8 prot_lk3_cmd, prot_lk3_data;
627
628	static u32 PicoRead8_plk3(u32 a)
629	{
630	u32 d = 0;
631	switch (prot_lk3_cmd) {
632	case 1: d = prot_lk3_data >> 1; break;
633	case 2: // nibble rotate
634	d = ((prot_lk3_data >> 4) \| (prot_lk3_data << 4)) & 0xff;
635	break;
636	case 3: // bit rotate
637	d = prot_lk3_data;
638	d = (d >> 4) \| (d << 4);
639	d = ((d & 0xcc) >> 2) \| ((d & 0x33) << 2);
640	d = ((d & 0xaa) >> 1) \| ((d & 0x55) << 1);
641	break;
642	/* Top Fighter 2000 MK VIII (Unl)
643	case 0x98: d = 0x50; break; // prot_lk3_data == a8 here
644	case 0x67: d = 0xde; break; // prot_lk3_data == 7b here (rot!)
645	case 0xb5: d = 0x9f; break; // prot_lk3_data == 4a
646	*/
647	default:
648	elprintf(EL_UIO, "unhandled prot cmd %02x @%06x", prot_lk3_cmd, SekPc);
649	break;
650	}
651
652	elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
653	return d;
654	}
655
656	static void PicoWrite8_plk3p(u32 a, u32 d)
657	{
658	elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
659	if (a & 2)
660	prot_lk3_cmd = d;
661	else
662	prot_lk3_data = d;
663	}
664
665	static void PicoWrite8_plk3b(u32 a, u32 d)
666	{
667	int addr;
668
669	elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
670	addr = d << 15;
671	if (addr + 0x8000 > Pico.romsize) {
672	elprintf(EL_UIO\|EL_ANOMALY, "prot_lk3: bank too large: %02x", d);
673	return;
674	}
675	if (addr == 0)
676	memcpy(Pico.rom, Pico.rom + Pico.romsize, 0x8000);
677	else
678	memcpy(Pico.rom, Pico.rom + addr, 0x8000);
679	}
680
681	static void carthw_prot_lk3_mem_setup(void)
682	{
683	cpu68k_map_set(m68k_read8_map, 0x600000, 0x7fffff, PicoRead8_plk3, 1);
684	cpu68k_map_set(m68k_write8_map, 0x600000, 0x6fffff, PicoWrite8_plk3p, 1);
685	cpu68k_map_set(m68k_write8_map, 0x700000, 0x7fffff, PicoWrite8_plk3b, 1);
686	}
687
688	void carthw_prot_lk3_startup(void)
689	{
a736af3e	690	int ret;
000f5335	691
	692	elprintf(EL_STATUS, "lk3 prot emu startup");
	693
	694	// allocate space for bank0 backup
a736af3e	695	ret = PicoCartResize(Pico.romsize + 0x8000);
a736af3e	696	if (ret != 0) {
000f5335	697	elprintf(EL_STATUS, "OOM");
	698	return;
	699	}
000f5335	700	memcpy(Pico.rom + Pico.romsize, Pico.rom, 0x8000);
	701
	702	PicoCartMemSetup = carthw_prot_lk3_mem_setup;
	703	}
	704
6a47c2d4	705	// vim:ts=2:sw=2:expandtab