based on hw tests busreq is affected by reset. Remove old hack too
[picodrive.git] / pico / memory_cmn.c
CommitLineData
6cadc2da 1// common code for Memory.c and cd/Memory.c
2// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
fa1e5e29 3
eff55556 4#ifndef UTYPES_DEFINED
5typedef unsigned char u8;
6typedef unsigned short u16;
7typedef unsigned int u32;
8#define UTYPES_DEFINED
9#endif
10
fa1e5e29 11
12#ifndef _ASM_MEMORY_C
13static
14#endif
15u8 z80Read8(u32 a)
16{
17 if(Pico.m.z80Run&1) return 0;
18
19 a&=0x1fff;
20
602133e1 21 if (!(PicoOpt&POPT_EN_Z80))
22 {
fa1e5e29 23 // Z80 disabled, do some faking
24 static u8 zerosent = 0;
25 if(a == Pico.m.z80_lastaddr) { // probably polling something
26 u8 d = Pico.m.z80_fakeval;
27 if((d & 0xf) == 0xf && !zerosent) {
28 d = 0; zerosent = 1;
29 } else {
30 Pico.m.z80_fakeval++;
31 zerosent = 0;
32 }
33 return d;
34 } else {
35 Pico.m.z80_fakeval = 0;
36 }
37 }
38
39 Pico.m.z80_lastaddr = (u16) a;
40 return Pico.zram[a];
41}
42
fa1e5e29 43#ifndef _ASM_MEMORY_C
44static
45#endif
e5503e2f 46u32 z80ReadBusReq(void)
fa1e5e29 47{
c238eec8 48 u32 d = (Pico.m.z80Run | Pico.m.z80_reset) & 1;
69996cb7 49 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
e5503e2f 50 return d|0x80;
51}
fa1e5e29 52
be297089 53static void z80WriteBusReq(u32 d)
54{
55 d&=1; d^=1;
56 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
57 if (d ^ Pico.m.z80Run)
58 {
59 if (d)
60 {
61 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
62 }
63 else
64 {
65 z80stopCycle = SekCyclesDone();
66 if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
67 PicoSyncZ80(z80stopCycle);
68 }
69 Pico.m.z80Run=d;
70 }
71}
72
73static void z80WriteReset(u32 d)
e5503e2f 74{
75 d&=1; d^=1;
be297089 76 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
77 if (d ^ Pico.m.z80_reset)
f58f05d2 78 {
be297089 79 if (d)
b542be46 80 {
bd613473 81 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
be297089 82 PicoSyncZ80(SekCyclesDone());
83 }
84 else
85 {
86 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
87 z80_reset();
fa1e5e29 88 }
be297089 89 YM2612ResetChip();
90 timers_reset();
91 Pico.m.z80_reset=d;
fa1e5e29 92 }
e5503e2f 93}
94
95#ifndef _ASM_MEMORY_C
96static
97#endif
98u32 OtherRead16(u32 a, int realsize)
99{
100 u32 d=0;
fa1e5e29 101
102 if ((a&0xffffe0)==0xa10000) { // I/O ports
103 a=(a>>1)&0xf;
104 switch(a) {
105 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
e5503e2f 106 case 1: d=PadRead(0); break;
107 case 2: d=PadRead(1); break;
fa1e5e29 108 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
109 }
110 d|=d<<8;
111 goto end;
112 }
113
f58f05d2 114 // rotate fakes next fetched instruction for Time Killers
fa1e5e29 115 if (a==0xa11100) { // z80 busreq
e5503e2f 116 d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
fa1e5e29 117 goto end;
118 }
119
bd613473 120 if ((a&0xff0000)==0xa00000)
121 {
122 if (Pico.m.z80Run&1)
583ab72c 123 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
e5503e2f 124 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
c060a9ab 125 if ((a&0x6000)==0x4000) { d=ym2612_read_local_68k(); goto end; } // 0x4000-0x5fff
126
bd613473 127 elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
e5503e2f 128 d=0xffff;
129 goto end;
130 }
131
f53f286a 132 d = PicoRead16Hook(a, realsize);
fa1e5e29 133
134end:
135 return d;
136}
137
e5503e2f 138static void IoWrite8(u32 a, u32 d)
139{
140 a=(a>>1)&0xf;
141 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
583ab72c 142 if (PicoOpt&POPT_6BTN_PAD)
602133e1 143 {
144 if (a==1) {
e5503e2f 145 Pico.m.padDelay[0] = 0;
146 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
147 }
602133e1 148 else if (a==2) {
e5503e2f 149 Pico.m.padDelay[1] = 0;
150 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
151 }
152 }
153 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
154}
fa1e5e29 155
4ff2d527 156#ifndef _ASM_CD_MEMORY_C
157static
158#endif
e5503e2f 159void OtherWrite8(u32 a,u32 d)
fa1e5e29 160{
3ec29f01 161#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 162 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
bd613473 163 if ((a&0xff4000)==0xa00000) { // z80 RAM
760e26c7 164 SekCyclesBurn(2); // hack
165 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d;
166 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
bd613473 167 return;
168 }
4b9c5888 169 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
e5503e2f 170 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
171#endif
172 if (a==0xa11100) { z80WriteBusReq(d); return; }
be297089 173 if (a==0xa11200) { z80WriteReset(d); return; }
174
3ec29f01 175#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 176 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
177 {
178 Pico.m.z80_bank68k>>=1;
179 Pico.m.z80_bank68k|=(d&1)<<8;
180 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 181 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 182 return;
183 }
e5503e2f 184#endif
fa1e5e29 185 if ((a&0xe700e0)==0xc00000) {
f58f05d2 186 d&=0xff;
fa1e5e29 187 PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
188 return;
189 }
190
4b9c5888 191 PicoWrite8Hook(a, d&0xff, 8);
fa1e5e29 192}
193
194
4ff2d527 195#ifndef _ASM_CD_MEMORY_C
196static
197#endif
198void OtherWrite16(u32 a,u32 d)
fa1e5e29 199{
e5503e2f 200 if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
e5503e2f 201 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
e5503e2f 202 if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
4b9c5888 203 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
bd613473 204 if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
760e26c7 205 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8);
206 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc);
bd613473 207 return;
208 }
be297089 209 if (a==0xa11200) { z80WriteReset(d>>8); return; }
210
e5503e2f 211 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
212 {
213 Pico.m.z80_bank68k>>=1;
214 Pico.m.z80_bank68k|=(d&1)<<8;
215 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 216 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 217 return;
218 }
fa1e5e29 219
69996cb7 220#ifndef _CD_MEMORY_C
7969166e 221 if (a >= SRam.start && a <= SRam.end) {
1dceadae 222 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
9dc09829 223 if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
7969166e 224 u8 *pm=(u8 *)(SRam.data-SRam.start+a);
225 *pm++=d>>8;
226 *pm++=d;
227 SRam.changed = 1;
228 }
229 else
1dceadae 230 SRAMWrite(a, d);
7969166e 231 return;
232 }
69996cb7 233#endif
f53f286a 234
4b9c5888 235 PicoWrite16Hook(a, d&0xffff, 16);
fa1e5e29 236}
237