[picodrive.git] / pico / sms.c

/*
 * TODO:
 * - start in a state as if BIOS ran
 * - remaining status flags (OVR/COL)
 * - RAM support in mapper
 * - region support
 * - Pause button (NMI)
 * - SN76496 DAC-like usage
 * - H counter
 */
#include "pico_int.h"
#include "sound/sn76496.h"

static unsigned char vdp_data_read(void)
{
  struct PicoVideo *pv = &Pico.video;
  unsigned char d;

  d = Pico.vramb[pv->addr];
  pv->addr = (pv->addr + 1) & 0x3fff;
  pv->pending = 0;
  return d;
}

static unsigned char vdp_ctl_read(void)
{
  unsigned char d = Pico.video.pending_ints << 7;
  Pico.video.pending = 0;
  Pico.video.pending_ints = 0;

  elprintf(EL_SR, "VDP sr: %02x", d);
  return d;
}

static void vdp_data_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->type == 3) {
    Pico.cram[pv->addr & 0x1f] = d;
    Pico.m.dirtyPal = 1;
  } else {
    Pico.vramb[pv->addr] = d;
  }
  pv->addr = (pv->addr + 1) & 0x3fff;

  pv->pending = 0;
}

static void vdp_ctl_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->pending) {
    if ((d >> 6) == 2) {
      pv->reg[d & 0x0f] = pv->addr;
      elprintf(EL_IO, "  VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
    }
    pv->type = d >> 6;
    pv->addr &= 0x00ff;
    pv->addr |= (d & 0x3f) << 8;
  } else {
    pv->addr &= 0x3f00;
    pv->addr |= d;
  }
  pv->pending ^= 1;
}

static unsigned char z80_sms_in(unsigned short a)
{
  unsigned char d = 0;

  elprintf(EL_IO, "z80 port %04x read", a);
  a &= 0xc1;
  switch (a)
  {
    case 0x00:
    case 0x01:
      d = 0xff;
      break;

    case 0x40: /* V counter */
      d = Pico.video.v_counter;
      elprintf(EL_HVCNT, "V counter read: %02x", d);
      break;

    case 0x41: /* H counter */
      d = Pico.m.rotate++;
      elprintf(EL_HVCNT, "H counter read: %02x", d);
      break;

    case 0x80:
      d = vdp_data_read();
      break;

    case 0x81:
      d = vdp_ctl_read();
      break;

    case 0xc0: /* I/O port A and B */
      d = ~((PicoPad[0] & 0x3f) | (PicoPad[1] << 6));
      break;

    case 0xc1: /* I/O port B and miscellaneous */
      d = (Pico.sms_io_ctl & 0x80) | ((Pico.sms_io_ctl << 1) & 0x40) | 0x30;
      d |= ~(PicoPad[1] >> 2) & 0x0f;
      break;
  }

  elprintf(EL_IO, "ret = %02x", d);
  return d;
}

static void z80_sms_out(unsigned short a, unsigned char d)
{
  elprintf(EL_IO, "z80 port %04x write %02x", a, d);
  a &= 0xc1;
  switch (a)
  {
    case 0x01:
      Pico.sms_io_ctl = d;
      break;

    case 0x40:
    case 0x41:
      if (PicoOpt & POPT_EN_PSG)
        SN76496Write(d);
      break;

    case 0x80:
      vdp_data_write(d);
      break;

    case 0x81:
      vdp_ctl_write(d);
      break;
  }
}

static int bank_mask;

static void write_bank(unsigned short a, unsigned char d)
{
  elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
  switch (a & 0x0f)
  {
    case 0x0c:
      elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
      break;
    case 0x0d:
      if (d != 0)
        elprintf(EL_STATUS|EL_ANOMALY, "bank0 changed to %d!", d);
      break;
    case 0x0e:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (UINT32)Pico.rom + (d << 14));
#endif
      break;
    case 0x0f:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (UINT32)Pico.rom + (d << 14));
#endif
      break;
  }
}

static void MEMH_FUNC xwrite(unsigned int a, unsigned char d)
{
  elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
  if (a >= 0xc000)
    Pico.zram[a & 0x1fff] = d;
  if (a >= 0xfff0)
    write_bank(a, d);
}

void PicoResetMS(void)
{
  z80_reset();
  PsndReset(); // pal must be known here
}

void PicoPowerMS(void)
{
  int s, tmp;

  memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
  memset(&Pico.video,0,sizeof(Pico.video));
  memset(&Pico.m,0,sizeof(Pico.m));
  Pico.m.pal = 0;

  // calculate a mask for bank writes.
  // ROM loader has aligned the size for us, so this is safe.
  s = 0; tmp = Pico.romsize;
  while ((tmp >>= 1) != 0)
    s++;
  if (Pico.romsize > (1 << s))
    s++;
  tmp = 1 << s;
  bank_mask = (tmp - 1) >> 14;

  PicoReset();
}

void PicoMemSetupMS(void)
{
  z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
  z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);

  z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
  z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
 
#ifdef _USE_DRZ80
  drZ80.z80_in = z80_sms_in;
  drZ80.z80_out = z80_sms_out;
#endif
#ifdef _USE_CZ80
  Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (UINT32)Pico.rom);
  Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (UINT32)Pico.zram);
  Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (UINT32)Pico.zram);
  Cz80_Set_INPort(&CZ80, z80_sms_in);
  Cz80_Set_OUTPort(&CZ80, z80_sms_out);
#endif
}

void PicoFrameMS(void)
{
  struct PicoVideo *pv = &Pico.video;
  int is_pal = Pico.m.pal;
  int lines = is_pal ? 313 : 262;
  int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
  int cycles_done = 0, cycles_aim = 0;
  int skip = PicoSkipFrame;
  int lines_vis = 192;
  int hint; // Hint counter
  int y;

  PicoFrameStartMode4();
  hint = pv->reg[0x0a];

  for (y = 0; y < lines; y++)
  {
    pv->v_counter = Pico.m.scanline = y;

    if (y < lines_vis && !skip)
      PicoLineMode4(y);

    if (y <= lines_vis)
    {
      if (--hint < 0)
      {
        hint = pv->reg[0x0a];
        pv->pending_ints |= 2;
        if (pv->reg[0] & 0x10) {
          elprintf(EL_INTS, "hint");
          z80_int();
        }
      }
    }
    else if (y == lines_vis + 1) {
      pv->pending_ints |= 1;
      if (pv->reg[1] & 0x20) {
        elprintf(EL_INTS, "vint");
        z80_int();
      }
    }

    cycles_aim += cycles_line;
    cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
  }

  if (PsndOut)
    PsndGetSamplesMS();
}

void PicoFrameDrawOnlyMS(void)
{
  int lines_vis = 192;
  int y;

  PicoFrameStartMode4();

  for (y = 0; y < lines_vis; y++)
    PicoLineMode4(y);
}
Commit	Line	Data
87b0845f	1	/*
	2	* TODO:
	3	* - start in a state as if BIOS ran
	4	* - remaining status flags (OVR/COL)
	5	* - RAM support in mapper
	6	* - region support
	7	* - Pause button (NMI)
	8	* - SN76496 DAC-like usage
	9	* - H counter
	10	*/
3e49ffd0	11	#include "pico_int.h"
2ec9bec5	12	#include "sound/sn76496.h"
3e49ffd0	13
2ec9bec5	14	static unsigned char vdp_data_read(void)
3e49ffd0	15	{
2ec9bec5	16	struct PicoVideo *pv = &Pico.video;
	17	unsigned char d;
	18
	19	d = Pico.vramb[pv->addr];
	20	pv->addr = (pv->addr + 1) & 0x3fff;
	21	pv->pending = 0;
	22	return d;
	23	}
	24
	25	static unsigned char vdp_ctl_read(void)
	26	{
	27	unsigned char d = Pico.video.pending_ints << 7;
	28	Pico.video.pending = 0;
	29	Pico.video.pending_ints = 0;
	30
	31	elprintf(EL_SR, "VDP sr: %02x", d);
	32	return d;
	33	}
	34
	35	static void vdp_data_write(unsigned char d)
	36	{
	37	struct PicoVideo *pv = &Pico.video;
	38
	39	if (pv->type == 3) {
	40	Pico.cram[pv->addr & 0x1f] = d;
200772b7	41	Pico.m.dirtyPal = 1;
2ec9bec5	42	} else {
	43	Pico.vramb[pv->addr] = d;
	44	}
	45	pv->addr = (pv->addr + 1) & 0x3fff;
2ec9bec5	46
	47	pv->pending = 0;
	48	}
	49
	50	static void vdp_ctl_write(unsigned char d)
	51	{
	52	struct PicoVideo *pv = &Pico.video;
	53
	54	if (pv->pending) {
	55	if ((d >> 6) == 2) {
	56	pv->reg[d & 0x0f] = pv->addr;
200772b7	57	elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
2ec9bec5	58	}
	59	pv->type = d >> 6;
	60	pv->addr &= 0x00ff;
	61	pv->addr \|= (d & 0x3f) << 8;
	62	} else {
	63	pv->addr &= 0x3f00;
	64	pv->addr \|= d;
	65	}
	66	pv->pending ^= 1;
3e49ffd0	67	}
3e49ffd0	68
2ec9bec5	69	static unsigned char z80_sms_in(unsigned short a)
3e49ffd0	70	{
2ec9bec5	71	unsigned char d = 0;
2ec9bec5	72
200772b7	73	elprintf(EL_IO, "z80 port %04x read", a);
2ec9bec5	74	a &= 0xc1;
	75	switch (a)
	76	{
	77	case 0x00:
	78	case 0x01:
	79	d = 0xff;
	80	break;
	81
	82	case 0x40: /* V counter */
	83	d = Pico.video.v_counter;
87b0845f	84	elprintf(EL_HVCNT, "V counter read: %02x", d);
2ec9bec5	85	break;
	86
	87	case 0x41: /* H counter */
	88	d = Pico.m.rotate++;
87b0845f	89	elprintf(EL_HVCNT, "H counter read: %02x", d);
2ec9bec5	90	break;
	91
	92	case 0x80:
	93	d = vdp_data_read();
	94	break;
	95
	96	case 0x81:
	97	d = vdp_ctl_read();
	98	break;
	99
	100	case 0xc0: /* I/O port A and B */
	101	d = ~((PicoPad[0] & 0x3f) \| (PicoPad[1] << 6));
	102	break;
	103
	104	case 0xc1: /* I/O port B and miscellaneous */
	105	d = (Pico.sms_io_ctl & 0x80) \| ((Pico.sms_io_ctl << 1) & 0x40) \| 0x30;
	106	d \|= ~(PicoPad[1] >> 2) & 0x0f;
	107	break;
	108	}
	109
200772b7	110	elprintf(EL_IO, "ret = %02x", d);
2ec9bec5	111	return d;
	112	}
	113
	114	static void z80_sms_out(unsigned short a, unsigned char d)
	115	{
200772b7	116	elprintf(EL_IO, "z80 port %04x write %02x", a, d);
2ec9bec5	117	a &= 0xc1;
	118	switch (a)
	119	{
	120	case 0x01:
	121	Pico.sms_io_ctl = d;
	122	break;
	123
	124	case 0x40:
	125	case 0x41:
	126	if (PicoOpt & POPT_EN_PSG)
	127	SN76496Write(d);
	128	break;
	129
	130	case 0x80:
	131	vdp_data_write(d);
	132	break;
	133
	134	case 0x81:
	135	vdp_ctl_write(d);
	136	break;
	137	}
	138	}
	139
87b0845f	140	static int bank_mask;
87b0845f	141
2ec9bec5	142	static void write_bank(unsigned short a, unsigned char d)
2ec9bec5	143	{
460603fa	144	elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
2ec9bec5	145	switch (a & 0x0f)
	146	{
	147	case 0x0c:
87b0845f	148	elprintf(EL_STATUS\|EL_ANOMALY, "%02x written to control reg!", d);
2ec9bec5	149	break;
	150	case 0x0d:
	151	if (d != 0)
	152	elprintf(EL_STATUS\|EL_ANOMALY, "bank0 changed to %d!", d);
	153	break;
	154	case 0x0e:
87b0845f	155	d &= bank_mask;
2ec9bec5	156	z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
	157	#ifdef _USE_CZ80
	158	Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (UINT32)Pico.rom + (d << 14));
	159	#endif
	160	break;
	161	case 0x0f:
87b0845f	162	d &= bank_mask;
2ec9bec5	163	z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
	164	#ifdef _USE_CZ80
	165	Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (UINT32)Pico.rom + (d << 14));
	166	#endif
	167	break;
	168	}
3e49ffd0	169	}
3e49ffd0	170
2ec9bec5	171	static void MEMH_FUNC xwrite(unsigned int a, unsigned char d)
2ec9bec5	172	{
200772b7	173	elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
2ec9bec5	174	if (a >= 0xc000)
	175	Pico.zram[a & 0x1fff] = d;
	176	if (a >= 0xfff0)
	177	write_bank(a, d);
3e49ffd0	178	}
3e49ffd0	179
2ec9bec5	180	void PicoResetMS(void)
3e49ffd0	181	{
2ec9bec5	182	z80_reset();
2ec9bec5	183	PsndReset(); // pal must be known here
3e49ffd0	184	}
	185
	186	void PicoPowerMS(void)
	187	{
87b0845f	188	int s, tmp;
87b0845f	189
2ec9bec5	190	memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
	191	memset(&Pico.video,0,sizeof(Pico.video));
	192	memset(&Pico.m,0,sizeof(Pico.m));
	193	Pico.m.pal = 0;
	194
87b0845f	195	// calculate a mask for bank writes.
	196	// ROM loader has aligned the size for us, so this is safe.
	197	s = 0; tmp = Pico.romsize;
	198	while ((tmp >>= 1) != 0)
	199	s++;
	200	if (Pico.romsize > (1 << s))
	201	s++;
	202	tmp = 1 << s;
	203	bank_mask = (tmp - 1) >> 14;
	204
2ec9bec5	205	PicoReset();
3e49ffd0	206	}
	207
	208	void PicoMemSetupMS(void)
	209	{
	210	z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
	211	z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
200772b7	212	z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);
3e49ffd0	213
2ec9bec5	214	z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
3e49ffd0	215	z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
	216	z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
	217
	218	#ifdef _USE_DRZ80
	219	drZ80.z80_in = z80_sms_in;
	220	drZ80.z80_out = z80_sms_out;
	221	#endif
	222	#ifdef _USE_CZ80
	223	Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (UINT32)Pico.rom);
	224	Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (UINT32)Pico.zram);
2ec9bec5	225	Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (UINT32)Pico.zram);
3e49ffd0	226	Cz80_Set_INPort(&CZ80, z80_sms_in);
	227	Cz80_Set_OUTPort(&CZ80, z80_sms_out);
	228	#endif
	229	}
	230
	231	void PicoFrameMS(void)
	232	{
2ec9bec5	233	struct PicoVideo *pv = &Pico.video;
	234	int is_pal = Pico.m.pal;
	235	int lines = is_pal ? 313 : 262;
	236	int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
	237	int cycles_done = 0, cycles_aim = 0;
19954be1	238	int skip = PicoSkipFrame;
2ec9bec5	239	int lines_vis = 192;
87b0845f	240	int hint; // Hint counter
2ec9bec5	241	int y;
2ec9bec5	242
200772b7	243	PicoFrameStartMode4();
87b0845f	244	hint = pv->reg[0x0a];
200772b7	245
2ec9bec5	246	for (y = 0; y < lines; y++)
	247	{
	248	pv->v_counter = Pico.m.scanline = y;
	249
19954be1	250	if (y < lines_vis && !skip)
200772b7	251	PicoLineMode4(y);
87b0845f	252
	253	if (y <= lines_vis)
	254	{
	255	if (--hint < 0)
	256	{
	257	hint = pv->reg[0x0a];
	258	pv->pending_ints \|= 2;
	259	if (pv->reg[0] & 0x10) {
	260	elprintf(EL_INTS, "hint");
	261	z80_int();
	262	}
	263	}
	264	}
200772b7	265	else if (y == lines_vis + 1) {
87b0845f	266	pv->pending_ints \|= 1;
87b0845f	267	if (pv->reg[1] & 0x20) {
2ec9bec5	268	elprintf(EL_INTS, "vint");
	269	z80_int();
	270	}
	271	}
	272
	273	cycles_aim += cycles_line;
	274	cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
	275	}
	276
460603fa	277	if (PsndOut)
460603fa	278	PsndGetSamplesMS();
3e49ffd0	279	}
3e49ffd0	280
87b0845f	281	void PicoFrameDrawOnlyMS(void)
	282	{
	283	int lines_vis = 192;
	284	int y;
	285
	286	PicoFrameStartMode4();
	287
	288	for (y = 0; y < lines_vis; y++)
	289	PicoLineMode4(y);
	290	}
	291