[picodrive.git] / pico / sms.c

/*
 * TODO:
 * - start in a state as if BIOS ran
 * - remaining status flags (OVR/COL)
 * - RAM support in mapper
 * - region support
 * - Pause button (NMI)
 * - SN76496 DAC-like usage
 * - H counter
 */
#include "pico_int.h"
#include "memory.h"
#include "sound/sn76496.h"

static unsigned char vdp_data_read(void)
{
  struct PicoVideo *pv = &Pico.video;
  unsigned char d;

  d = Pico.vramb[pv->addr];
  pv->addr = (pv->addr + 1) & 0x3fff;
  pv->pending = 0;
  return d;
}

static unsigned char vdp_ctl_read(void)
{
  unsigned char d = Pico.video.pending_ints << 7;
  Pico.video.pending = 0;
  Pico.video.pending_ints = 0;

  elprintf(EL_SR, "VDP sr: %02x", d);
  return d;
}

static void vdp_data_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->type == 3) {
    Pico.cram[pv->addr & 0x1f] = d;
    Pico.m.dirtyPal = 1;
  } else {
    Pico.vramb[pv->addr] = d;
  }
  pv->addr = (pv->addr + 1) & 0x3fff;

  pv->pending = 0;
}

static void vdp_ctl_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->pending) {
    if ((d >> 6) == 2) {
      pv->reg[d & 0x0f] = pv->addr;
      elprintf(EL_IO, "  VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
    }
    pv->type = d >> 6;
    pv->addr &= 0x00ff;
    pv->addr |= (d & 0x3f) << 8;
  } else {
    pv->addr &= 0x3f00;
    pv->addr |= d;
  }
  pv->pending ^= 1;
}

static unsigned char z80_sms_in(unsigned short a)
{
  unsigned char d = 0;

  elprintf(EL_IO, "z80 port %04x read", a);
  a &= 0xc1;
  switch (a)
  {
    case 0x00:
    case 0x01:
      d = 0xff;
      break;

    case 0x40: /* V counter */
      d = Pico.video.v_counter;
      elprintf(EL_HVCNT, "V counter read: %02x", d);
      break;

    case 0x41: /* H counter */
      d = Pico.m.rotate++;
      elprintf(EL_HVCNT, "H counter read: %02x", d);
      break;

    case 0x80:
      d = vdp_data_read();
      break;

    case 0x81:
      d = vdp_ctl_read();
      break;

    case 0xc0: /* I/O port A and B */
      d = ~((PicoPad[0] & 0x3f) | (PicoPad[1] << 6));
      break;

    case 0xc1: /* I/O port B and miscellaneous */
      d = (Pico.sms_io_ctl & 0x80) | ((Pico.sms_io_ctl << 1) & 0x40) | 0x30;
      d |= ~(PicoPad[1] >> 2) & 0x0f;
      break;
  }

  elprintf(EL_IO, "ret = %02x", d);
  return d;
}

static void z80_sms_out(unsigned short a, unsigned char d)
{
  elprintf(EL_IO, "z80 port %04x write %02x", a, d);
  a &= 0xc1;
  switch (a)
  {
    case 0x01:
      Pico.sms_io_ctl = d;
      break;

    case 0x40:
    case 0x41:
      if (PicoOpt & POPT_EN_PSG)
        SN76496Write(d);
      break;

    case 0x80:
      vdp_data_write(d);
      break;

    case 0x81:
      vdp_ctl_write(d);
      break;
  }
}

static int bank_mask;

static void write_bank(unsigned short a, unsigned char d)
{
  elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
  switch (a & 0x0f)
  {
    case 0x0c:
      elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
      break;
    case 0x0d:
      if (d != 0)
        elprintf(EL_STATUS|EL_ANOMALY, "bank0 changed to %d!", d);
      break;
    case 0x0e:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (UINT32)Pico.rom + (d << 14));
#endif
      break;
    case 0x0f:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (UINT32)Pico.rom + (d << 14));
#endif
      break;
  }
}

static void xwrite(unsigned int a, unsigned char d)
{
  elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
  if (a >= 0xc000)
    Pico.zram[a & 0x1fff] = d;
  if (a >= 0xfff0)
    write_bank(a, d);
}

void PicoResetMS(void)
{
  z80_reset();
  PsndReset(); // pal must be known here
}

void PicoPowerMS(void)
{
  int s, tmp;

  memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
  memset(&Pico.video,0,sizeof(Pico.video));
  memset(&Pico.m,0,sizeof(Pico.m));
  Pico.m.pal = 0;

  // calculate a mask for bank writes.
  // ROM loader has aligned the size for us, so this is safe.
  s = 0; tmp = Pico.romsize;
  while ((tmp >>= 1) != 0)
    s++;
  if (Pico.romsize > (1 << s))
    s++;
  tmp = 1 << s;
  bank_mask = (tmp - 1) >> 14;

  PicoReset();
}

void PicoMemSetupMS(void)
{
  z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
  z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);

  z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
  z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
 
#ifdef _USE_DRZ80
  drZ80.z80_in = z80_sms_in;
  drZ80.z80_out = z80_sms_out;
#endif
#ifdef _USE_CZ80
  Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (UINT32)Pico.rom);
  Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (UINT32)Pico.zram);
  Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (UINT32)Pico.zram);
  Cz80_Set_INPort(&CZ80, z80_sms_in);
  Cz80_Set_OUTPort(&CZ80, z80_sms_out);
#endif
}

void PicoFrameMS(void)
{
  struct PicoVideo *pv = &Pico.video;
  int is_pal = Pico.m.pal;
  int lines = is_pal ? 313 : 262;
  int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
  int cycles_done = 0, cycles_aim = 0;
  int skip = PicoSkipFrame;
  int lines_vis = 192;
  int hint; // Hint counter
  int y;

  PicoFrameStartMode4();
  hint = pv->reg[0x0a];

  for (y = 0; y < lines; y++)
  {
    pv->v_counter = Pico.m.scanline = y;

    if (y < lines_vis && !skip)
      PicoLineMode4(y);

    if (y <= lines_vis)
    {
      if (--hint < 0)
      {
        hint = pv->reg[0x0a];
        pv->pending_ints |= 2;
        if (pv->reg[0] & 0x10) {
          elprintf(EL_INTS, "hint");
          z80_int();
        }
      }
    }
    else if (y == lines_vis + 1) {
      pv->pending_ints |= 1;
      if (pv->reg[1] & 0x20) {
        elprintf(EL_INTS, "vint");
        z80_int();
      }
    }

    cycles_aim += cycles_line;
    cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
  }

  if (PsndOut)
    PsndGetSamplesMS();
}

void PicoFrameDrawOnlyMS(void)
{
  int lines_vis = 192;
  int y;

  PicoFrameStartMode4();

  for (y = 0; y < lines_vis; y++)
    PicoLineMode4(y);
}
Commit	Line	Data
87b0845f	1	/*
	2	* TODO:
	3	* - start in a state as if BIOS ran
	4	* - remaining status flags (OVR/COL)
	5	* - RAM support in mapper
	6	* - region support
	7	* - Pause button (NMI)
	8	* - SN76496 DAC-like usage
	9	* - H counter
	10	*/
3e49ffd0	11	#include "pico_int.h"
af37bca8	12	#include "memory.h"
2ec9bec5	13	#include "sound/sn76496.h"
3e49ffd0	14
2ec9bec5	15	static unsigned char vdp_data_read(void)
3e49ffd0	16	{
2ec9bec5	17	struct PicoVideo *pv = &Pico.video;
	18	unsigned char d;
	19
	20	d = Pico.vramb[pv->addr];
	21	pv->addr = (pv->addr + 1) & 0x3fff;
	22	pv->pending = 0;
	23	return d;
	24	}
	25
	26	static unsigned char vdp_ctl_read(void)
	27	{
	28	unsigned char d = Pico.video.pending_ints << 7;
	29	Pico.video.pending = 0;
	30	Pico.video.pending_ints = 0;
	31
	32	elprintf(EL_SR, "VDP sr: %02x", d);
	33	return d;
	34	}
	35
	36	static void vdp_data_write(unsigned char d)
	37	{
	38	struct PicoVideo *pv = &Pico.video;
	39
	40	if (pv->type == 3) {
	41	Pico.cram[pv->addr & 0x1f] = d;
200772b7	42	Pico.m.dirtyPal = 1;
2ec9bec5	43	} else {
	44	Pico.vramb[pv->addr] = d;
	45	}
	46	pv->addr = (pv->addr + 1) & 0x3fff;
2ec9bec5	47
	48	pv->pending = 0;
	49	}
	50
	51	static void vdp_ctl_write(unsigned char d)
	52	{
	53	struct PicoVideo *pv = &Pico.video;
	54
	55	if (pv->pending) {
	56	if ((d >> 6) == 2) {
	57	pv->reg[d & 0x0f] = pv->addr;
200772b7	58	elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
2ec9bec5	59	}
	60	pv->type = d >> 6;
	61	pv->addr &= 0x00ff;
	62	pv->addr \|= (d & 0x3f) << 8;
	63	} else {
	64	pv->addr &= 0x3f00;
	65	pv->addr \|= d;
	66	}
	67	pv->pending ^= 1;
3e49ffd0	68	}
3e49ffd0	69
2ec9bec5	70	static unsigned char z80_sms_in(unsigned short a)
3e49ffd0	71	{
2ec9bec5	72	unsigned char d = 0;
2ec9bec5	73
200772b7	74	elprintf(EL_IO, "z80 port %04x read", a);
2ec9bec5	75	a &= 0xc1;
	76	switch (a)
	77	{
	78	case 0x00:
	79	case 0x01:
	80	d = 0xff;
	81	break;
	82
	83	case 0x40: /* V counter */
	84	d = Pico.video.v_counter;
87b0845f	85	elprintf(EL_HVCNT, "V counter read: %02x", d);
2ec9bec5	86	break;
	87
	88	case 0x41: /* H counter */
	89	d = Pico.m.rotate++;
87b0845f	90	elprintf(EL_HVCNT, "H counter read: %02x", d);
2ec9bec5	91	break;
	92
	93	case 0x80:
	94	d = vdp_data_read();
	95	break;
	96
	97	case 0x81:
	98	d = vdp_ctl_read();
	99	break;
	100
	101	case 0xc0: /* I/O port A and B */
	102	d = ~((PicoPad[0] & 0x3f) \| (PicoPad[1] << 6));
	103	break;
	104
	105	case 0xc1: /* I/O port B and miscellaneous */
	106	d = (Pico.sms_io_ctl & 0x80) \| ((Pico.sms_io_ctl << 1) & 0x40) \| 0x30;
	107	d \|= ~(PicoPad[1] >> 2) & 0x0f;
	108	break;
	109	}
	110
200772b7	111	elprintf(EL_IO, "ret = %02x", d);
2ec9bec5	112	return d;
	113	}
	114
	115	static void z80_sms_out(unsigned short a, unsigned char d)
	116	{
200772b7	117	elprintf(EL_IO, "z80 port %04x write %02x", a, d);
2ec9bec5	118	a &= 0xc1;
	119	switch (a)
	120	{
	121	case 0x01:
	122	Pico.sms_io_ctl = d;
	123	break;
	124
	125	case 0x40:
	126	case 0x41:
	127	if (PicoOpt & POPT_EN_PSG)
	128	SN76496Write(d);
	129	break;
	130
	131	case 0x80:
	132	vdp_data_write(d);
	133	break;
	134
	135	case 0x81:
	136	vdp_ctl_write(d);
	137	break;
	138	}
	139	}
	140
87b0845f	141	static int bank_mask;
87b0845f	142
2ec9bec5	143	static void write_bank(unsigned short a, unsigned char d)
2ec9bec5	144	{
460603fa	145	elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
2ec9bec5	146	switch (a & 0x0f)
	147	{
	148	case 0x0c:
87b0845f	149	elprintf(EL_STATUS\|EL_ANOMALY, "%02x written to control reg!", d);
2ec9bec5	150	break;
	151	case 0x0d:
	152	if (d != 0)
	153	elprintf(EL_STATUS\|EL_ANOMALY, "bank0 changed to %d!", d);
	154	break;
	155	case 0x0e:
87b0845f	156	d &= bank_mask;
2ec9bec5	157	z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
	158	#ifdef _USE_CZ80
	159	Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (UINT32)Pico.rom + (d << 14));
	160	#endif
	161	break;
	162	case 0x0f:
87b0845f	163	d &= bank_mask;
2ec9bec5	164	z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
	165	#ifdef _USE_CZ80
	166	Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (UINT32)Pico.rom + (d << 14));
	167	#endif
	168	break;
	169	}
3e49ffd0	170	}
3e49ffd0	171
553c3eaa	172	static void xwrite(unsigned int a, unsigned char d)
2ec9bec5	173	{
200772b7	174	elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
2ec9bec5	175	if (a >= 0xc000)
	176	Pico.zram[a & 0x1fff] = d;
	177	if (a >= 0xfff0)
	178	write_bank(a, d);
3e49ffd0	179	}
3e49ffd0	180
2ec9bec5	181	void PicoResetMS(void)
3e49ffd0	182	{
2ec9bec5	183	z80_reset();
2ec9bec5	184	PsndReset(); // pal must be known here
3e49ffd0	185	}
	186
	187	void PicoPowerMS(void)
	188	{
87b0845f	189	int s, tmp;
87b0845f	190
2ec9bec5	191	memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
	192	memset(&Pico.video,0,sizeof(Pico.video));
	193	memset(&Pico.m,0,sizeof(Pico.m));
	194	Pico.m.pal = 0;
	195
87b0845f	196	// calculate a mask for bank writes.
	197	// ROM loader has aligned the size for us, so this is safe.
	198	s = 0; tmp = Pico.romsize;
	199	while ((tmp >>= 1) != 0)
	200	s++;
	201	if (Pico.romsize > (1 << s))
	202	s++;
	203	tmp = 1 << s;
	204	bank_mask = (tmp - 1) >> 14;
	205
2ec9bec5	206	PicoReset();
3e49ffd0	207	}
	208
	209	void PicoMemSetupMS(void)
	210	{
	211	z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
	212	z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
200772b7	213	z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);
3e49ffd0	214
2ec9bec5	215	z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
3e49ffd0	216	z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
	217	z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
	218
	219	#ifdef _USE_DRZ80
	220	drZ80.z80_in = z80_sms_in;
	221	drZ80.z80_out = z80_sms_out;
	222	#endif
	223	#ifdef _USE_CZ80
	224	Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (UINT32)Pico.rom);
	225	Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (UINT32)Pico.zram);
2ec9bec5	226	Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (UINT32)Pico.zram);
3e49ffd0	227	Cz80_Set_INPort(&CZ80, z80_sms_in);
	228	Cz80_Set_OUTPort(&CZ80, z80_sms_out);
	229	#endif
	230	}
	231
	232	void PicoFrameMS(void)
	233	{
2ec9bec5	234	struct PicoVideo *pv = &Pico.video;
	235	int is_pal = Pico.m.pal;
	236	int lines = is_pal ? 313 : 262;
	237	int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
	238	int cycles_done = 0, cycles_aim = 0;
19954be1	239	int skip = PicoSkipFrame;
2ec9bec5	240	int lines_vis = 192;
87b0845f	241	int hint; // Hint counter
2ec9bec5	242	int y;
2ec9bec5	243
200772b7	244	PicoFrameStartMode4();
87b0845f	245	hint = pv->reg[0x0a];
200772b7	246
2ec9bec5	247	for (y = 0; y < lines; y++)
	248	{
	249	pv->v_counter = Pico.m.scanline = y;
	250
19954be1	251	if (y < lines_vis && !skip)
200772b7	252	PicoLineMode4(y);
87b0845f	253
	254	if (y <= lines_vis)
	255	{
	256	if (--hint < 0)
	257	{
	258	hint = pv->reg[0x0a];
	259	pv->pending_ints \|= 2;
	260	if (pv->reg[0] & 0x10) {
	261	elprintf(EL_INTS, "hint");
	262	z80_int();
	263	}
	264	}
	265	}
200772b7	266	else if (y == lines_vis + 1) {
87b0845f	267	pv->pending_ints \|= 1;
87b0845f	268	if (pv->reg[1] & 0x20) {
2ec9bec5	269	elprintf(EL_INTS, "vint");
	270	z80_int();
	271	}
	272	}
	273
	274	cycles_aim += cycles_line;
	275	cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
	276	}
	277
460603fa	278	if (PsndOut)
460603fa	279	PsndGetSamplesMS();
3e49ffd0	280	}
3e49ffd0	281
87b0845f	282	void PicoFrameDrawOnlyMS(void)
	283	{
	284	int lines_vis = 192;
	285	int y;
	286
	287	PicoFrameStartMode4();
	288
	289	for (y = 0; y < lines_vis; y++)
	290	PicoLineMode4(y);
	291	}
	292