[picodrive.git] / pico / sms.c

/*
 * SMS emulation
 * (C) notaz, 2009-2010
 *
 * This work is licensed under the terms of MAME license.
 * See COPYING file in the top-level directory.
 */
/*
 * TODO:
 * - start in a state as if BIOS ran
 * - remaining status flags (OVR/COL)
 * - RAM support in mapper
 * - region support
 * - Pause button (NMI)
 * - SN76496 DAC-like usage
 * - H counter
 */
#include "pico_int.h"
#include "memory.h"
#include "sound/sn76496.h"

static unsigned char vdp_data_read(void)
{
  struct PicoVideo *pv = &Pico.video;
  unsigned char d;

  d = Pico.vramb[pv->addr];
  pv->addr = (pv->addr + 1) & 0x3fff;
  pv->pending = 0;
  return d;
}

static unsigned char vdp_ctl_read(void)
{
  unsigned char d = Pico.video.pending_ints << 7;
  Pico.video.pending = 0;
  Pico.video.pending_ints = 0;

  elprintf(EL_SR, "VDP sr: %02x", d);
  return d;
}

static void vdp_data_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->type == 3) {
    Pico.cram[pv->addr & 0x1f] = d;
    Pico.m.dirtyPal = 1;
  } else {
    Pico.vramb[pv->addr] = d;
  }
  pv->addr = (pv->addr + 1) & 0x3fff;

  pv->pending = 0;
}

static void vdp_ctl_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->pending) {
    if ((d >> 6) == 2) {
      pv->reg[d & 0x0f] = pv->addr;
      elprintf(EL_IO, "  VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
    }
    pv->type = d >> 6;
    pv->addr &= 0x00ff;
    pv->addr |= (d & 0x3f) << 8;
  } else {
    pv->addr &= 0x3f00;
    pv->addr |= d;
  }
  pv->pending ^= 1;
}

static unsigned char z80_sms_in(unsigned short a)
{
  unsigned char d = 0;

  elprintf(EL_IO, "z80 port %04x read", a);
  a &= 0xc1;
  switch (a)
  {
    case 0x00:
    case 0x01:
      d = 0xff;
      break;

    case 0x40: /* V counter */
      d = Pico.video.v_counter;
      elprintf(EL_HVCNT, "V counter read: %02x", d);
      break;

    case 0x41: /* H counter */
      d = Pico.m.rotate++;
      elprintf(EL_HVCNT, "H counter read: %02x", d);
      break;

    case 0x80:
      d = vdp_data_read();
      break;

    case 0x81:
      d = vdp_ctl_read();
      break;

    case 0xc0: /* I/O port A and B */
      d = ~((PicoPad[0] & 0x3f) | (PicoPad[1] << 6));
      break;

    case 0xc1: /* I/O port B and miscellaneous */
      d = (Pico.ms.io_ctl & 0x80) | ((Pico.ms.io_ctl << 1) & 0x40) | 0x30;
      d |= ~(PicoPad[1] >> 2) & 0x0f;
      break;
  }

  elprintf(EL_IO, "ret = %02x", d);
  return d;
}

static void z80_sms_out(unsigned short a, unsigned char d)
{
  elprintf(EL_IO, "z80 port %04x write %02x", a, d);
  a &= 0xc1;
  switch (a)
  {
    case 0x01:
      Pico.ms.io_ctl = d;
      break;

    case 0x40:
    case 0x41:
      if (PicoOpt & POPT_EN_PSG)
        SN76496Write(d);
      break;

    case 0x80:
      vdp_data_write(d);
      break;

    case 0x81:
      vdp_ctl_write(d);
      break;
  }
}

static int bank_mask;

static void write_bank(unsigned short a, unsigned char d)
{
  elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
  switch (a & 0x0f)
  {
    case 0x0c:
      elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
      break;
    case 0x0d:
      if (d != 0)
        elprintf(EL_STATUS|EL_ANOMALY, "bank0 changed to %d!", d);
      break;
    case 0x0e:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (FPTR)Pico.rom + (d << 14));
#endif
      break;
    case 0x0f:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (FPTR)Pico.rom + (d << 14));
#endif
      break;
  }
  Pico.ms.carthw[a & 0x0f] = d;
}

static void xwrite(unsigned int a, unsigned char d)
{
  elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
  if (a >= 0xc000)
    Pico.zram[a & 0x1fff] = d;
  if (a >= 0xfff8)
    write_bank(a, d);
}

void PicoResetMS(void)
{
  z80_reset();
  PsndReset(); // pal must be known here
}

void PicoPowerMS(void)
{
  int s, tmp;

  memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);
  memset(&Pico.video,0,sizeof(Pico.video));
  memset(&Pico.m,0,sizeof(Pico.m));
  Pico.m.pal = 0;

  // calculate a mask for bank writes.
  // ROM loader has aligned the size for us, so this is safe.
  s = 0; tmp = Pico.romsize;
  while ((tmp >>= 1) != 0)
    s++;
  if (Pico.romsize > (1 << s))
    s++;
  tmp = 1 << s;
  bank_mask = (tmp - 1) >> 14;

  Pico.ms.carthw[0x0e] = 1;
  Pico.ms.carthw[0x0f] = 2;

  PicoReset();
}

void PicoMemSetupMS(void)
{
  z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
  z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);

  z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
  z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
  z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
 
#ifdef _USE_DRZ80
  drZ80.z80_in = z80_sms_in;
  drZ80.z80_out = z80_sms_out;
#endif
#ifdef _USE_CZ80
  Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (FPTR)Pico.rom);
  Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (FPTR)Pico.zram);
  Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (FPTR)Pico.zram);
  Cz80_Set_INPort(&CZ80, z80_sms_in);
  Cz80_Set_OUTPort(&CZ80, z80_sms_out);
#endif
}

void PicoStateLoadedMS(void)
{
  write_bank(0xfffe, Pico.ms.carthw[0x0e]);
  write_bank(0xffff, Pico.ms.carthw[0x0f]);
}

void PicoFrameMS(void)
{
  struct PicoVideo *pv = &Pico.video;
  int is_pal = Pico.m.pal;
  int lines = is_pal ? 313 : 262;
  int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
  int cycles_done = 0, cycles_aim = 0;
  int skip = PicoSkipFrame;
  int lines_vis = 192;
  int hint; // Hint counter
  int y;

  PicoFrameStartMode4();
  hint = pv->reg[0x0a];

  for (y = 0; y < lines; y++)
  {
    pv->v_counter = Pico.m.scanline = y;
    if (y > 218)
      pv->v_counter = y - 6;

    if (y < lines_vis && !skip)
      PicoLineMode4(y);

    if (y <= lines_vis)
    {
      if (--hint < 0)
      {
        hint = pv->reg[0x0a];
        pv->pending_ints |= 2;
        if (pv->reg[0] & 0x10) {
          elprintf(EL_INTS, "hint");
          z80_int();
        }
      }
    }
    else if (y == lines_vis + 1) {
      pv->pending_ints |= 1;
      if (pv->reg[1] & 0x20) {
        elprintf(EL_INTS, "vint");
        z80_int();
      }
    }

    cycles_aim += cycles_line;
    cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
  }

  if (PsndOut)
    PsndGetSamplesMS();
}

void PicoFrameDrawOnlyMS(void)
{
  int lines_vis = 192;
  int y;

  PicoFrameStartMode4();

  for (y = 0; y < lines_vis; y++)
    PicoLineMode4(y);
}
Commit	Line	Data
cff531af	1	/*
	2	* SMS emulation
	3	* (C) notaz, 2009-2010
	4	*
	5	* This work is licensed under the terms of MAME license.
	6	* See COPYING file in the top-level directory.
	7	*/
87b0845f	8	/*
	9	* TODO:
	10	* - start in a state as if BIOS ran
	11	* - remaining status flags (OVR/COL)
	12	* - RAM support in mapper
	13	* - region support
	14	* - Pause button (NMI)
	15	* - SN76496 DAC-like usage
	16	* - H counter
	17	*/
3e49ffd0	18	#include "pico_int.h"
af37bca8	19	#include "memory.h"
2ec9bec5	20	#include "sound/sn76496.h"
3e49ffd0	21
2ec9bec5	22	static unsigned char vdp_data_read(void)
3e49ffd0	23	{
2ec9bec5	24	struct PicoVideo *pv = &Pico.video;
	25	unsigned char d;
	26
	27	d = Pico.vramb[pv->addr];
	28	pv->addr = (pv->addr + 1) & 0x3fff;
	29	pv->pending = 0;
	30	return d;
	31	}
	32
	33	static unsigned char vdp_ctl_read(void)
	34	{
	35	unsigned char d = Pico.video.pending_ints << 7;
	36	Pico.video.pending = 0;
	37	Pico.video.pending_ints = 0;
	38
	39	elprintf(EL_SR, "VDP sr: %02x", d);
	40	return d;
	41	}
	42
	43	static void vdp_data_write(unsigned char d)
	44	{
	45	struct PicoVideo *pv = &Pico.video;
	46
	47	if (pv->type == 3) {
	48	Pico.cram[pv->addr & 0x1f] = d;
200772b7	49	Pico.m.dirtyPal = 1;
2ec9bec5	50	} else {
	51	Pico.vramb[pv->addr] = d;
	52	}
	53	pv->addr = (pv->addr + 1) & 0x3fff;
2ec9bec5	54
	55	pv->pending = 0;
	56	}
	57
	58	static void vdp_ctl_write(unsigned char d)
	59	{
	60	struct PicoVideo *pv = &Pico.video;
	61
	62	if (pv->pending) {
	63	if ((d >> 6) == 2) {
	64	pv->reg[d & 0x0f] = pv->addr;
200772b7	65	elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
2ec9bec5	66	}
	67	pv->type = d >> 6;
	68	pv->addr &= 0x00ff;
	69	pv->addr \|= (d & 0x3f) << 8;
	70	} else {
	71	pv->addr &= 0x3f00;
	72	pv->addr \|= d;
	73	}
	74	pv->pending ^= 1;
3e49ffd0	75	}
3e49ffd0	76
2ec9bec5	77	static unsigned char z80_sms_in(unsigned short a)
3e49ffd0	78	{
2ec9bec5	79	unsigned char d = 0;
2ec9bec5	80
200772b7	81	elprintf(EL_IO, "z80 port %04x read", a);
2ec9bec5	82	a &= 0xc1;
	83	switch (a)
	84	{
	85	case 0x00:
	86	case 0x01:
	87	d = 0xff;
	88	break;
	89
	90	case 0x40: /* V counter */
	91	d = Pico.video.v_counter;
87b0845f	92	elprintf(EL_HVCNT, "V counter read: %02x", d);
2ec9bec5	93	break;
	94
	95	case 0x41: /* H counter */
	96	d = Pico.m.rotate++;
87b0845f	97	elprintf(EL_HVCNT, "H counter read: %02x", d);
2ec9bec5	98	break;
	99
	100	case 0x80:
	101	d = vdp_data_read();
	102	break;
	103
	104	case 0x81:
	105	d = vdp_ctl_read();
	106	break;
	107
	108	case 0xc0: /* I/O port A and B */
	109	d = ~((PicoPad[0] & 0x3f) \| (PicoPad[1] << 6));
	110	break;
	111
	112	case 0xc1: /* I/O port B and miscellaneous */
b4db550e	113	d = (Pico.ms.io_ctl & 0x80) \| ((Pico.ms.io_ctl << 1) & 0x40) \| 0x30;
2ec9bec5	114	d \|= ~(PicoPad[1] >> 2) & 0x0f;
	115	break;
	116	}
	117
200772b7	118	elprintf(EL_IO, "ret = %02x", d);
2ec9bec5	119	return d;
	120	}
	121
	122	static void z80_sms_out(unsigned short a, unsigned char d)
	123	{
200772b7	124	elprintf(EL_IO, "z80 port %04x write %02x", a, d);
2ec9bec5	125	a &= 0xc1;
	126	switch (a)
	127	{
	128	case 0x01:
b4db550e	129	Pico.ms.io_ctl = d;
2ec9bec5	130	break;
	131
	132	case 0x40:
	133	case 0x41:
	134	if (PicoOpt & POPT_EN_PSG)
	135	SN76496Write(d);
	136	break;
	137
	138	case 0x80:
	139	vdp_data_write(d);
	140	break;
	141
	142	case 0x81:
	143	vdp_ctl_write(d);
	144	break;
	145	}
	146	}
	147
87b0845f	148	static int bank_mask;
87b0845f	149
2ec9bec5	150	static void write_bank(unsigned short a, unsigned char d)
2ec9bec5	151	{
460603fa	152	elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
2ec9bec5	153	switch (a & 0x0f)
	154	{
	155	case 0x0c:
87b0845f	156	elprintf(EL_STATUS\|EL_ANOMALY, "%02x written to control reg!", d);
2ec9bec5	157	break;
	158	case 0x0d:
	159	if (d != 0)
	160	elprintf(EL_STATUS\|EL_ANOMALY, "bank0 changed to %d!", d);
	161	break;
	162	case 0x0e:
87b0845f	163	d &= bank_mask;
2ec9bec5	164	z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
2ec9bec5	165	#ifdef _USE_CZ80
b8a1c09a	166	Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (FPTR)Pico.rom + (d << 14));
2ec9bec5	167	#endif
	168	break;
	169	case 0x0f:
87b0845f	170	d &= bank_mask;
2ec9bec5	171	z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
2ec9bec5	172	#ifdef _USE_CZ80
b8a1c09a	173	Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (FPTR)Pico.rom + (d << 14));
2ec9bec5	174	#endif
	175	break;
	176	}
b4db550e	177	Pico.ms.carthw[a & 0x0f] = d;
3e49ffd0	178	}
3e49ffd0	179
553c3eaa	180	static void xwrite(unsigned int a, unsigned char d)
2ec9bec5	181	{
200772b7	182	elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
2ec9bec5	183	if (a >= 0xc000)
2ec9bec5	184	Pico.zram[a & 0x1fff] = d;
b4db550e	185	if (a >= 0xfff8)
2ec9bec5	186	write_bank(a, d);
3e49ffd0	187	}
3e49ffd0	188
2ec9bec5	189	void PicoResetMS(void)
3e49ffd0	190	{
2ec9bec5	191	z80_reset();
2ec9bec5	192	PsndReset(); // pal must be known here
3e49ffd0	193	}
	194
	195	void PicoPowerMS(void)
	196	{
87b0845f	197	int s, tmp;
87b0845f	198
b8a1c09a	199	memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);
2ec9bec5	200	memset(&Pico.video,0,sizeof(Pico.video));
	201	memset(&Pico.m,0,sizeof(Pico.m));
	202	Pico.m.pal = 0;
	203
87b0845f	204	// calculate a mask for bank writes.
	205	// ROM loader has aligned the size for us, so this is safe.
	206	s = 0; tmp = Pico.romsize;
	207	while ((tmp >>= 1) != 0)
	208	s++;
	209	if (Pico.romsize > (1 << s))
	210	s++;
	211	tmp = 1 << s;
	212	bank_mask = (tmp - 1) >> 14;
	213
b4db550e	214	Pico.ms.carthw[0x0e] = 1;
	215	Pico.ms.carthw[0x0f] = 2;
	216
2ec9bec5	217	PicoReset();
3e49ffd0	218	}
	219
	220	void PicoMemSetupMS(void)
	221	{
	222	z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
	223	z80_map_set(z80_read_map, 0xc000, 0xdfff, Pico.zram, 0);
200772b7	224	z80_map_set(z80_read_map, 0xe000, 0xffff, Pico.zram, 0);
3e49ffd0	225
2ec9bec5	226	z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
3e49ffd0	227	z80_map_set(z80_write_map, 0xc000, 0xdfff, Pico.zram, 0);
	228	z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
	229
	230	#ifdef _USE_DRZ80
	231	drZ80.z80_in = z80_sms_in;
	232	drZ80.z80_out = z80_sms_out;
	233	#endif
	234	#ifdef _USE_CZ80
b8a1c09a	235	Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (FPTR)Pico.rom);
	236	Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (FPTR)Pico.zram);
	237	Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (FPTR)Pico.zram);
3e49ffd0	238	Cz80_Set_INPort(&CZ80, z80_sms_in);
	239	Cz80_Set_OUTPort(&CZ80, z80_sms_out);
	240	#endif
	241	}
	242
b4db550e	243	void PicoStateLoadedMS(void)
	244	{
	245	write_bank(0xfffe, Pico.ms.carthw[0x0e]);
	246	write_bank(0xffff, Pico.ms.carthw[0x0f]);
	247	}
	248
3e49ffd0	249	void PicoFrameMS(void)
3e49ffd0	250	{
2ec9bec5	251	struct PicoVideo *pv = &Pico.video;
	252	int is_pal = Pico.m.pal;
	253	int lines = is_pal ? 313 : 262;
	254	int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
	255	int cycles_done = 0, cycles_aim = 0;
19954be1	256	int skip = PicoSkipFrame;
2ec9bec5	257	int lines_vis = 192;
87b0845f	258	int hint; // Hint counter
2ec9bec5	259	int y;
2ec9bec5	260
200772b7	261	PicoFrameStartMode4();
87b0845f	262	hint = pv->reg[0x0a];
200772b7	263
2ec9bec5	264	for (y = 0; y < lines; y++)
	265	{
	266	pv->v_counter = Pico.m.scanline = y;
03065bb6	267	if (y > 218)
03065bb6	268	pv->v_counter = y - 6;
2ec9bec5	269
19954be1	270	if (y < lines_vis && !skip)
200772b7	271	PicoLineMode4(y);
87b0845f	272
	273	if (y <= lines_vis)
	274	{
	275	if (--hint < 0)
	276	{
	277	hint = pv->reg[0x0a];
	278	pv->pending_ints \|= 2;
	279	if (pv->reg[0] & 0x10) {
	280	elprintf(EL_INTS, "hint");
	281	z80_int();
	282	}
	283	}
	284	}
200772b7	285	else if (y == lines_vis + 1) {
87b0845f	286	pv->pending_ints \|= 1;
87b0845f	287	if (pv->reg[1] & 0x20) {
2ec9bec5	288	elprintf(EL_INTS, "vint");
	289	z80_int();
	290	}
	291	}
	292
	293	cycles_aim += cycles_line;
	294	cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
	295	}
	296
460603fa	297	if (PsndOut)
460603fa	298	PsndGetSamplesMS();
3e49ffd0	299	}
3e49ffd0	300
87b0845f	301	void PicoFrameDrawOnlyMS(void)
	302	{
	303	int lines_vis = 192;
	304	int y;
	305
	306	PicoFrameStartMode4();
	307
	308	for (y = 0; y < lines_vis; y++)
	309	PicoLineMode4(y);
	310	}
	311