[picodrive.git] / pico / pico.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2010\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#include "sound/ym2612.h"\r
\r
struct Pico Pico;\r
int PicoOpt;     \r
int PicoSkipFrame;          // skip rendering frame?\r
int PicoPad[2];             // Joypads, format is MXYZ SACB RLDU\r
int PicoPadInt[2];          // internal copy\r
int PicoAHW;                // active addon hardware: PAHW_*\r
int PicoQuirks;             // game-specific quirks\r
int PicoRegionOverride;     // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
int PicoRegionFPSOverride;  // override the refresh rate of the region 0: Auto, 1: NTSC, 2: PAL\r
int PicoAutoRgnOrder;\r
\r
struct PicoSRAM SRam;\r
int emustatus;         // rapid_ym2612, multi_ym_updates\r
int scanlines_total;\r
\r
void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
void (*PicoResetHook)(void) = NULL;\r
void (*PicoLineHook)(void) = NULL;\r
\r
// to be called once on emu init\r
void PicoInit(void)\r
{\r
  // Blank space for state:\r
  memset(&Pico,0,sizeof(Pico));\r
  memset(&PicoPad,0,sizeof(PicoPad));\r
  memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
\r
  Pico.est.Pico_video = &Pico.video;\r
  Pico.est.Pico_vram = Pico.vram;\r
  Pico.est.PicoOpt = &PicoOpt;\r
\r
  // Init CPUs:\r
  SekInit();\r
  z80_init(); // init even if we aren't going to use it\r
\r
  PicoInitMCD();\r
  PicoSVPInit();\r
  Pico32xInit();\r
\r
  PicoDrawInit();\r
}\r
\r
// to be called once on emu exit\r
void PicoExit(void)\r
{\r
  if (PicoAHW & PAHW_MCD)\r
    PicoExitMCD();\r
  PicoCartUnload();\r
  z80_exit();\r
\r
  if (SRam.data)\r
    free(SRam.data);\r
  pevt_dump();\r
}\r
\r
void PicoPower(void)\r
{\r
  Pico.m.frame_count = 0;\r
  SekCycleCnt = SekCycleAim = 0;\r
\r
  // clear all memory of the emulated machine\r
  memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
\r
  memset(&Pico.video,0,sizeof(Pico.video));\r
  memset(&Pico.m,0,sizeof(Pico.m));\r
\r
  Pico.video.pending_ints=0;\r
  z80_reset();\r
\r
  // my MD1 VA6 console has this in IO\r
  Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
\r
  // default VDP register values (based on Fusion)\r
  Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
  Pico.video.reg[0xc] = 0x81;\r
  Pico.video.reg[0xf] = 0x02;\r
\r
  if (PicoAHW & PAHW_MCD)\r
    PicoPowerMCD();\r
\r
  if (PicoOpt & POPT_EN_32X)\r
    PicoPower32x();\r
\r
  PicoReset();\r
}\r
\r
PICO_INTERNAL void PicoDetectRegion(void)\r
{\r
  // PicoDetectRegion not ready yet\r
  if (Pico.romsize <= 0)\r
    return;\r
\r
  int support=0, hw=0, i;\r
  unsigned char pal=0;\r
\r
  if (PicoRegionOverride)\r
  {\r
    support = PicoRegionOverride;\r
  }\r
  else\r
  {\r
    // Read cartridge region data:\r
    unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
    int region = (rd[0] << 16) | rd[1];\r
\r
    for (i = 0; i < 4; i++)\r
    {\r
      int c;\r
\r
      c = region >> (i<<3);\r
      c &= 0xff;\r
      if (c <= ' ') continue;\r
\r
           if (c=='J')  support|=1;\r
      else if (c=='U')  support|=4;\r
      else if (c=='E')  support|=8;\r
      else if (c=='j') {support|=1; break; }\r
      else if (c=='u') {support|=4; break; }\r
      else if (c=='e') {support|=8; break; }\r
      else\r
      {\r
        // New style code:\r
        char s[2]={0,0};\r
        s[0]=(char)c;\r
        support|=strtol(s,NULL,16);\r
      }\r
    }\r
  }\r
\r
  // auto detection order override\r
  if (PicoAutoRgnOrder) {\r
         if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
    else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
    else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
  }\r
\r
  // Try to pick the best hardware value for English/50hz:\r
       if (support&8) { hw=0xc0; pal=1; } // Europe\r
  else if (support&4)   hw=0x80;          // USA\r
  else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
  else if (support&1)   hw=0x00;          // Japan NTSC\r
  else hw=0x80; // USA\r
\r
  Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
\r
  if (PicoRegionFPSOverride > 0)\r
    pal = PicoRegionFPSOverride - 1; // pal - 0: NTSC, 1: PAL | PicoRegionFPSOverride - 0: Auto, 1: NTSC, 2: PAL\r
    \r
  Pico.m.pal=pal;\r
}\r
\r
int PicoReset(void)\r
{\r
  if (Pico.romsize <= 0)\r
    return 1;\r
\r
#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
  PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
#endif\r
\r
  /* must call now, so that banking is reset, and correct vectors get fetched */\r
  if (PicoResetHook)\r
    PicoResetHook();\r
\r
  memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
  emustatus = 0;\r
\r
  if (PicoAHW & PAHW_SMS) {\r
    PicoResetMS();\r
    return 0;\r
  }\r
\r
  SekReset();\r
  // ..but do not reset SekCycle* to not desync with addons\r
\r
  // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
  SekSetRealTAS(PicoAHW & PAHW_MCD);\r
\r
  Pico.m.dirtyPal = 1;\r
\r
  Pico.m.z80_bank68k = 0;\r
  Pico.m.z80_reset = 1;\r
\r
  PicoDetectRegion();\r
  Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
\r
  PsndReset(); // pal must be known here\r
\r
  // create an empty "dma" to cause 68k exec start at random frame location\r
  if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
    Pico.m.dma_xfers = rand() & 0x1fff;\r
\r
  SekFinishIdleDet();\r
\r
  if (PicoAHW & PAHW_MCD) {\r
    PicoResetMCD();\r
    return 0;\r
  }\r
\r
  // reinit, so that checksum checks pass\r
  if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
    SekInitIdleDet();\r
\r
  if (PicoOpt & POPT_EN_32X)\r
    PicoReset32x();\r
\r
  // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
  Pico.m.sram_reg = 0;\r
  if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
    Pico.m.sram_reg |= SRR_MAPPED;\r
\r
  if (SRam.flags & SRF_ENABLED)\r
    elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
      !!(SRam.flags & SRF_EEPROM));\r
\r
  return 0;\r
}\r
\r
// flush config changes before emu loop starts\r
void PicoLoopPrepare(void)\r
{\r
  if (PicoRegionFPSOverride) // PicoRegionFPSOverride is proprietary on PicoRegionOverride\r
  {\r
    // force setting possibly changed..\r
    Pico.m.pal = PicoRegionFPSOverride - 1; // Pico.m.pal - 0: NTSC, 1: PAL | PicoRegionFPSOverride - 0: Auto, 1: NTSC, 2: PAL\r
  }\r
  else if (PicoRegionOverride)\r
  {\r
    // force setting possibly changed..\r
    Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
  }\r
\r
  // FIXME: PAL has 313 scanlines..\r
  scanlines_total = Pico.m.pal ? 312 : 262;\r
\r
  Pico.m.dirtyPal = 1;\r
  rendstatus_old = -1;\r
}\r
\r
\r
// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
// same for Outrunners (92-121, when active is set to 24)\r
// 96 is VR hack\r
static const int dma_timings[] = {\r
  167, 167, 166,  83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
  102, 205, 204, 102, // vblank: 40cell:\r
  16,   16,  15,   8, // active: 32cell:\r
  24,   18,  17,   9  // ...\r
};\r
\r
static const int dma_bsycles[] = {\r
  (488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
  (488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,\r
  (488<<8)/16,  (488<<8)/16,  (488<<8)/15,  (488<<8)/8,\r
  (488<<8)/24,  (488<<8)/18,  (488<<8)/17,  (488<<8)/9\r
};\r
\r
// grossly inaccurate.. FIXME FIXXXMEE\r
PICO_INTERNAL int CheckDMA(void)\r
{\r
  int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
  int xfers = Pico.m.dma_xfers;\r
  int dma_op1;\r
\r
  if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
  dma_op1 = dma_op;\r
  if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
  if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
  xfers_can = dma_timings[dma_op];\r
  if(xfers <= xfers_can)\r
  {\r
    if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
    else {\r
      burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
    }\r
    Pico.m.dma_xfers = 0;\r
  } else {\r
    if(!(dma_op&2)) burn = 488;\r
    Pico.m.dma_xfers -= xfers_can;\r
  }\r
\r
  elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
  //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
  return burn;\r
}\r
\r
#include "pico_cmn.c"\r
\r
unsigned int last_z80_sync; /* in 68k cycles */\r
int z80_cycle_cnt;\r
int z80_cycle_aim;\r
int z80_scanline;\r
int z80_scanline_cycles;  /* cycles done until z80_scanline */\r
\r
/* sync z80 to 68k */\r
PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
{\r
  int m68k_cnt;\r
  int cnt;\r
\r
  m68k_cnt = m68k_cycles_done - last_z80_sync;\r
  z80_cycle_aim += cycles_68k_to_z80(m68k_cnt);\r
  cnt = z80_cycle_aim - z80_cycle_cnt;\r
  last_z80_sync = m68k_cycles_done;\r
\r
  pprof_start(z80);\r
\r
  elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
    z80_cycle_cnt, z80_cycle_cnt / 288,\r
    z80_cycle_aim, z80_cycle_aim / 288);\r
\r
  if (cnt > 0)\r
    z80_cycle_cnt += z80_run(cnt);\r
\r
  pprof_end(z80);\r
}\r
\r
\r
void PicoFrame(void)\r
{\r
  pprof_start(frame);\r
\r
  Pico.m.frame_count++;\r
\r
  if (PicoAHW & PAHW_SMS) {\r
    PicoFrameMS();\r
    goto end;\r
  }\r
\r
  if (PicoAHW & PAHW_32X) {\r
    PicoFrame32x(); // also does MCD+32X\r
    goto end;\r
  }\r
\r
  if (PicoAHW & PAHW_MCD) {\r
    PicoFrameMCD();\r
    goto end;\r
  }\r
\r
  //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
  PicoFrameStart();\r
  PicoFrameHints();\r
\r
end:\r
  pprof_end(frame);\r
}\r
\r
void PicoFrameDrawOnly(void)\r
{\r
  if (!(PicoAHW & PAHW_SMS)) {\r
    PicoFrameStart();\r
    PicoDrawSync(223, 0);\r
  } else {\r
    PicoFrameDrawOnlyMS();\r
  }\r
}\r
\r
void PicoGetInternal(pint_t which, pint_ret_t *r)\r
{\r
  switch (which)\r
  {\r
    case PI_ROM:         r->vptr = Pico.rom; break;\r
    case PI_ISPAL:       r->vint = Pico.m.pal; break;\r
    case PI_IS40_CELL:   r->vint = Pico.video.reg[12]&1; break;\r
    case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
  }\r
}\r
\r
// callback to output message from emu\r
void (*PicoMessage)(const char *msg)=NULL;\r
\r
Commit	Line	Data
	1	/*\r
	2	* PicoDrive\r
	3	* (c) Copyright Dave, 2004\r
	4	* (C) notaz, 2006-2010\r
	5	*\r
	6	* This work is licensed under the terms of MAME license.\r
	7	* See COPYING file in the top-level directory.\r
	8	*/\r
	9	\r
	10	#include "pico_int.h"\r
	11	#include "sound/ym2612.h"\r
	12	\r
	13	struct Pico Pico;\r
	14	int PicoOpt; \r
	15	int PicoSkipFrame; // skip rendering frame?\r
	16	int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
	17	int PicoPadInt[2]; // internal copy\r
	18	int PicoAHW; // active addon hardware: PAHW_*\r
	19	int PicoQuirks; // game-specific quirks\r
	20	int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
	21	int PicoRegionFPSOverride; // override the refresh rate of the region 0: Auto, 1: NTSC, 2: PAL\r
	22	int PicoAutoRgnOrder;\r
	23	\r
	24	struct PicoSRAM SRam;\r
	25	int emustatus; // rapid_ym2612, multi_ym_updates\r
	26	int scanlines_total;\r
	27	\r
	28	void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
	29	void (*PicoResetHook)(void) = NULL;\r
	30	void (*PicoLineHook)(void) = NULL;\r
	31	\r
	32	// to be called once on emu init\r
	33	void PicoInit(void)\r
	34	{\r
	35	// Blank space for state:\r
	36	memset(&Pico,0,sizeof(Pico));\r
	37	memset(&PicoPad,0,sizeof(PicoPad));\r
	38	memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
	39	\r
	40	Pico.est.Pico_video = &Pico.video;\r
	41	Pico.est.Pico_vram = Pico.vram;\r
	42	Pico.est.PicoOpt = &PicoOpt;\r
	43	\r
	44	// Init CPUs:\r
	45	SekInit();\r
	46	z80_init(); // init even if we aren't going to use it\r
	47	\r
	48	PicoInitMCD();\r
	49	PicoSVPInit();\r
	50	Pico32xInit();\r
	51	\r
	52	PicoDrawInit();\r
	53	}\r
	54	\r
	55	// to be called once on emu exit\r
	56	void PicoExit(void)\r
	57	{\r
	58	if (PicoAHW & PAHW_MCD)\r
	59	PicoExitMCD();\r
	60	PicoCartUnload();\r
	61	z80_exit();\r
	62	\r
	63	if (SRam.data)\r
	64	free(SRam.data);\r
	65	pevt_dump();\r
	66	}\r
	67	\r
	68	void PicoPower(void)\r
	69	{\r
	70	Pico.m.frame_count = 0;\r
	71	SekCycleCnt = SekCycleAim = 0;\r
	72	\r
	73	// clear all memory of the emulated machine\r
	74	memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
	75	\r
	76	memset(&Pico.video,0,sizeof(Pico.video));\r
	77	memset(&Pico.m,0,sizeof(Pico.m));\r
	78	\r
	79	Pico.video.pending_ints=0;\r
	80	z80_reset();\r
	81	\r
	82	// my MD1 VA6 console has this in IO\r
	83	Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
	84	\r
	85	// default VDP register values (based on Fusion)\r
	86	Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
	87	Pico.video.reg[0xc] = 0x81;\r
	88	Pico.video.reg[0xf] = 0x02;\r
	89	\r
	90	if (PicoAHW & PAHW_MCD)\r
	91	PicoPowerMCD();\r
	92	\r
	93	if (PicoOpt & POPT_EN_32X)\r
	94	PicoPower32x();\r
	95	\r
	96	PicoReset();\r
	97	}\r
	98	\r
	99	PICO_INTERNAL void PicoDetectRegion(void)\r
	100	{\r
	101	// PicoDetectRegion not ready yet\r
	102	if (Pico.romsize <= 0)\r
	103	return;\r
	104	\r
	105	int support=0, hw=0, i;\r
	106	unsigned char pal=0;\r
	107	\r
	108	if (PicoRegionOverride)\r
	109	{\r
	110	support = PicoRegionOverride;\r
	111	}\r
	112	else\r
	113	{\r
	114	// Read cartridge region data:\r
	115	unsigned short rd = (unsigned short )(Pico.rom + 0x1f0);\r
	116	int region = (rd[0] << 16) \| rd[1];\r
	117	\r
	118	for (i = 0; i < 4; i++)\r
	119	{\r
	120	int c;\r
	121	\r
	122	c = region >> (i<<3);\r
	123	c &= 0xff;\r
	124	if (c <= ' ') continue;\r
	125	\r
	126	if (c=='J') support\|=1;\r
	127	else if (c=='U') support\|=4;\r
	128	else if (c=='E') support\|=8;\r
	129	else if (c=='j') {support\|=1; break; }\r
	130	else if (c=='u') {support\|=4; break; }\r
	131	else if (c=='e') {support\|=8; break; }\r
	132	else\r
	133	{\r
	134	// New style code:\r
	135	char s[2]={0,0};\r
	136	s[0]=(char)c;\r
	137	support\|=strtol(s,NULL,16);\r
	138	}\r
	139	}\r
	140	}\r
	141	\r
	142	// auto detection order override\r
	143	if (PicoAutoRgnOrder) {\r
	144	if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
	145	else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
	146	else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
	147	}\r
	148	\r
	149	// Try to pick the best hardware value for English/50hz:\r
	150	if (support&8) { hw=0xc0; pal=1; } // Europe\r
	151	else if (support&4) hw=0x80; // USA\r
	152	else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
	153	else if (support&1) hw=0x00; // Japan NTSC\r
	154	else hw=0x80; // USA\r
	155	\r
	156	Pico.m.hardware=(unsigned char)(hw\|0x20); // No disk attached\r
	157	\r
	158	if (PicoRegionFPSOverride > 0)\r
	159	pal = PicoRegionFPSOverride - 1; // pal - 0: NTSC, 1: PAL \| PicoRegionFPSOverride - 0: Auto, 1: NTSC, 2: PAL\r
	160	\r
	161	Pico.m.pal=pal;\r
	162	}\r
	163	\r
	164	int PicoReset(void)\r
	165	{\r
	166	if (Pico.romsize <= 0)\r
	167	return 1;\r
	168	\r
	169	#if defined(CPU_CMP_R) \|\| defined(CPU_CMP_W) \|\| defined(DRC_CMP)\r
	170	PicoOpt \|= POPT_DIS_VDP_FIFO\|POPT_DIS_IDLE_DET;\r
	171	#endif\r
	172	\r
	173	/* must call now, so that banking is reset, and correct vectors get fetched */\r
	174	if (PicoResetHook)\r
	175	PicoResetHook();\r
	176	\r
	177	memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
	178	emustatus = 0;\r
	179	\r
	180	if (PicoAHW & PAHW_SMS) {\r
	181	PicoResetMS();\r
	182	return 0;\r
	183	}\r
	184	\r
	185	SekReset();\r
	186	// ..but do not reset SekCycle* to not desync with addons\r
	187	\r
	188	// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
	189	SekSetRealTAS(PicoAHW & PAHW_MCD);\r
	190	\r
	191	Pico.m.dirtyPal = 1;\r
	192	\r
	193	Pico.m.z80_bank68k = 0;\r
	194	Pico.m.z80_reset = 1;\r
	195	\r
	196	PicoDetectRegion();\r
	197	Pico.video.status = 0x3428 \| Pico.m.pal; // 'always set' bits \| vblank \| collision \| pal\r
	198	\r
	199	PsndReset(); // pal must be known here\r
	200	\r
	201	// create an empty "dma" to cause 68k exec start at random frame location\r
	202	if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
	203	Pico.m.dma_xfers = rand() & 0x1fff;\r
	204	\r
	205	SekFinishIdleDet();\r
	206	\r
	207	if (PicoAHW & PAHW_MCD) {\r
	208	PicoResetMCD();\r
	209	return 0;\r
	210	}\r
	211	\r
	212	// reinit, so that checksum checks pass\r
	213	if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
	214	SekInitIdleDet();\r
	215	\r
	216	if (PicoOpt & POPT_EN_32X)\r
	217	PicoReset32x();\r
	218	\r
	219	// reset sram state; enable sram access by default if it doesn't overlap with ROM\r
	220	Pico.m.sram_reg = 0;\r
	221	if ((SRam.flags & SRF_EEPROM) \|\| Pico.romsize <= SRam.start)\r
	222	Pico.m.sram_reg \|= SRR_MAPPED;\r
	223	\r
	224	if (SRam.flags & SRF_ENABLED)\r
	225	elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
	226	!!(SRam.flags & SRF_EEPROM));\r
	227	\r
	228	return 0;\r
	229	}\r
	230	\r
	231	// flush config changes before emu loop starts\r
	232	void PicoLoopPrepare(void)\r
	233	{\r
	234	if (PicoRegionFPSOverride) // PicoRegionFPSOverride is proprietary on PicoRegionOverride\r
	235	{\r
	236	// force setting possibly changed..\r
	237	Pico.m.pal = PicoRegionFPSOverride - 1; // Pico.m.pal - 0: NTSC, 1: PAL \| PicoRegionFPSOverride - 0: Auto, 1: NTSC, 2: PAL\r
	238	}\r
	239	else if (PicoRegionOverride)\r
	240	{\r
	241	// force setting possibly changed..\r
	242	Pico.m.pal = (PicoRegionOverride == 2 \|\| PicoRegionOverride == 8) ? 1 : 0;\r
	243	}\r
	244	\r
	245	// FIXME: PAL has 313 scanlines..\r
	246	scanlines_total = Pico.m.pal ? 312 : 262;\r
	247	\r
	248	Pico.m.dirtyPal = 1;\r
	249	rendstatus_old = -1;\r
	250	}\r
	251	\r
	252	\r
	253	// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
	254	// same for Outrunners (92-121, when active is set to 24)\r
	255	// 96 is VR hack\r
	256	static const int dma_timings[] = {\r
	257	167, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs\|c]ram vram_fill vram_copy\r
	258	102, 205, 204, 102, // vblank: 40cell:\r
	259	16, 16, 15, 8, // active: 32cell:\r
	260	24, 18, 17, 9 // ...\r
	261	};\r
	262	\r
	263	static const int dma_bsycles[] = {\r
	264	(488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
	265	(488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,\r
	266	(488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
	267	(488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
	268	};\r
	269	\r
	270	// grossly inaccurate.. FIXME FIXXXMEE\r
	271	PICO_INTERNAL int CheckDMA(void)\r
	272	{\r
	273	int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
	274	int xfers = Pico.m.dma_xfers;\r
	275	int dma_op1;\r
	276	\r
	277	if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
	278	dma_op1 = dma_op;\r
	279	if(Pico.video.reg[12] & 1) dma_op \|= 4; // 40 cell mode?\r
	280	if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op\|=8; // active display?\r
	281	xfers_can = dma_timings[dma_op];\r
	282	if(xfers <= xfers_can)\r
	283	{\r
	284	if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
	285	else {\r
	286	burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
	287	}\r
	288	Pico.m.dma_xfers = 0;\r
	289	} else {\r
	290	if(!(dma_op&2)) burn = 488;\r
	291	Pico.m.dma_xfers -= xfers_can;\r
	292	}\r
	293	\r
	294	elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
	295	//dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
	296	return burn;\r
	297	}\r
	298	\r
	299	#include "pico_cmn.c"\r
	300	\r
	301	unsigned int last_z80_sync; /* in 68k cycles */\r
	302	int z80_cycle_cnt;\r
	303	int z80_cycle_aim;\r
	304	int z80_scanline;\r
	305	int z80_scanline_cycles; /* cycles done until z80_scanline */\r
	306	\r
	307	/* sync z80 to 68k */\r
	308	PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
	309	{\r
	310	int m68k_cnt;\r
	311	int cnt;\r
	312	\r
	313	m68k_cnt = m68k_cycles_done - last_z80_sync;\r
	314	z80_cycle_aim += cycles_68k_to_z80(m68k_cnt);\r
	315	cnt = z80_cycle_aim - z80_cycle_cnt;\r
	316	last_z80_sync = m68k_cycles_done;\r
	317	\r
	318	pprof_start(z80);\r
	319	\r
	320	elprintf(EL_BUSREQ, "z80 sync %i (%u\|%u -> %u\|%u)", cnt,\r
	321	z80_cycle_cnt, z80_cycle_cnt / 288,\r
	322	z80_cycle_aim, z80_cycle_aim / 288);\r
	323	\r
	324	if (cnt > 0)\r
	325	z80_cycle_cnt += z80_run(cnt);\r
	326	\r
	327	pprof_end(z80);\r
	328	}\r
	329	\r
	330	\r
	331	void PicoFrame(void)\r
	332	{\r
	333	pprof_start(frame);\r
	334	\r
	335	Pico.m.frame_count++;\r
	336	\r
	337	if (PicoAHW & PAHW_SMS) {\r
	338	PicoFrameMS();\r
	339	goto end;\r
	340	}\r
	341	\r
	342	if (PicoAHW & PAHW_32X) {\r
	343	PicoFrame32x(); // also does MCD+32X\r
	344	goto end;\r
	345	}\r
	346	\r
	347	if (PicoAHW & PAHW_MCD) {\r
	348	PicoFrameMCD();\r
	349	goto end;\r
	350	}\r
	351	\r
	352	//if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
	353	\r
	354	PicoFrameStart();\r
	355	PicoFrameHints();\r
	356	\r
	357	end:\r
	358	pprof_end(frame);\r
	359	}\r
	360	\r
	361	void PicoFrameDrawOnly(void)\r
	362	{\r
	363	if (!(PicoAHW & PAHW_SMS)) {\r
	364	PicoFrameStart();\r
	365	PicoDrawSync(223, 0);\r
	366	} else {\r
	367	PicoFrameDrawOnlyMS();\r
	368	}\r
	369	}\r
	370	\r
	371	void PicoGetInternal(pint_t which, pint_ret_t *r)\r
	372	{\r
	373	switch (which)\r
	374	{\r
	375	case PI_ROM: r->vptr = Pico.rom; break;\r
	376	case PI_ISPAL: r->vint = Pico.m.pal; break;\r
	377	case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
	378	case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
	379	}\r
	380	}\r
	381	\r
	382	// callback to output message from emu\r
	383	void (PicoMessage)(const char msg)=NULL;\r
	384	\r