updated EEPROM code, gmv fixed

[picodrive.git] / Pico / Memory.c

diff --git a/Pico/Memory.c b/Pico/Memory.c
index e95d132..7b30e4a 100644 (file)
--- a/Pico/Memory.c
+++ b/Pico/Memory.c
@@ -153,6 +153,7 @@ u32 SRAMRead(u32 a)
 {\r
   unsigned int sreg = Pico.m.sram_reg;\r
   if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
+    elprintf(EL_SRAMIO, "normal sram detected.");\r
     Pico.m.sram_reg|=0x10; // should be normal SRAM\r
   }\r
   if(sreg & 4) // EEPROM read\r
@@ -163,24 +164,30 @@ u32 SRAMRead(u32 a)
 \r
 static void SRAMWrite(u32 a, u32 d)\r
 {\r
-  dprintf("sram_w: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
   unsigned int sreg = Pico.m.sram_reg;\r
   if(!(sreg & 0x10)) {\r
     // not detected SRAM\r
     if((a&~1)==0x200000) {\r
-      Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
+      elprintf(EL_SRAMIO, "eeprom detected.");\r
+      sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
       SRam.start=0x200000; SRam.end=SRam.start+1;\r
-    }\r
-    Pico.m.sram_reg|=0x10;\r
+    } else\r
+      elprintf(EL_SRAMIO, "normal sram detected.");\r
+    sreg|=0x10;\r
+    Pico.m.sram_reg=sreg;\r
   }\r
   if(sreg & 4) { // EEPROM write\r
-    if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
+    // this diff must be at most 16 for NBA Jam to work\r
+    if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
       // just update pending state\r
+      elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
       SRAMUpdPending(a, d);\r
     } else {\r
+      int old=sreg;\r
       SRAMWriteEEPROM(sreg>>6); // execute pending\r
       SRAMUpdPending(a, d);\r
-      lastSSRamWrite = SekCyclesDoneT();\r
+      if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
+        lastSSRamWrite = SekCyclesDoneT();\r
     }\r
   } else if(!(sreg & 2)) {\r
     u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
@@ -199,8 +206,6 @@ u32 OtherRead16End(u32 a, int realsize)
 {\r
   u32 d=0;\r
 \r
-  dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
-\r
   // for games with simple protection devices, discovered by Haze\r
   // some dumb detection is used, but that should be enough to make things work\r
   if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
@@ -262,7 +267,7 @@ u32 OtherRead16End(u32 a, int realsize)
   }\r
 \r
 end:\r
-  dprintf("ret = %04x", d);\r
+  elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
   return d;\r
 }\r
 \r
@@ -272,9 +277,8 @@ end:
 static void OtherWrite8End(u32 a,u32 d,int realsize)\r
 {\r
   // sram\r
-  //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
-  //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
   if(a >= SRam.start && a <= SRam.end) {\r
+    elprintf(EL_SRAMIO, "sram w8  [%06x] %02x @ %06x", a, d, SekPc);\r
     SRAMWrite(a, d);\r
     return;\r
   }\r
@@ -288,13 +292,13 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
 #else\r
   // sram access register\r
   if(a == 0xA130F1) {\r
-    dprintf("sram reg=%02x", d);\r
+    elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
     Pico.m.sram_reg &= ~3;\r
     Pico.m.sram_reg |= (u8)(d&3);\r
     return;\r
   }\r
 #endif\r
-  dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+  elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
 \r
   if(a >= 0xA13004 && a < 0xA13040) {\r
     // dumb 12-in-1 or 4-in-1 banking support\r
@@ -332,6 +336,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
   // sram\r
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
     d = SRAMRead(a);\r
+    elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
     goto end;\r
   }\r
 #endif\r
@@ -342,15 +347,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)
 \r
   d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
 \r
-  end:\r
-\r
-  //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
-  //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
-  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
-\r
-  //if(a==0x200001||a==0x200000) printf("r8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());\r
-  //dprintf("r8 : %06x,   %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
+end:\r
 #ifdef __debug_io\r
   dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
 #endif\r
@@ -376,6 +373,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
     d = SRAMRead(a);\r
     d |= d<<8;\r
+    elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
     goto end;\r
   }\r
 #endif\r
@@ -385,11 +383,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)
 \r
   d = OtherRead16(a, 16);\r
 \r
-  end:\r
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
-  //  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
-  //if(a==0x200000) printf("r16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
-\r
+end:\r
 #ifdef __debug_io\r
   dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
 #endif\r
@@ -414,6 +408,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
   if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
     d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
     d |= d<<8;\r
+    elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
     goto end;\r
   }\r
 \r
@@ -422,8 +417,7 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
 \r
   d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
 \r
-  end:\r
-  //if(a==0x200000) printf("r32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
+end:\r
 #ifdef __debug_io\r
   dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
 #endif\r
@@ -469,9 +463,6 @@ void CPU_CALL PicoWrite16(u32 a,u16 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)\r
   lastwrite_cyc_d[lwp_cyc++&15] = d;\r
 #endif\r
-  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
-  //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
-  //if(a==0x200000) printf("w16: %04x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 \r
   if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
   log_io(a, 16, 1);\r
@@ -488,7 +479,6 @@ static void CPU_CALL PicoWrite32(u32 a,u32 d)
 #if defined(EMU_C68K) && defined(EMU_M68K)\r
   lastwrite_cyc_d[lwp_cyc++&15] = d;\r
 #endif\r
-  //if(a==0x200000) printf("w32: %08x @ %06x [%i]\n", d, SekPc, SekCyclesDoneT());\r
 \r
   if ((a&0xe00000)==0xe00000)\r
   {\r
@@ -647,14 +637,17 @@ void PicoWriteCD8w (unsigned int a, unsigned char d);
 void PicoWriteCD16w(unsigned int a, unsigned short d);\r
 void PicoWriteCD32w(unsigned int a, unsigned int d);\r
 \r
+/* it appears that Musashi doesn't always mask the unused bits */\r
 unsigned int  m68k_read_memory_8(unsigned int address)\r
 {\r
-    return (PicoMCD&1) ? PicoReadCD8w(address)  : PicoRead8(address);\r
+    unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
+    return d&0xff;\r
 }\r
 \r
 unsigned int  m68k_read_memory_16(unsigned int address)\r
 {\r
-    return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
+    unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
+    return d&0xffff;\r
 }\r
 \r
 unsigned int  m68k_read_memory_32(unsigned int address)\r