int emustatus = 0;\r
void (*PicoWriteSound)(int len) = 0; // called once per frame at the best time to send sound buffer (PsndOut) to hardware\r
\r
-struct PicoSRAM SRam;\r
+struct PicoSRAM SRam = {0,};\r
int z80startCycle, z80stopCycle; // in 68k cycles\r
//int z80ExtraCycles = 0;\r
int PicoPad[2]; // Joypads, format is SACB RLDU\r
PicoInitMCD();\r
\r
SRam.data=0;\r
- SRam.resize=1;\r
\r
return 0;\r
}\r
unsigned int region=0;\r
int support=0,hw=0,i=0;\r
unsigned char pal=0;\r
+ unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
\r
if (Pico.romsize<=0) return 1;\r
\r
- // setup correct memory map\r
- if (PicoMCD & 1)\r
- PicoMemSetupCD();\r
- else PicoMemSetup();\r
PicoMemReset();\r
SekReset();\r
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
return 0;\r
}\r
\r
- if(SRam.resize) {\r
- int sram_size = 0;\r
- if(SRam.data) free(SRam.data); SRam.data=0;\r
- Pico.m.sram_reg = 0;\r
-\r
- if(*(Pico.rom+0x1B1) == 'R' && *(Pico.rom+0x1B0) == 'A') {\r
- if(*(Pico.rom+0x1B2) & 0x40) {\r
- // EEPROM\r
- // what kind of EEPROMs are actually used? X24C02? X24C04? (X24C01 has only 128), but we will support up to 8K\r
- SRam.start = PicoRead32(0x1B4) & ~1; // zero address is used for clock by some games\r
- SRam.end = PicoRead32(0x1B8);\r
- sram_size = 0x2000;\r
- Pico.m.sram_reg = 4;\r
- } else {\r
- // normal SRAM\r
- SRam.start = PicoRead32(0x1B4) & 0xFFFF00;\r
- SRam.end = PicoRead32(0x1B8) | 1;\r
- sram_size = SRam.end - SRam.start + 1;\r
- }\r
- Pico.m.sram_reg |= 0x10; // SRAM was detected\r
- }\r
- if(sram_size <= 0) {\r
- // some games may have bad headers, like S&K and Sonic3\r
- SRam.start = 0x200000;\r
- SRam.end = 0x203FFF;\r
- sram_size = 0x004000;\r
- }\r
+ // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
+ Pico.m.sram_reg=sram_reg&0x14;\r
+ if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
\r
- // enable sram access by default if it doesn't overlap with ROM\r
- if(Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
- SRam.reg_back = Pico.m.sram_reg;\r
-\r
- if(sram_size) {\r
- SRam.data = (unsigned char *) calloc(sram_size, 1);\r
- if(!SRam.data) return 1;\r
- }\r
- SRam.resize=0;\r
- // Dino Dini's Soccer malfunctions if SRAM is not filled with 0xff\r
- if (strncmp((char *)Pico.rom+0x150, "IDOND NI'I", 10) == 0)\r
- memset(SRam.data, 0xff, sram_size);\r
- elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
- (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
- }\r
-\r
- Pico.m.sram_reg = SRam.reg_back; // restore sram_reg\r
- SRam.changed = 0;\r
+ elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
+ (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
\r
return 0;\r
}\r
\r
+\r
// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
// same for Outrunners (92-121, when active is set to 24)\r
static const int dma_timings[] = {\r
sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); dstrp+=strlen(dstrp);\r
sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));\r
dstrp+=strlen(dstrp);\r
- sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,\r
- bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2)); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i (%i)\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,\r
+ bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2), SRam.eeprom_type); dstrp+=strlen(dstrp);\r
sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); dstrp+=strlen(dstrp);\r
sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status);\r
dstrp+=strlen(dstrp);\r