// XXX: no proper handling of 32col mode..
if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
(Pico.video.reg[12] & 1) && // 40col mode
- (PicoDrawMask & PDRAW_32X_ON))
+ (!(Pico.video.debug_p & PVD_KILL_32X)))
{
int md_bg = Pico.video.reg[7] & 0x3f;
unsigned int p32x_event_times[P32X_EVENT_COUNT];
static unsigned int event_time_next;
static event_cb *p32x_event_cbs[P32X_EVENT_COUNT] = {
- [P32X_EVENT_PWM] = p32x_pwm_irq_event,
- [P32X_EVENT_FILLEND] = fillend_event,
- [P32X_EVENT_HINT] = hint_event,
+ p32x_pwm_irq_event, // P32X_EVENT_PWM
+ fillend_event, // P32X_EVENT_FILLEND
+ hint_event, // P32X_EVENT_HINT
};
// schedule event at some time 'after', in m68k clocks
oldest, event_time_next);
}
-static inline void run_sh2(SH2 *sh2, int m68k_cycles)
+static void run_sh2(SH2 *sh2, int m68k_cycles)
{
int cycles, done;