extern unsigned char formatted_bram[4*0x10];
-static unsigned int m68k_cycle_mult;
+static unsigned int mcd_m68k_cycle_mult;
+static unsigned int mcd_m68k_cycle_base;
+static unsigned int mcd_s68k_cycle_base;
void (*PicoMCDopenTray)(void) = NULL;
void (*PicoMCDcloseTray)(void) = NULL;
PICO_INTERNAL void PicoInitMCD(void)
{
SekInitS68k();
- Init_CD_Driver();
}
PICO_INTERNAL void PicoExitMCD(void)
{
- End_CD_Driver();
}
PICO_INTERNAL void PicoPowerMCD(void)
{
+ SekCycleCntS68k = SekCycleAimS68k = 0;
+
int fmt_size = sizeof(formatted_bram);
memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
- Reset_CD();
+ cdc_init();
+ gfx_init();
// cold reset state (tested)
Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
void pcd_soft_reset(void)
{
- // Reset_CD(); // breaks Fahrenheit CD swap
+ elprintf(EL_CD, "cd: soft reset");
- LC89510_Reset();
- gfx_cd_reset();
+ Pico_mcd->m.s68k_pend_ints = 0;
+ cdc_reset();
+ cdd_reset();
#ifdef _ASM_CD_MEMORY_C
//PicoMemResetCDdecode(1); // don't have to call this in 2M mode
#endif
+ memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
+ Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
+
pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
// TODO: test if register state/timers change
return 0;
}
-static __inline void SekRunS68k(unsigned int to)
+static void SekRunM68kOnce(void)
+{
+ int cyc_do;
+ pevt_log_m68k_o(EVT_RUN_START);
+
+ if ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
+ SekCycleCnt += cyc_do;
+
+#if defined(EMU_C68K)
+ PicoCpuCM68k.cycles = cyc_do;
+ CycloneRun(&PicoCpuCM68k);
+ SekCycleCnt -= PicoCpuCM68k.cycles;
+#elif defined(EMU_M68K)
+ SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
+#elif defined(EMU_F68K)
+ SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do;
+#endif
+ }
+
+ SekCyclesLeft = 0;
+
+ SekTrace(0);
+ pevt_log_m68k_o(EVT_RUN_END);
+}
+
+static void SekRunS68k(unsigned int to)
{
int cyc_do;
m68k_set_context(&PicoCpuMM68k);
#elif defined(EMU_F68K)
g_m68kcontext = &PicoCpuFS68k;
- SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
+ SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
g_m68kcontext = &PicoCpuFM68k;
#endif
}
+static void pcd_set_cycle_mult(void)
+{
+ // ~1.63 for NTSC, ~1.645 for PAL
+ if (Pico.m.pal)
+ mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*313*488));
+ else
+ mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
+}
unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
{
- return (long long)c * m68k_cycle_mult >> 16;
+ return (long long)c * mcd_m68k_cycle_mult >> 16;
}
/* events */
static void pcd_cdc_event(unsigned int now)
{
// 75Hz CDC update
- Check_CD_Command();
+ cdd_update();
+
+ /* check if a new CDD command has been processed */
+ if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
+ {
+ /* reset CDD command wait flag */
+ Pico_mcd->s68k_regs[0x4b] = 0xf0;
+
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
+ elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
+ SekInterruptS68k(4);
+ }
+ }
+
pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
}
static void pcd_dma_event(unsigned int now)
{
- int ddx = Pico_mcd->s68k_regs[4] & 7;
- Update_CDC_TRansfer(ddx);
+ cdc_dma_update();
}
typedef void (event_cb)(unsigned int now);
static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
[PCD_EVENT_CDC] = pcd_cdc_event,
[PCD_EVENT_TIMER3] = pcd_int3_timer_event,
- [PCD_EVENT_GFX] = gfx_cd_update,
+ [PCD_EVENT_GFX] = gfx_update,
[PCD_EVENT_DMA] = pcd_dma_event,
};
int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
{
#define now SekCycleCntS68k
- unsigned int s68k_target =
- (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
+ unsigned int s68k_target;
unsigned int target;
+ target = m68k_target - mcd_m68k_cycle_base;
+ s68k_target = mcd_s68k_cycle_base +
+ ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
+
elprintf(EL_CD, "s68k sync to %u, %u->%u",
m68k_target, now, s68k_target);
SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
}
- SekSyncM68k();
+ while (CYCLES_GT(SekCycleAim, SekCycleCnt)) {
+ SekRunM68kOnce();
+ if (Pico_mcd->m.need_sync) {
+ Pico_mcd->m.need_sync = 0;
+ pcd_sync_s68k(SekCycleCnt, 0);
+ }
+ }
}
void pcd_run_cpus_lockstep(int m68k_cycles)
#include "../pico_cmn.c"
-PICO_INTERNAL void PicoFrameMCD(void)
+void pcd_prepare_frame(void)
{
- if (!(PicoOpt&POPT_ALT_RENDERER))
- PicoFrameStart();
+ pcd_set_cycle_mult();
- // ~1.63 for NTSC, ~1.645 for PAL
- if (Pico.m.pal)
- m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
- else
- m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
+ // need this because we can't have direct mapping between
+ // master<->slave cycle counters because of overflows
+ mcd_m68k_cycle_base = SekCycleAim;
+ mcd_s68k_cycle_base = SekCycleAimS68k;
+}
+
+PICO_INTERNAL void PicoFrameMCD(void)
+{
+ PicoFrameStart();
+ pcd_prepare_frame();
PicoFrameHints();
}
unsigned int cycles;
int diff;
+ pcd_set_cycle_mult();
pcd_state_loaded_mem();
+ memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
+ Pico_mcd->pcm_mixbuf_dirty = 0;
+ Pico_mcd->pcm_mixpos = 0;
+ Pico_mcd->pcm_regs_dirty = 1;
+
// old savestates..
cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
diff = cycles - SekCycleAimS68k;
if (Pico_mcd->s68k_regs[0x31])
pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
Pico_mcd->s68k_regs[0x31] * 384);
-
- if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
- Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
- Pico_mcd->rot_comp.Reg_64 = 0;
- if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
- SekInterruptS68k(1);
- }
- if (Pico_mcd->scd.Status_CDC & 0x08)
- Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
}
+
+ diff = cycles - Pico_mcd->pcm.update_cycles;
+ if ((unsigned int)diff > 12500000/50)
+ Pico_mcd->pcm.update_cycles = cycles;
+
+ // reschedule
+ event_time_next = 0;
+ pcd_run_events(SekCycleCntS68k);
}
// vim:shiftwidth=2:ts=2:expandtab
notaz.gp2x.de / picodrive.git / blobdiff