\r
// for nonstandard reads\r
// TODO: mv to carthw\r
-static u32 OtherRead16End(u32 a, int realsize)\r
+u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
\r
// our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
// Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
// @ 400004 which is expected @ 400006, so we really remember 2 values here\r
- d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
+/// d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
}\r
else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
return d;\r
}\r
\r
-static void OtherWrite8End(u32 a,u32 d,int realsize)\r
+void OtherWrite8End(u32 a,u32 d,int realsize)\r
{\r
-#ifdef _ASM_MEMORY_C\r
- // special ROM hardware (currently only banking and sram reg supported)\r
- if((a&0xfffff1) == 0xA130F1) {\r
- PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
- return;\r
- }\r
-#else\r
- // sram access register\r
- if(a == 0xA130F1) {\r
- elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
- Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r
- Pico.m.sram_status |= (u8)(d&3);\r
- return;\r
- }\r
-#endif\r
- elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
-\r
// for games with simple protection devices, discovered by Haze\r
if ((a>>22) == 1)\r
- Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
+;/// Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
}\r
\r
// -----------------------------------------------------------------\r
// cart (save) RAM area (usually 0x200000 - ...)\r
static u32 PicoRead8_sram(u32 a)\r
{\r
- int srs = Pico.m.sram_status;\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (srs & (SRS_MAPPED|SRS_EEPROM)))\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
- if (srs & SRS_EEPROM)\r
+ if (SRam.flags & SRF_EEPROM) {\r
d = EEPROM_read();\r
- else\r
+ if (!(a & 1))\r
+ d >>= 8;\r
+ } else\r
d = *(u8 *)(SRam.data - SRam.start + a);\r
- elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
+ elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
return d;\r
}\r
\r
+ // XXX: this is banking unfriendly\r
if (a < Pico.romsize)\r
return Pico.rom[a ^ 1];\r
\r
\r
static u32 PicoRead16_sram(u32 a)\r
{\r
- int srs = Pico.m.sram_status;\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (srs & (SRS_MAPPED|SRS_EEPROM)))\r
+ if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
- if (srs & SRS_EEPROM) {\r
+ if (SRam.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
- d |= d << 8;\r
- } else {\r
+ else {\r
u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
d = pm[0] << 8;\r
d |= pm[1];\r
\r
static void PicoWrite8_sram(u32 a, u32 d)\r
{\r
- unsigned int srs = Pico.m.sram_status;\r
- elprintf(EL_SRAMIO, "sram wX [%06x] %02x @ %06x", a, d & 0xffff, SekPc);\r
- if (srs & SRS_EEPROM) // EEPROM write\r
+ if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ m68k_unmapped_write8(a, d);\r
+ return;\r
+ }\r
+\r
+ elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r
+ if (SRam.flags & SRF_EEPROM)\r
{\r
- // this diff must be at most 16 for NBA Jam to work\r
- if (SekCyclesDoneT() - lastSSRamWrite < 16) {\r
- // just update pending state\r
- elprintf(EL_EEPROM, "eeprom: skip because cycles=%i",\r
- SekCyclesDoneT() - lastSSRamWrite);\r
- EEPROM_upd_pending(a, d);\r
- } else {\r
- EEPROM_write(srs >> 6); // execute pending\r
- EEPROM_upd_pending(a, d);\r
- if ((srs ^ Pico.m.sram_status) & 0xc0) // update time only if SDA/SCL changed\r
- lastSSRamWrite = SekCyclesDoneT();\r
- }\r
+ EEPROM_write8(a, d);\r
}\r
- else if (!(srs & SRS_READONLY)) {\r
- u8 *pm=(u8 *)(SRam.data - SRam.start + a);\r
+ else {\r
+ u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
if (*pm != (u8)d) {\r
SRam.changed = 1;\r
*pm = (u8)d;\r
\r
static void PicoWrite16_sram(u32 a, u32 d)\r
{\r
- // XXX: hardware could easily use MSB too..\r
- PicoWrite8_sram(a + 1, d);\r
+ if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ m68k_unmapped_write16(a, d);\r
+ return;\r
+ }\r
+\r
+ elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r
+ if (SRam.flags & SRF_EEPROM)\r
+ {\r
+ EEPROM_write16(d);\r
+ }\r
+ else {\r
+ // XXX: hardware could easily use MSB too..\r
+ u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ if (*pm != (u8)d) {\r
+ SRam.changed = 1;\r
+ *pm = (u8)d;\r
+ }\r
+ }\r
}\r
\r
// z80 area (0xa00000 - 0xa0ffff)\r
}\r
if (a == 0xa130f1) { // sram access register\r
elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
- Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r
- Pico.m.sram_status |= (u8)(d & 3);\r
+ Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
+ Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
m68k_unmapped_write8(a, d);\r
}\r
if (a == 0xa130f0) { // sram access register\r
elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
- Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r
- Pico.m.sram_status |= (u8)(d & 3);\r
+ Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
+ Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
m68k_unmapped_write16(a, d);\r
\r
// -----------------------------------------------------------------\r
\r
-// TODO: rm\r
-static void OtherWrite16End(u32 a,u32 d,int realsize)\r
-{\r
- PicoWrite8Hook(a, d>>8, realsize);\r
- PicoWrite8Hook(a+1,d&0xff, realsize);\r
-}\r
-\r
-u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
-void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
-void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
-\r
-PICO_INTERNAL void PicoMemResetHooks(void)\r
-{\r
- // default unmapped/cart specific handlers\r
- PicoRead16Hook = OtherRead16End;\r
- PicoWrite8Hook = OtherWrite8End;\r
- PicoWrite16Hook = OtherWrite16End;\r
-}\r
-\r
#ifdef EMU_M68K\r
static void m68k_mem_setup(void);\r
#endif\r
cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r
\r
// Common case of on-cart (save) RAM, usually at 0x200000-...\r
- rs = SRam.end - SRam.start;\r
- if (rs > 0 && SRam.data != NULL) {\r
+ if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r
+ rs = SRam.end - SRam.start;\r
rs = (rs + mask) & ~mask;\r
if (SRam.start + rs >= 0x1000000)\r
rs = 0x1000000 - SRam.start;\r
z80_mem_setup();\r
}\r
\r
-/* some nasty things below :( */\r
#ifdef EMU_M68K\r
unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
-\r
-// these are here for core debugging mode\r
-static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_8(a);\r
-}\r
-static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_16(a);\r
-}\r
-static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_32(a);\r
-}\r
-\r
-unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
-unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
-unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
-unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
-unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
-unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
-unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
-unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
-\r
-static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- return 0;\r
-}\r
-\r
-static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- return 0;\r
-}\r
-\r
-static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- return 0;\r
-}\r
-\r
-#ifdef EMU_CORE_DEBUG\r
-// ROM only\r
-unsigned int m68k_read_memory_8(unsigned int a)\r
-{\r
- u8 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- d = *(u8 *) (Pico.rom+(a^1));\r
- else d = (u8) lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-unsigned int m68k_read_memory_16(unsigned int a)\r
-{\r
- u16 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- d = *(u16 *)(Pico.rom+(a&~1));\r
- else d = (u16) lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-unsigned int m68k_read_memory_32(unsigned int a)\r
-{\r
- u32 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
- else if (a <= 0x78) d = m68k_read_32(a, 0);\r
- else d = lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-\r
-// ignore writes, Cyclone already done that\r
-void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-\r
-#else // if !EMU_CORE_DEBUG\r
\r
/* it appears that Musashi doesn't always mask the unused bits */\r
unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
-#endif // !EMU_CORE_DEBUG\r
\r
static void m68k_mem_setup(void)\r
{\r
pm68k_write_memory_8 = m68k_write8;\r
pm68k_write_memory_16 = m68k_write16;\r
pm68k_write_memory_32 = m68k_write32;\r
- pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
- pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
- pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
}\r
#endif // EMU_M68K\r
\r
addr68k = Pico.m.z80_bank68k<<15;\r
addr68k += a & 0x7fff;\r
\r
- if (addr68k < Pico.romsize) {\r
- ret = Pico.rom[addr68k^1];\r
- goto out;\r
- }\r
-\r
ret = m68k_read8(addr68k);\r
- elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r
\r
-out:\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
return ret;\r
}\r
notaz.gp2x.de / picodrive.git / blobdiff