\r
static u32 read_pad_3btn(int i, u32 out_bits)\r
{\r
- u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
u32 value;\r
\r
if (out_bits & 0x40) // TH\r
\r
static u32 read_pad_6btn(int i, u32 out_bits)\r
{\r
- u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
int phase = Pico.m.padTHPhase[i];\r
u32 value;\r
\r
\r
static NOINLINE u32 port_read(int i)\r
{\r
- u32 data_reg = Pico.ioports[i + 1];\r
- u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r
+ u32 data_reg = PicoMem.ioports[i + 1];\r
+ u32 ctrl_reg = PicoMem.ioports[i + 4] | 0x80;\r
u32 in, out;\r
\r
out = data_reg & ctrl_reg;\r
- out |= 0x7f & ~ctrl_reg; // pull-ups\r
+\r
+ // pull-ups: should be 0x7f, but Decap Attack has a bug where it temp.\r
+ // disables output before doing TH-low read, so don't emulate it for TH.\r
+ // Decap Attack reportedly doesn't work on Nomad but works on must\r
+ // other MD revisions (different pull-up strength?).\r
+ out |= 0x3f & ~ctrl_reg;\r
\r
in = port_readers[i](i, out);\r
\r
case 1: d = port_read(0); break;\r
case 2: d = port_read(1); break;\r
case 3: d = port_read(2); break;\r
- default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
+ default: d = PicoMem.ioports[a]; break; // IO ports can be used as RAM\r
}\r
return d;\r
}\r
if (1 <= a && a <= 2)\r
{\r
Pico.m.padDelay[a - 1] = 0;\r
- if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
+ if (!(PicoMem.ioports[a] & 0x40) && (d & 0x40))\r
Pico.m.padTHPhase[a - 1]++;\r
}\r
\r
// certain IO ports can be used as RAM\r
- Pico.ioports[a] = d;\r
+ PicoMem.ioports[a] = d;\r
}\r
\r
-// lame..\r
static int z80_cycles_from_68k(void)\r
{\r
- return z80_cycle_aim\r
- + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r
+ int m68k_cnt = SekCyclesDone() - Pico.t.m68c_frame_start;\r
+ return cycles_68k_to_z80(m68k_cnt);\r
}\r
\r
void NOINLINE ctl_write_z80busreq(u32 d)\r
{\r
d&=1; d^=1;\r
- elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r
+ elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r
if (d ^ Pico.m.z80Run)\r
{\r
if (d)\r
{\r
- z80_cycle_cnt = z80_cycles_from_68k();\r
+ Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;\r
}\r
else\r
{\r
- if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
+ if ((PicoIn.opt & POPT_EN_Z80) && !Pico.m.z80_reset) {\r
pprof_start(m68k);\r
PicoSyncZ80(SekCyclesDone());\r
pprof_end_sub(m68k);\r
void NOINLINE ctl_write_z80reset(u32 d)\r
{\r
d&=1; d^=1;\r
- elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r
+ elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r
if (d ^ Pico.m.z80_reset)\r
{\r
if (d)\r
{\r
- if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r
+ if ((PicoIn.opt & POPT_EN_Z80) && Pico.m.z80Run) {\r
pprof_start(m68k);\r
PicoSyncZ80(SekCyclesDone());\r
pprof_end_sub(m68k);\r
}\r
else\r
{\r
- z80_cycle_cnt = z80_cycles_from_68k();\r
+ Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;\r
z80_reset();\r
}\r
Pico.m.z80_reset = d;\r
static void psg_write_68k(u32 d)\r
{\r
// look for volume write and update if needed\r
- if ((d & 0x90) == 0x90 && PsndPsgLine < Pico.m.scanline)\r
+ if ((d & 0x90) == 0x90 && Pico.snd.psg_line < Pico.m.scanline)\r
PsndDoPSG(Pico.m.scanline);\r
\r
SN76496Write(d);\r
{\r
if ((d & 0x90) == 0x90) {\r
int scanline = get_scanline(1);\r
- if (PsndPsgLine < scanline)\r
+ if (Pico.snd.psg_line < scanline)\r
PsndDoPSG(scanline);\r
}\r
\r
static u32 PicoRead8_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
- if (SRam.flags & SRF_EEPROM) {\r
+ if (Pico.sv.flags & SRF_EEPROM) {\r
d = EEPROM_read();\r
if (!(a & 1))\r
d >>= 8;\r
} else\r
- d = *(u8 *)(SRam.data - SRam.start + a);\r
+ d = *(u8 *)(Pico.sv.data - Pico.sv.start + a);\r
elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
return d;\r
}\r
static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
- if (SRam.flags & SRF_EEPROM)\r
+ if (Pico.sv.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
else {\r
- u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);\r
d = pm[0] << 8;\r
d |= pm[1];\r
}\r
\r
static void PicoWrite8_sram(u32 a, u32 d)\r
{\r
- if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
m68k_unmapped_write8(a, d);\r
return;\r
}\r
\r
elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r
- if (SRam.flags & SRF_EEPROM)\r
+ if (Pico.sv.flags & SRF_EEPROM)\r
{\r
EEPROM_write8(a, d);\r
}\r
else {\r
- u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);\r
if (*pm != (u8)d) {\r
- SRam.changed = 1;\r
+ Pico.sv.changed = 1;\r
*pm = (u8)d;\r
}\r
}\r
\r
static void PicoWrite16_sram(u32 a, u32 d)\r
{\r
- if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
m68k_unmapped_write16(a, d);\r
return;\r
}\r
\r
elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r
- if (SRam.flags & SRF_EEPROM)\r
+ if (Pico.sv.flags & SRF_EEPROM)\r
{\r
EEPROM_write16(d);\r
}\r
else {\r
- u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);\r
if (pm[0] != (u8)(d >> 8)) {\r
- SRam.changed = 1;\r
+ Pico.sv.changed = 1;\r
pm[0] = (u8)(d >> 8);\r
}\r
if (pm[1] != (u8)d) {\r
- SRam.changed = 1;\r
+ Pico.sv.changed = 1;\r
pm[1] = (u8)d;\r
}\r
}\r
}\r
\r
if ((a & 0x4000) == 0x0000)\r
- d = Pico.zram[a & 0x1fff];\r
+ d = PicoMem.zram[a & 0x1fff];\r
else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r
d = ym2612_read_local_68k(); \r
else\r
}\r
\r
if ((a & 0x4000) == 0x0000) { // z80 RAM\r
- SekCyclesBurnRun(2); // FIXME hack\r
- Pico.zram[a & 0x1fff] = (u8)d;\r
+ PicoMem.zram[a & 0x1fff] = (u8)d;\r
return;\r
}\r
if ((a & 0x6000) == 0x4000) { // FM Sound\r
- if (PicoOpt & POPT_EN_FM)\r
- emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r
+ if (PicoIn.opt & POPT_EN_FM)\r
+ Pico.m.status |= ym2612_write_local(a & 3, d & 0xff, 0) & 1;\r
return;\r
}\r
// TODO: probably other VDP access too? Maybe more mirrors?\r
\r
if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r
d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
- elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);\r
}\r
goto end;\r
}\r
\r
- if (PicoOpt & POPT_EN_32X) {\r
- d = PicoRead8_32x(a);\r
- goto end;\r
- }\r
+ d = PicoRead8_32x(a);\r
\r
- d = m68k_unmapped_read8(a);\r
end:\r
return d;\r
}\r
\r
if ((a & 0xff00) == 0x1100) { // z80 busreq\r
d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
- elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);\r
}\r
goto end;\r
}\r
\r
- if (PicoOpt & POPT_EN_32X) {\r
- d = PicoRead16_32x(a);\r
- goto end;\r
- }\r
+ d = PicoRead16_32x(a);\r
\r
- d = m68k_unmapped_read16(a);\r
end:\r
return d;\r
}\r
Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
- if (PicoOpt & POPT_EN_32X) {\r
- PicoWrite8_32x(a, d);\r
- return;\r
- }\r
-\r
- m68k_unmapped_write8(a, d);\r
+ PicoWrite8_32x(a, d);\r
}\r
\r
void PicoWrite16_io(u32 a, u32 d)\r
Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
- if (PicoOpt & POPT_EN_32X) {\r
- PicoWrite16_32x(a, d);\r
- return;\r
- }\r
- m68k_unmapped_write16(a, d);\r
+ PicoWrite16_32x(a, d);\r
}\r
\r
#endif // _ASM_MEMORY_C\r
\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
- int mask, rs, a;\r
+ int mask, rs, sstart, a;\r
\r
// setup the memory map\r
cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r
cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r
\r
// Common case of on-cart (save) RAM, usually at 0x200000-...\r
- if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r
- rs = SRam.end - SRam.start;\r
+ if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {\r
+ sstart = Pico.sv.start;\r
+ rs = Pico.sv.end - sstart;\r
rs = (rs + mask) & ~mask;\r
- if (SRam.start + rs >= 0x1000000)\r
- rs = 0x1000000 - SRam.start;\r
- cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r
- cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r
- cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r
- cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r
+ if (sstart + rs >= 0x1000000)\r
+ rs = 0x1000000 - sstart;\r
+ cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);\r
+ cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);\r
+ cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);\r
+ cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);\r
}\r
\r
// Z80 region\r
\r
// RAM and it's mirrors\r
for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r
- cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r
- cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r
- cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r
- cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r
+ cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);\r
}\r
\r
// Setup memory callbacks:\r
int i;\r
// by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;\r
// RAM already set\r
}\r
#endif\r
static int get_scanline(int is_from_z80)\r
{\r
if (is_from_z80) {\r
- int cycles = z80_cyclesDone();\r
- while (cycles - z80_scanline_cycles >= 228)\r
- z80_scanline++, z80_scanline_cycles += 228;\r
- return z80_scanline;\r
+ int mclk_z80 = z80_cyclesDone() * 15;\r
+ int mclk_line = Pico.t.z80_scanline * 488 * 7;\r
+ while (mclk_z80 - mclk_line >= 488 * 7)\r
+ Pico.t.z80_scanline++, mclk_line += 488 * 7;\r
+ return Pico.t.z80_scanline;\r
}\r
\r
return Pico.m.scanline;\r
int xcycles = z80_cycles << 8;\r
\r
/* check for overflows */\r
- if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r
+ if ((mode_old & 4) && xcycles > Pico.t.timer_a_next_oflow)\r
ym2612.OPN.ST.status |= 1;\r
\r
- if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r
+ if ((mode_old & 8) && xcycles > Pico.t.timer_b_next_oflow)\r
ym2612.OPN.ST.status |= 2;\r
\r
/* update timer a */\r
if (mode_old & 1)\r
- while (xcycles > timer_a_next_oflow)\r
- timer_a_next_oflow += timer_a_step;\r
+ while (xcycles > Pico.t.timer_a_next_oflow)\r
+ Pico.t.timer_a_next_oflow += Pico.t.timer_a_step;\r
\r
if ((mode_old ^ mode_new) & 1) // turning on/off\r
{\r
if (mode_old & 1)\r
- timer_a_next_oflow = TIMER_NO_OFLOW;\r
+ Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;\r
else\r
- timer_a_next_oflow = xcycles + timer_a_step;\r
+ Pico.t.timer_a_next_oflow = xcycles + Pico.t.timer_a_step;\r
}\r
if (mode_new & 1)\r
- elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r
+ elprintf(EL_YMTIMER, "timer a upd to %i @ %i", Pico.t.timer_a_next_oflow>>8, z80_cycles);\r
\r
/* update timer b */\r
if (mode_old & 2)\r
- while (xcycles > timer_b_next_oflow)\r
- timer_b_next_oflow += timer_b_step;\r
+ while (xcycles > Pico.t.timer_b_next_oflow)\r
+ Pico.t.timer_b_next_oflow += Pico.t.timer_b_step;\r
\r
if ((mode_old ^ mode_new) & 2)\r
{\r
if (mode_old & 2)\r
- timer_b_next_oflow = TIMER_NO_OFLOW;\r
+ Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;\r
else\r
- timer_b_next_oflow = xcycles + timer_b_step;\r
+ Pico.t.timer_b_next_oflow = xcycles + Pico.t.timer_b_step;\r
}\r
if (mode_new & 2)\r
- elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r
+ elprintf(EL_YMTIMER, "timer b upd to %i @ %i", Pico.t.timer_b_next_oflow>>8, z80_cycles);\r
}\r
\r
// ym2612 DAC and timer I/O handlers for z80\r
if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r
{\r
int scanline = get_scanline(is_from_z80);\r
- //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
+ //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", Pico.snd.dac_line, scanline, d, is_from_z80);\r
ym2612.dacout = ((int)d - 0x80) << 6;\r
if (ym2612.dacen)\r
PsndDoDAC(scanline);\r
ym2612.OPN.ST.address = d;\r
ym2612.addr_A1 = 0;\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
+ if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
#endif\r
return 0;\r
\r
ym2612.OPN.ST.TA = TAnew;\r
//ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r
//ym2612.OPN.ST.TAT = 0;\r
- timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
+ Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
if (ym2612.OPN.ST.mode & 1) {\r
// this is not right, should really be done on overflow only\r
int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
- timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
+ Pico.t.timer_a_next_oflow = (cycles << 8) + Pico.t.timer_a_step;\r
}\r
- elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
+ elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, Pico.t.timer_a_next_oflow>>8);\r
}\r
return 0;\r
}\r
ym2612.OPN.ST.TB = d;\r
//ym2612.OPN.ST.TBC = (256-d) * 288;\r
//ym2612.OPN.ST.TBT = 0;\r
- timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
+ Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
if (ym2612.OPN.ST.mode & 2) {\r
int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
- timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
+ Pico.t.timer_b_next_oflow = (cycles << 8) + Pico.t.timer_b_step;\r
}\r
- elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
+ elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, Pico.t.timer_b_next_oflow>>8);\r
}\r
return 0;\r
case 0x27: { /* mode, timer control */\r
\r
if ((d ^ old_mode) & 0xc0) {\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
+ if (PicoIn.opt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
#endif\r
return 1;\r
}\r
int scanline = get_scanline(is_from_z80);\r
if (ym2612.dacen != (d & 0x80)) {\r
ym2612.dacen = d & 0x80;\r
- PsndDacLine = scanline;\r
+ Pico.snd.dac_line = scanline;\r
}\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
+ if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
#endif\r
return 0;\r
}\r
ym2612.OPN.ST.address = d;\r
ym2612.addr_A1 = 1;\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
+ if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
#endif\r
return 0;\r
\r
}\r
\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM)\r
+ if (PicoIn.opt & POPT_EXT_FM)\r
return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
#endif\r
return YM2612Write_(a, d);\r
\r
\r
#define ym2612_read_local() \\r
- if (xcycles >= timer_a_next_oflow) \\r
+ if (xcycles >= Pico.t.timer_a_next_oflow) \\r
ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r
- if (xcycles >= timer_b_next_oflow) \\r
+ if (xcycles >= Pico.t.timer_b_next_oflow) \\r
ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
\r
static u32 ym2612_read_local_z80(void)\r
\r
ym2612_read_local();\r
\r
- elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
- timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
+ elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i",\r
+ ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,\r
+ Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);\r
return ym2612.OPN.ST.status;\r
}\r
\r
\r
ym2612_read_local();\r
\r
- elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
- timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
+ elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i",\r
+ ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,\r
+ Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);\r
return ym2612.OPN.ST.status;\r
}\r
\r
int tac, tat = 0, tbc, tbt = 0;\r
tac = 1024 - ym2612.OPN.ST.TA;\r
tbc = 256 - ym2612.OPN.ST.TB;\r
- if (timer_a_next_oflow != TIMER_NO_OFLOW)\r
- tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r
- if (timer_b_next_oflow != TIMER_NO_OFLOW)\r
- tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r
+ if (Pico.t.timer_a_next_oflow != TIMER_NO_OFLOW)\r
+ tat = (int)((double)(Pico.t.timer_a_step - Pico.t.timer_a_next_oflow)\r
+ / (double)Pico.t.timer_a_step * tac * 65536);\r
+ if (Pico.t.timer_b_next_oflow != TIMER_NO_OFLOW)\r
+ tbt = (int)((double)(Pico.t.timer_b_step - Pico.t.timer_b_next_oflow)\r
+ / (double)Pico.t.timer_b_step * tbc * 65536);\r
elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r
elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r
\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM)\r
+ if (PicoIn.opt & POPT_EXT_FM)\r
YM2612PicoStateSave2_940(tat, tbt);\r
else\r
#endif\r
}\r
\r
#ifdef __GP2X__\r
- if (PicoOpt & POPT_EXT_FM)\r
+ if (PicoIn.opt & POPT_EXT_FM)\r
ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r
else\r
#endif\r
tac = (1024 - ym2612.OPN.ST.TA) << 16;\r
tbc = (256 - ym2612.OPN.ST.TB) << 16;\r
if (ym2612.OPN.ST.mode & 1)\r
- timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r
+ Pico.t.timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * Pico.t.timer_a_step);\r
else\r
- timer_a_next_oflow = TIMER_NO_OFLOW;\r
+ Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;\r
if (ym2612.OPN.ST.mode & 2)\r
- timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r
+ Pico.t.timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * Pico.t.timer_b_step);\r
else\r
- timer_b_next_oflow = TIMER_NO_OFLOW;\r
- elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r
- elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
+ Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;\r
+ elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, Pico.t.timer_a_next_oflow >> 8);\r
+ elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, Pico.t.timer_b_next_oflow >> 8);\r
}\r
\r
#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
\r
static unsigned char z80_md_vdp_read(unsigned short a)\r
{\r
+ z80_subCLeft(2);\r
+\r
if ((a & 0x00f0) == 0x0000) {\r
switch (a & 0x0d)\r
{\r
unsigned int addr68k;\r
unsigned char ret;\r
\r
- addr68k = Pico.m.z80_bank68k<<15;\r
- addr68k += a & 0x7fff;\r
+ z80_subCLeft(3);\r
+\r
+ addr68k = Pico.m.z80_bank68k << 15;\r
+ addr68k |= a & 0x7fff;\r
\r
ret = m68k_read8(addr68k);\r
\r
\r
static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r
{\r
- if (PicoOpt & POPT_EN_FM)\r
- emustatus |= ym2612_write_local(a, data, 1) & 1;\r
+ if (PicoIn.opt & POPT_EN_FM)\r
+ Pico.m.status |= ym2612_write_local(a, data, 1) & 1;\r
}\r
\r
static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
\r
static void z80_mem_setup(void)\r
{\r
- z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r
- z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_read_map, 0x0000, 0x1fff, PicoMem.zram, 0);\r
+ z80_map_set(z80_read_map, 0x2000, 0x3fff, PicoMem.zram, 0);\r
z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r
z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r
z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r
\r
- z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r
- z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_write_map, 0x0000, 0x1fff, PicoMem.zram, 0);\r
+ z80_map_set(z80_write_map, 0x2000, 0x3fff, PicoMem.zram, 0);\r
z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r
z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r
z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r
drZ80.z80_out = z80_md_out;\r
#endif\r
#ifdef _USE_CZ80\r
- Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r
- Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)PicoMem.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)PicoMem.zram); // mirror\r
Cz80_Set_INPort(&CZ80, z80_md_in);\r
Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
#endif\r
notaz.gp2x.de / picodrive.git / blobdiff