-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006,2007 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
-\r
+/*\r
+ * memory handling\r
+ * (c) Copyright Dave, 2004\r
+ * (C) notaz, 2006-2010\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "pico_int.h"\r
+#include "memory.h"\r
\r
#include "sound/ym2612.h"\r
#include "sound/sn76496.h"\r
\r
-#ifndef UTYPES_DEFINED\r
-typedef unsigned char u8;\r
-typedef unsigned short u16;\r
-typedef unsigned int u32;\r
-#define UTYPES_DEFINED\r
+extern unsigned int lastSSRamWrite; // used by serial eeprom code\r
+\r
+uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
+\r
+static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
+{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
#endif\r
+ uptr addr = (uptr)func_or_mh;\r
+ int mask = (1 << shift) - 1;\r
+ int i;\r
\r
-extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
+ if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {\r
+ elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",\r
+ start_addr, end_addr);\r
+ return;\r
+ }\r
\r
-#ifdef _ASM_MEMORY_C\r
-u32 PicoRead8(u32 a);\r
-u32 PicoRead16(u32 a);\r
-void PicoWrite8(u32 a,u8 d);\r
-void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
+ if (addr & 1) {\r
+ elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);\r
+ return;\r
+ }\r
+\r
+ if (!is_func)\r
+ addr -= start_addr;\r
+\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
+ map[i] = addr >> 1;\r
+ if (is_func)\r
+ map[i] |= MAP_FLAG;\r
+ }\r
+}\r
+\r
+void z80_map_set(uptr *map, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
+{\r
+ xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
+}\r
+\r
+void cpu68k_map_set(uptr *map, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
+{\r
+ xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
+#ifdef EMU_F68K\r
+ // setup FAME fetchmap\r
+ if (!is_func)\r
+ {\r
+ int shiftout = 24 - FAMEC_FETCHBITS;\r
+ int i = start_addr >> shiftout;\r
+ uptr base = (uptr)func_or_mh - (i << shiftout);\r
+ for (; i <= (end_addr >> shiftout); i++)\r
+ PicoCpuFM68k.Fetch[i] = base;\r
+ }\r
+#endif\r
+}\r
+\r
+// more specialized/optimized function (does same as above)\r
+void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r
+{\r
+ uptr *r8map, *r16map, *w8map, *w16map;\r
+ uptr addr = (uptr)ptr;\r
+ int shift = M68K_MEM_SHIFT;\r
+ int i;\r
+\r
+ if (!is_sub) {\r
+ r8map = m68k_read8_map;\r
+ r16map = m68k_read16_map;\r
+ w8map = m68k_write8_map;\r
+ w16map = m68k_write16_map;\r
+ } else {\r
+ r8map = s68k_read8_map;\r
+ r16map = s68k_read16_map;\r
+ w8map = s68k_write8_map;\r
+ w16map = s68k_write16_map;\r
+ }\r
+\r
+ addr -= start_addr;\r
+ addr >>= 1;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;\r
+#ifdef EMU_F68K\r
+ // setup FAME fetchmap\r
+ {\r
+ M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
+ int shiftout = 24 - FAMEC_FETCHBITS;\r
+ i = start_addr >> shiftout;\r
+ addr = (uptr)ptr - (i << shiftout);\r
+ for (; i <= (end_addr >> shiftout); i++)\r
+ ctx->Fetch[i] = addr;\r
+ }\r
+#endif\r
+}\r
+\r
+static u32 m68k_unmapped_read8(u32 a)\r
+{\r
+ elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r
+ return 0; // assume pulldown, as if MegaCD2 was attached\r
+}\r
+\r
+static u32 m68k_unmapped_read16(u32 a)\r
+{\r
+ elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);\r
+ return 0;\r
+}\r
+\r
+static void m68k_unmapped_write8(u32 a, u32 d)\r
+{\r
+ elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
+}\r
+\r
+static void m68k_unmapped_write16(u32 a, u32 d)\r
+{\r
+ elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
+}\r
+\r
+void m68k_map_unmap(int start_addr, int end_addr)\r
+{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
#endif\r
+ uptr addr;\r
+ int shift = M68K_MEM_SHIFT;\r
+ int i;\r
+\r
+ addr = (uptr)m68k_unmapped_read8;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
+ addr = (uptr)m68k_unmapped_read16;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;\r
+\r
+ addr = (uptr)m68k_unmapped_write8;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;\r
+\r
+ addr = (uptr)m68k_unmapped_write16;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;\r
+}\r
+\r
+MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r
+MAKE_68K_READ16(m68k_read16, m68k_read16_map)\r
+MAKE_68K_READ32(m68k_read32, m68k_read16_map)\r
+MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)\r
+MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)\r
+MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)\r
+\r
+// -----------------------------------------------------------------\r
+\r
+static u32 ym2612_read_local_68k(void);\r
+static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r
+static void z80_mem_setup(void);\r
+\r
+#ifdef _ASM_MEMORY_C\r
+u32 PicoRead8_sram(u32 a);\r
+u32 PicoRead16_sram(u32 a);\r
+#endif\r
\r
#ifdef EMU_CORE_DEBUG\r
u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
#endif\r
\r
#if defined(EMU_C68K)\r
-static __inline int PicoMemBase(u32 pc)\r
+void cyclone_crashed(u32 pc, struct Cyclone *context)\r
{\r
- int membase=0;\r
+ elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r
+ context == &PicoCpuCM68k ? 'm' : 's', pc);\r
+ context->membase = (u32)Pico.rom;\r
+ context->pc = (u32)Pico.rom + Pico.romsize;\r
+}\r
+#endif\r
\r
- if (pc<Pico.romsize+4)\r
- {\r
- membase=(int)Pico.rom; // Program Counter in Rom\r
- }\r
- else if ((pc&0xe00000)==0xe00000)\r
- {\r
- membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
- }\r
+// -----------------------------------------------------------------\r
+// memmap helpers\r
+\r
+static u32 read_pad_3btn(int i, u32 out_bits)\r
+{\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 value;\r
+\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
else\r
- {\r
- // Error - Program Counter is invalid\r
- membase=(int)Pico.rom;\r
- }\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- return membase;\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
-#endif\r
\r
-\r
-PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
+static u32 read_pad_6btn(int i, u32 out_bits)\r
{\r
- u32 ret=0;\r
-#if defined(EMU_C68K)\r
- pc-=PicoCpuCM68k.membase; // Get real pc\r
-// pc&=0xfffffe;\r
- pc&=~1;\r
- if ((pc<<8) == 0)\r
- {\r
- elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",\r
- Pico.m.frame_count, Pico.m.scanline, SekPc);\r
- return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ int phase = Pico.m.padTHPhase[i];\r
+ u32 value;\r
+\r
+ if (phase == 2 && !(out_bits & 0x40)) {\r
+ value = (pad & 0xc0) >> 2; // ?0SA 0000\r
+ goto out;\r
+ }\r
+ else if(phase == 3) {\r
+ if (out_bits & 0x40)\r
+ return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r
+ else\r
+ return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r
+ goto out;\r
}\r
\r
- PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
- PicoCpuCM68k.membase-=pc&0xff000000;\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- ret = PicoCpuCM68k.membase+pc;\r
-#endif\r
- return ret;\r
+out:\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
\r
+static u32 read_nothing(int i, u32 out_bits)\r
+{\r
+ return 0xff;\r
+}\r
+\r
+typedef u32 (port_read_func)(int index, u32 out_bits);\r
+\r
+static port_read_func *port_readers[3] = {\r
+ read_pad_3btn,\r
+ read_pad_3btn,\r
+ read_nothing\r
+};\r
\r
-PICO_INTERNAL void PicoInitPc(u32 pc)\r
+static NOINLINE u32 port_read(int i)\r
{\r
- PicoCheckPc(pc);\r
+ u32 data_reg = Pico.ioports[i + 1];\r
+ u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r
+ u32 in, out;\r
+\r
+ out = data_reg & ctrl_reg;\r
+ out |= 0x7f & ~ctrl_reg; // pull-ups\r
+\r
+ in = port_readers[i](i, out);\r
+\r
+ return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r
}\r
\r
-#ifndef _ASM_MEMORY_C\r
-PICO_INTERNAL_ASM void PicoMemReset(void)\r
+void PicoSetInputDevice(int port, enum input_device device)\r
{\r
+ port_read_func *func;\r
+\r
+ if (port < 0 || port > 2)\r
+ return;\r
+\r
+ switch (device) {\r
+ case PICO_INPUT_PAD_3BTN:\r
+ func = read_pad_3btn;\r
+ break;\r
+\r
+ case PICO_INPUT_PAD_6BTN:\r
+ func = read_pad_6btn;\r
+ break;\r
+\r
+ default:\r
+ func = read_nothing;\r
+ break;\r
+ }\r
+\r
+ port_readers[port] = func;\r
}\r
-#endif\r
\r
-// -----------------------------------------------------------------\r
+NOINLINE u32 io_ports_read(u32 a)\r
+{\r
+ u32 d;\r
+ a = (a>>1) & 0xf;\r
+ switch (a) {\r
+ case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r
+ case 1: d = port_read(0); break;\r
+ case 2: d = port_read(1); break;\r
+ case 3: d = port_read(2); break;\r
+ default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
+ }\r
+ return d;\r
+}\r
\r
-int PadRead(int i)\r
+NOINLINE void io_ports_write(u32 a, u32 d)\r
{\r
- int pad,value,data_reg;\r
- pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
- data_reg=Pico.ioports[i+1];\r
+ a = (a>>1) & 0xf;\r
\r
- // orr the bits, which are set as output\r
- value = data_reg&(Pico.ioports[i+4]|0x80);\r
+ // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
+ if (1 <= a && a <= 2)\r
+ {\r
+ Pico.m.padDelay[a - 1] = 0;\r
+ if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
+ Pico.m.padTHPhase[a - 1]++;\r
+ }\r
\r
- if (PicoOpt & POPT_6BTN_PAD)\r
+ // certain IO ports can be used as RAM\r
+ Pico.ioports[a] = d;\r
+}\r
+\r
+// lame..\r
+static int z80_cycles_from_68k(void)\r
+{\r
+ return z80_cycle_aim\r
+ + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r
+}\r
+\r
+void NOINLINE ctl_write_z80busreq(u32 d)\r
+{\r
+ d&=1; d^=1;\r
+ elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r
+ if (d ^ Pico.m.z80Run)\r
{\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !(data_reg&0x40)) { // TH\r
- value|=(pad&0xc0)>>2; // ?0SA 0000\r
- return value;\r
- } else if(phase == 3) {\r
- if(data_reg&0x40)\r
- value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- else\r
- value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- return value;\r
+ if (d)\r
+ {\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
+ }\r
+ else\r
+ {\r
+ if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
+ pprof_start(m68k);\r
+ PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
}\r
+ Pico.m.z80Run = d;\r
}\r
+}\r
\r
- if(data_reg&0x40) // TH\r
- value|=(pad&0x3f); // ?1CB RLDU\r
- else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
-\r
- return value; // will mirror later\r
+void NOINLINE ctl_write_z80reset(u32 d)\r
+{\r
+ d&=1; d^=1;\r
+ elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r
+ if (d ^ Pico.m.z80_reset)\r
+ {\r
+ if (d)\r
+ {\r
+ if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r
+ pprof_start(m68k);\r
+ PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
+ YM2612ResetChip();\r
+ timers_reset();\r
+ }\r
+ else\r
+ {\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
+ z80_reset();\r
+ }\r
+ Pico.m.z80_reset = d;\r
+ }\r
}\r
\r
+// -----------------------------------------------------------------\r
\r
#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-u32 SRAMRead(u32 a)\r
+\r
+// cart (save) RAM area (usually 0x200000 - ...)\r
+static u32 PicoRead8_sram(u32 a)\r
{\r
- unsigned int sreg = Pico.m.sram_reg;\r
- if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
- elprintf(EL_SRAMIO, "normal sram detected.");\r
- Pico.m.sram_reg|=0x10; // should be normal SRAM\r
+ u32 d;\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
+ {\r
+ if (SRam.flags & SRF_EEPROM) {\r
+ d = EEPROM_read();\r
+ if (!(a & 1))\r
+ d >>= 8;\r
+ } else\r
+ d = *(u8 *)(SRam.data - SRam.start + a);\r
+ elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
+ return d;\r
}\r
- if (sreg & 4) // EEPROM read\r
- return SRAMReadEEPROM();\r
- else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
- return *(u8 *)(SRam.data-SRam.start+a);\r
+\r
+ // XXX: this is banking unfriendly\r
+ if (a < Pico.romsize)\r
+ return Pico.rom[a ^ 1];\r
+ \r
+ return m68k_unmapped_read8(a);\r
}\r
\r
-#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-u32 SRAMRead16(u32 a)\r
+static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (Pico.m.sram_reg & 4) {\r
- d = SRAMReadEEPROM();\r
- d |= d << 8;\r
- } else {\r
- u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
- d =*pm++ << 8;\r
- d|=*pm++;\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
+ {\r
+ if (SRam.flags & SRF_EEPROM)\r
+ d = EEPROM_read();\r
+ else {\r
+ u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ d = pm[0] << 8;\r
+ d |= pm[1];\r
+ }\r
+ elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
+ return d;\r
}\r
- return d;\r
+\r
+ if (a < Pico.romsize)\r
+ return *(u16 *)(Pico.rom + a);\r
+\r
+ return m68k_unmapped_read16(a);\r
}\r
\r
-static void SRAMWrite(u32 a, u32 d)\r
+#endif // _ASM_MEMORY_C\r
+\r
+static void PicoWrite8_sram(u32 a, u32 d)\r
{\r
- unsigned int sreg = Pico.m.sram_reg;\r
- if(!(sreg & 0x10)) {\r
- // not detected SRAM\r
- if((a&~1)==0x200000) {\r
- elprintf(EL_SRAMIO, "eeprom detected.");\r
- sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
- SRam.start=0x200000; SRam.end=SRam.start+1;\r
- } else\r
- elprintf(EL_SRAMIO, "normal sram detected.");\r
- sreg|=0x10;\r
- Pico.m.sram_reg=sreg;\r
+ if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ m68k_unmapped_write8(a, d);\r
+ return;\r
}\r
- if(sreg & 4) { // EEPROM write\r
- // this diff must be at most 16 for NBA Jam to work\r
- if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
- // just update pending state\r
- elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
- SRAMUpdPending(a, d);\r
- } else {\r
- int old=sreg;\r
- SRAMWriteEEPROM(sreg>>6); // execute pending\r
- SRAMUpdPending(a, d);\r
- if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
- lastSSRamWrite = SekCyclesDoneT();\r
- }\r
- } else if(!(sreg & 2)) {\r
- u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
- if(*pm != (u8)d) {\r
+\r
+ elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r
+ if (SRam.flags & SRF_EEPROM)\r
+ {\r
+ EEPROM_write8(a, d);\r
+ }\r
+ else {\r
+ u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ if (*pm != (u8)d) {\r
SRam.changed = 1;\r
- *pm=(u8)d;\r
+ *pm = (u8)d;\r
}\r
}\r
}\r
\r
-// for nonstandard reads\r
-static u32 OtherRead16End(u32 a, int realsize)\r
+static void PicoWrite16_sram(u32 a, u32 d)\r
{\r
- u32 d=0;\r
+ if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
+ m68k_unmapped_write16(a, d);\r
+ return;\r
+ }\r
\r
- // 32x test\r
-/*\r
- if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
- else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
- else if (a == 0xa15100) { d = 0x0080; goto end; }\r
- else\r
-*/\r
-\r
- // for games with simple protection devices, discovered by Haze\r
- // some dumb detection is used, but that should be enough to make things work\r
- if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
- if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
- if (a == 0x400000) { d=0x55<<8; goto end; }\r
- else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
- }\r
- else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
- if (a == 0x400000) { d=0x55<<8; goto end; }\r
- else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
- else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
- else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
- }\r
- else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
- if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
- else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
- // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
- }\r
- else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
- if (a == 0x400000) { d=0x90<<8; goto end; }\r
- else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
- // checks the result, which is of the above one. Left it just in case.\r
- }\r
- else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
- if (a == 0x400000) { d=0x55<<8; goto end; }\r
- else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
- else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
- else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
- }\r
- // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
- // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
- // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
- d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
+ elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r
+ if (SRam.flags & SRF_EEPROM)\r
+ {\r
+ EEPROM_write16(d);\r
}\r
- else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
- if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
- d=0x0c; goto end;\r
- }\r
- else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
- d=0x28; goto end; // does the check from RAM\r
- }\r
- else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
- d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
+ else {\r
+ u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
+ if (pm[0] != (u8)(d >> 8)) {\r
+ SRam.changed = 1;\r
+ pm[0] = (u8)(d >> 8);\r
}\r
- else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
- d=0x0a; goto end;\r
+ if (pm[1] != (u8)d) {\r
+ SRam.changed = 1;\r
+ pm[1] = (u8)d;\r
}\r
}\r
- else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
- d=0x01; goto end;\r
- }\r
- else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
- d=0x1f; goto end;\r
- }\r
- else if (a == 0x30fe02) {\r
- // Virtua Racing - just for fun\r
- // this seems to be some flag that SVP is ready or something similar\r
- d=1; goto end;\r
+}\r
+\r
+// z80 area (0xa00000 - 0xa0ffff)\r
+// TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r
+static u32 PicoRead8_z80(u32 a)\r
+{\r
+ u32 d = 0xff;\r
+ if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
+ elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r
+ // open bus. Pulled down if MegaCD2 is attached.\r
+ return 0;\r
}\r
\r
-end:\r
- elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ if ((a & 0x4000) == 0x0000)\r
+ d = Pico.zram[a & 0x1fff];\r
+ else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r
+ d = ym2612_read_local_68k(); \r
+ else\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
return d;\r
}\r
\r
+static u32 PicoRead16_z80(u32 a)\r
+{\r
+ u32 d = PicoRead8_z80(a);\r
+ return d | (d << 8);\r
+}\r
\r
-//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
-\r
-static void OtherWrite8End(u32 a,u32 d,int realsize)\r
+static void PicoWrite8_z80(u32 a, u32 d)\r
{\r
- // sram\r
- if(a >= SRam.start && a <= SRam.end) {\r
- elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc);\r
- SRAMWrite(a, d);\r
+ if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
+ // verified on real hw\r
+ elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
return;\r
}\r
\r
-#ifdef _ASM_MEMORY_C\r
- // special ROM hardware (currently only banking and sram reg supported)\r
- if((a&0xfffff1) == 0xA130F1) {\r
- PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
+ if ((a & 0x4000) == 0x0000) { // z80 RAM\r
+ SekCyclesBurnRun(2); // FIXME hack\r
+ Pico.zram[a & 0x1fff] = (u8)d;\r
return;\r
}\r
-#else\r
- // sram access register\r
- if(a == 0xA130F1) {\r
- elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
- Pico.m.sram_reg &= ~3;\r
- Pico.m.sram_reg |= (u8)(d&3);\r
+ if ((a & 0x6000) == 0x4000) { // FM Sound\r
+ if (PicoOpt & POPT_EN_FM)\r
+ emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r
return;\r
}\r
-#endif\r
- elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
-\r
- // for games with simple protection devices, discovered by Haze\r
- if ((a>>22) == 1)\r
- Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
+ // TODO: probably other VDP access too? Maybe more mirrors?\r
+ if ((a & 0x7ff9) == 0x7f11) { // PSG Sound\r
+ if (PicoOpt & POPT_EN_PSG)\r
+ SN76496Write(d);\r
+ return;\r
+ }\r
+ if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r
+ {\r
+ Pico.m.z80_bank68k >>= 1;\r
+ Pico.m.z80_bank68k |= d << 8;\r
+ Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r
+ elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r
+ return;\r
+ }\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
}\r
\r
-#include "memory_cmn.c"\r
-\r
-\r
-// -----------------------------------------------------------------\r
-// Read Rom and read Ram\r
-\r
-#ifndef _ASM_MEMORY_C\r
-PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
+static void PicoWrite16_z80(u32 a, u32 d)\r
{\r
- u32 d=0;\r
+ // for RAM, only most significant byte is sent\r
+ // TODO: verify remaining accesses\r
+ PicoWrite8_z80(a, d >> 8);\r
+}\r
\r
- if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
+#ifndef _ASM_MEMORY_C\r
\r
- a&=0xffffff;\r
+// IO/control area (0xa10000 - 0xa1ffff)\r
+u32 PicoRead8_io(u32 a)\r
+{\r
+ u32 d;\r
\r
-#ifndef EMU_CORE_DEBUG\r
- // sram\r
- if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
- d = SRAMRead(a);\r
- elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
+ if ((a & 0xffe0) == 0x0000) { // I/O ports\r
+ d = io_ports_read(a);\r
goto end;\r
}\r
-#endif\r
\r
- if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
- log_io(a, 8, 0);\r
- if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
+ // faking open bus (MegaCD pulldowns don't work here curiously)\r
+ d = Pico.m.rotate++;\r
+ d ^= d << 6;\r
\r
- if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead8(a); goto end; } // VDP\r
+ if ((a & 0xfc00) == 0x1000) {\r
+ // bit8 seems to be readable in this range\r
+ if (!(a & 1))\r
+ d &= ~0x01;\r
\r
- d=OtherRead16(a&~1, 8);\r
- if ((a&1)==0) d>>=8;\r
+ if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r
+ d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
+ elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ }\r
+ goto end;\r
+ }\r
\r
-end:\r
- elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = (u8)d;\r
+ if (PicoOpt & POPT_EN_32X) {\r
+ d = PicoRead8_32x(a);\r
+ goto end;\r
}\r
-#endif\r
+\r
+ d = m68k_unmapped_read8(a);\r
+end:\r
return d;\r
}\r
\r
-PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
+u32 PicoRead16_io(u32 a)\r
{\r
- u32 d=0;\r
+ u32 d;\r
\r
- if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
+ if ((a & 0xffe0) == 0x0000) { // I/O ports\r
+ d = io_ports_read(a);\r
+ d |= d << 8;\r
+ goto end;\r
+ }\r
\r
- a&=0xfffffe;\r
+ // faking open bus\r
+ d = (Pico.m.rotate += 0x41);\r
+ d ^= (d << 5) ^ (d << 8);\r
\r
-#ifndef EMU_CORE_DEBUG\r
- // sram\r
- if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
- d = SRAMRead16(a);\r
- elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
+ // bit8 seems to be readable in this range\r
+ if ((a & 0xfc00) == 0x1000) {\r
+ d &= ~0x0100;\r
+\r
+ if ((a & 0xff00) == 0x1100) { // z80 busreq\r
+ d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
+ elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ }\r
goto end;\r
}\r
-#endif\r
-\r
- if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
- log_io(a, 16, 0);\r
\r
- if ((a&0xe700e0)==0xc00000)\r
- d = PicoVideoRead(a);\r
- else d = OtherRead16(a, 16);\r
+ if (PicoOpt & POPT_EN_32X) {\r
+ d = PicoRead16_32x(a);\r
+ goto end;\r
+ }\r
\r
+ d = m68k_unmapped_read16(a);\r
end:\r
- elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = d;\r
- }\r
-#endif\r
return d;\r
}\r
\r
-PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
+void PicoWrite8_io(u32 a, u32 d)\r
{\r
- u32 d=0;\r
-\r
- if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
-\r
- a&=0xfffffe;\r
-\r
- // sram\r
- if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
- d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
- elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
- goto end;\r
+ if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)\r
+ io_ports_write(a, d);\r
+ return;\r
+ }\r
+ if ((a & 0xff01) == 0x1100) { // z80 busreq\r
+ ctl_write_z80busreq(d);\r
+ return;\r
+ }\r
+ if ((a & 0xff01) == 0x1200) { // z80 reset\r
+ ctl_write_z80reset(d);\r
+ return;\r
+ }\r
+ if (a == 0xa130f1) { // sram access register\r
+ elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
+ Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
+ Pico.m.sram_reg |= (u8)(d & 3);\r
+ return;\r
+ }\r
+ if (PicoOpt & POPT_EN_32X) {\r
+ PicoWrite8_32x(a, d);\r
+ return;\r
}\r
\r
- if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
- log_io(a, 32, 0);\r
-\r
- if ((a&0xe700e0)==0xc00000)\r
- d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
- else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
+ m68k_unmapped_write8(a, d);\r
+}\r
\r
-end:\r
- elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = d;\r
+void PicoWrite16_io(u32 a, u32 d)\r
+{\r
+ if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)\r
+ io_ports_write(a, d);\r
+ return;\r
}\r
-#endif\r
- return d;\r
+ if ((a & 0xff00) == 0x1100) { // z80 busreq\r
+ ctl_write_z80busreq(d >> 8);\r
+ return;\r
+ }\r
+ if ((a & 0xff00) == 0x1200) { // z80 reset\r
+ ctl_write_z80reset(d >> 8);\r
+ return;\r
+ }\r
+ if (a == 0xa130f0) { // sram access register\r
+ elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
+ Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
+ Pico.m.sram_reg |= (u8)(d & 3);\r
+ return;\r
+ }\r
+ if (PicoOpt & POPT_EN_32X) {\r
+ PicoWrite16_32x(a, d);\r
+ return;\r
+ }\r
+ m68k_unmapped_write16(a, d);\r
}\r
-#endif\r
\r
-// -----------------------------------------------------------------\r
-// Write Ram\r
+#endif // _ASM_MEMORY_C\r
\r
-#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
-PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
+// VDP area (0xc00000 - 0xdfffff)\r
+// TODO: verify if lower byte goes to PSG on word writes\r
+static u32 PicoRead8_vdp(u32 a)\r
{\r
- elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
- log_io(a, 8, 1);\r
+ if ((a & 0x00e0) == 0x0000)\r
+ return PicoVideoRead8(a);\r
\r
- a&=0xffffff;\r
- OtherWrite8(a,d);\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
+ return 0;\r
}\r
-#endif\r
\r
-void PicoWrite16(u32 a,u16 d)\r
+static u32 PicoRead16_vdp(u32 a)\r
{\r
- elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
- log_io(a, 16, 1);\r
+ if ((a & 0x00e0) == 0x0000)\r
+ return PicoVideoRead(a);\r
\r
- a&=0xfffffe;\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
- OtherWrite16(a,d);\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
+ return 0;\r
}\r
\r
-static void PicoWrite32(u32 a,u32 d)\r
+static void PicoWrite8_vdp(u32 a, u32 d)\r
{\r
- elprintf(EL_IO, "w32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000)\r
- {\r
- // Ram:\r
- u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ if ((a & 0x00f9) == 0x0011) { // PSG Sound\r
+ if (PicoOpt & POPT_EN_PSG)\r
+ SN76496Write(d);\r
return;\r
}\r
- log_io(a, 32, 1);\r
-\r
- a&=0xfffffe;\r
- if ((a&0xe700e0)==0xc00000)\r
- {\r
- // VDP:\r
- PicoVideoWrite(a, (u16)(d>>16));\r
- PicoVideoWrite(a+2,(u16)d);\r
+ if ((a & 0x00e0) == 0x0000) {\r
+ d &= 0xff;\r
+ PicoVideoWrite(a, d | (d << 8));\r
return;\r
}\r
\r
- OtherWrite16(a, (u16)(d>>16));\r
- OtherWrite16(a+2,(u16)d);\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
}\r
\r
-\r
-// -----------------------------------------------------------------\r
-\r
-static void OtherWrite16End(u32 a,u32 d,int realsize)\r
+static void PicoWrite16_vdp(u32 a, u32 d)\r
{\r
- PicoWrite8Hook(a, d>>8, realsize);\r
- PicoWrite8Hook(a+1,d&0xff, realsize);\r
-}\r
-\r
-u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
-void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
-void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
+ if ((a & 0x00f9) == 0x0010) { // PSG Sound\r
+ if (PicoOpt & POPT_EN_PSG)\r
+ SN76496Write(d);\r
+ return;\r
+ }\r
+ if ((a & 0x00e0) == 0x0000) {\r
+ PicoVideoWrite(a, d);\r
+ return;\r
+ }\r
\r
-PICO_INTERNAL void PicoMemResetHooks(void)\r
-{\r
- // default unmapped/cart specific handlers\r
- PicoRead16Hook = OtherRead16End;\r
- PicoWrite8Hook = OtherWrite8End;\r
- PicoWrite16Hook = OtherWrite16End;\r
+ elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
}\r
\r
+// -----------------------------------------------------------------\r
+\r
#ifdef EMU_M68K\r
static void m68k_mem_setup(void);\r
#endif\r
\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
+ int mask, rs, a;\r
+\r
+ // setup the memory map\r
+ cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r
+\r
+ // ROM\r
+ // align to bank size. We know ROM loader allocated enough for this\r
+ mask = (1 << M68K_MEM_SHIFT) - 1;\r
+ rs = (Pico.romsize + mask) & ~mask;\r
+ cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r
+ cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r
+\r
+ // Common case of on-cart (save) RAM, usually at 0x200000-...\r
+ if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r
+ rs = SRam.end - SRam.start;\r
+ rs = (rs + mask) & ~mask;\r
+ if (SRam.start + rs >= 0x1000000)\r
+ rs = 0x1000000 - SRam.start;\r
+ cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r
+ cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r
+ cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r
+ cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r
+ }\r
+\r
+ // Z80 region\r
+ cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r
+\r
+ // IO/control region\r
+ cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r
+\r
+ // VDP region\r
+ for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r
+ if ((a & 0xe700e0) != 0xc00000)\r
+ continue;\r
+ cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r
+ cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r
+ cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r
+ cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r
+ }\r
+\r
+ // RAM and it's mirrors\r
+ for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r
+ cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r
+ cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r
+ cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r
+ cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r
+ }\r
+\r
// Setup memory callbacks:\r
#ifdef EMU_C68K\r
- PicoCpuCM68k.checkpc=PicoCheckPc;\r
- PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
- PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
- PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
- PicoCpuCM68k.write8 =PicoWrite8;\r
- PicoCpuCM68k.write16=PicoWrite16;\r
- PicoCpuCM68k.write32=PicoWrite32;\r
+ PicoCpuCM68k.read8 = (void *)m68k_read8_map;\r
+ PicoCpuCM68k.read16 = (void *)m68k_read16_map;\r
+ PicoCpuCM68k.read32 = (void *)m68k_read16_map;\r
+ PicoCpuCM68k.write8 = (void *)m68k_write8_map;\r
+ PicoCpuCM68k.write16 = (void *)m68k_write16_map;\r
+ PicoCpuCM68k.write32 = (void *)m68k_write16_map;\r
+ PicoCpuCM68k.checkpc = NULL; /* unused */\r
+ PicoCpuCM68k.fetch8 = NULL;\r
+ PicoCpuCM68k.fetch16 = NULL;\r
+ PicoCpuCM68k.fetch32 = NULL;\r
#endif\r
#ifdef EMU_F68K\r
- PicoCpuFM68k.read_byte =PicoRead8;\r
- PicoCpuFM68k.read_word =PicoRead16;\r
- PicoCpuFM68k.read_long =PicoRead32;\r
- PicoCpuFM68k.write_byte=PicoWrite8;\r
- PicoCpuFM68k.write_word=PicoWrite16;\r
- PicoCpuFM68k.write_long=PicoWrite32;\r
+ PicoCpuFM68k.read_byte = m68k_read8;\r
+ PicoCpuFM68k.read_word = m68k_read16;\r
+ PicoCpuFM68k.read_long = m68k_read32;\r
+ PicoCpuFM68k.write_byte = m68k_write8;\r
+ PicoCpuFM68k.write_word = m68k_write16;\r
+ PicoCpuFM68k.write_long = m68k_write32;\r
\r
// setup FAME fetchmap\r
{\r
int i;\r
// by default, point everything to first 64k of ROM\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
- // .. and RAM\r
- for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
+ // RAM already set\r
}\r
#endif\r
#ifdef EMU_M68K\r
m68k_mem_setup();\r
#endif\r
+\r
+ z80_mem_setup();\r
}\r
\r
-/* some nasty things below :( */\r
#ifdef EMU_M68K\r
unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
-unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
-\r
-// these are here for core debugging mode\r
-static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_8(a);\r
-}\r
-static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_16(a);\r
-}\r
-static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
-{\r
- a&=0xffffff;\r
- if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
-#ifdef EMU_CORE_DEBUG\r
- if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
-#endif\r
- return pm68k_read_memory_pcr_32(a);\r
-}\r
-\r
-unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
-unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
-unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
-unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
-unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
-unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
-unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
-unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
-\r
-static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- return 0;\r
-}\r
-\r
-static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- return 0;\r
-}\r
-\r
-static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
-{\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- return 0;\r
-}\r
-\r
-#ifdef EMU_CORE_DEBUG\r
-// ROM only\r
-unsigned int m68k_read_memory_8(unsigned int a)\r
-{\r
- u8 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- d = *(u8 *) (Pico.rom+(a^1));\r
- else d = (u8) lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-unsigned int m68k_read_memory_16(unsigned int a)\r
-{\r
- u16 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- d = *(u16 *)(Pico.rom+(a&~1));\r
- else d = (u16) lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-unsigned int m68k_read_memory_32(unsigned int a)\r
-{\r
- u32 d;\r
- if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
- { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
- else if (a <= 0x78) d = m68k_read_32(a, 0);\r
- else d = lastread_d[lrp_mus++&15];\r
- elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
- return d;\r
-}\r
-\r
-// ignore writes, Cyclone already done that\r
-void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
-\r
-#else // if !EMU_CORE_DEBUG\r
\r
/* it appears that Musashi doesn't always mask the unused bits */\r
unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
-#endif // !EMU_CORE_DEBUG\r
\r
static void m68k_mem_setup(void)\r
{\r
- pm68k_read_memory_8 = PicoRead8;\r
- pm68k_read_memory_16 = PicoRead16;\r
- pm68k_read_memory_32 = PicoRead32;\r
- pm68k_write_memory_8 = PicoWrite8;\r
- pm68k_write_memory_16 = PicoWrite16;\r
- pm68k_write_memory_32 = PicoWrite32;\r
- pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
- pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
- pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
+ pm68k_read_memory_8 = m68k_read8;\r
+ pm68k_read_memory_16 = m68k_read16;\r
+ pm68k_read_memory_32 = m68k_read32;\r
+ pm68k_write_memory_8 = m68k_write8;\r
+ pm68k_write_memory_16 = m68k_write16;\r
+ pm68k_write_memory_32 = m68k_write32;\r
}\r
#endif // EMU_M68K\r
\r
}\r
\r
// ym2612 DAC and timer I/O handlers for z80\r
-int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
+static int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
{\r
int addr;\r
\r
int scanline = get_scanline(is_from_z80);\r
//elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
ym2612.dacout = ((int)d - 0x80) << 6;\r
- if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r
+ if (ym2612.dacen)\r
PsndDoDAC(scanline);\r
return 0;\r
}\r
timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
if (ym2612.OPN.ST.mode & 1) {\r
// this is not right, should really be done on overflow only\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
}\r
elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
//ym2612.OPN.ST.TBT = 0;\r
timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
if (ym2612.OPN.ST.mode & 2) {\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
}\r
elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
return 0;\r
case 0x27: { /* mode, timer control */\r
int old_mode = ym2612.OPN.ST.mode;\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
ym2612.OPN.ST.mode = d;\r
\r
elprintf(EL_YMTIMER, "st mode %02x", d);\r
}\r
case 0x2b: { /* DAC Sel (YM2612) */\r
int scanline = get_scanline(is_from_z80);\r
- ym2612.dacen = d & 0x80;\r
- if (d & 0x80) PsndDacLine = scanline;\r
+ if (ym2612.dacen != (d & 0x80)) {\r
+ ym2612.dacen = d & 0x80;\r
+ PsndDacLine = scanline;\r
+ }\r
#ifdef __GP2X__\r
if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
#endif\r
if (xcycles >= timer_b_next_oflow) \\r
ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
\r
-u32 ym2612_read_local_z80(void)\r
+static u32 ym2612_read_local_z80(void)\r
{\r
int xcycles = z80_cyclesDone() << 8;\r
\r
return ym2612.OPN.ST.status;\r
}\r
\r
-u32 ym2612_read_local_68k(void)\r
+static u32 ym2612_read_local_68k(void)\r
{\r
- int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
+ int xcycles = z80_cycles_from_68k() << 8;\r
\r
ym2612_read_local();\r
\r
elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
}\r
\r
+#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
+// referenced by asm code\r
+u32 PicoRead8_32x(u32 a) { return 0; }\r
+u32 PicoRead16_32x(u32 a) { return 0; }\r
+void PicoWrite8_32x(u32 a, u32 d) {}\r
+void PicoWrite16_32x(u32 a, u32 d) {}\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
-PICO_INTERNAL unsigned char z80_read(unsigned short a)\r
+static unsigned char z80_md_vdp_read(unsigned short a)\r
{\r
- u8 ret = 0;\r
+ if ((a & 0x00e0) == 0x0000)\r
+ return PicoVideoRead8(a); // FIXME: depends on 68k cycles\r
\r
- if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
- {\r
- return ym2612_read_local_z80();\r
- }\r
+ elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r
+ return 0xff;\r
+}\r
\r
- if (a>=0x8000)\r
- {\r
- extern u32 PicoReadM68k8(u32 a);\r
- u32 addr68k;\r
- addr68k=Pico.m.z80_bank68k<<15;\r
- addr68k+=a&0x7fff;\r
-\r
- if (addr68k < Pico.romsize) { ret = Pico.rom[addr68k^1]; goto bnkend; }\r
- elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r
- if (PicoAHW & PAHW_MCD)\r
- ret = PicoReadM68k8(addr68k);\r
- else ret = PicoRead8(addr68k);\r
-bnkend:\r
- elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
- return ret;\r
- }\r
+static unsigned char z80_md_bank_read(unsigned short a)\r
+{\r
+ unsigned int addr68k;\r
+ unsigned char ret;\r
\r
- // should not be needed, cores should be able to access RAM themselves\r
- if (a<0x4000) return Pico.zram[a&0x1fff];\r
+ addr68k = Pico.m.z80_bank68k<<15;\r
+ addr68k += a & 0x7fff;\r
\r
- elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
+ ret = m68k_read8(addr68k);\r
+\r
+ elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
return ret;\r
}\r
\r
-#ifndef _USE_CZ80\r
-PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)\r
-#else\r
-PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
-#endif\r
+static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r
{\r
- if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
- {\r
- if(PicoOpt&POPT_EN_FM) emustatus|=ym2612_write_local(a, data, 1) & 1;\r
- return;\r
- }\r
+ if (PicoOpt & POPT_EN_FM)\r
+ emustatus |= ym2612_write_local(a, data, 1) & 1;\r
+}\r
\r
- if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
+static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
+{\r
+ if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r
{\r
- if(PicoOpt&POPT_EN_PSG) SN76496Write(data);\r
+ if (PicoOpt & POPT_EN_PSG)\r
+ SN76496Write(data);\r
return;\r
}\r
+ // at least VDP data writes hang my machine\r
\r
- if ((a>>8)==0x60)\r
+ if ((a>>8) == 0x60)\r
{\r
- Pico.m.z80_bank68k>>=1;\r
- Pico.m.z80_bank68k|=(data&1)<<8;\r
- Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
+ Pico.m.z80_bank68k >>= 1;\r
+ Pico.m.z80_bank68k |= data << 8;\r
+ Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r
return;\r
}\r
\r
- if (a>=0x8000)\r
- {\r
- extern void PicoWriteM68k8(u32 a,u8 d);\r
- u32 addr68k;\r
- addr68k=Pico.m.z80_bank68k<<15;\r
- addr68k+=a&0x7fff;\r
- elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
- if (PicoAHW & PAHW_MCD)\r
- PicoWriteM68k8(addr68k, data);\r
- else PicoWrite8(addr68k, data);\r
- return;\r
- }\r
+ elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
+}\r
+\r
+static void z80_md_bank_write(unsigned int a, unsigned char data)\r
+{\r
+ unsigned int addr68k;\r
\r
- // should not be needed\r
- if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
+ addr68k = Pico.m.z80_bank68k << 15;\r
+ addr68k += a & 0x7fff;\r
\r
- elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
+ elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
+ m68k_write8(addr68k, data);\r
}\r
\r
-#ifndef _USE_CZ80\r
-PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r
+// -----------------------------------------------------------------\r
+\r
+static unsigned char z80_md_in(unsigned short p)\r
{\r
- return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
+ elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r
+ return 0xff;\r
}\r
\r
-PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
+static void z80_md_out(unsigned short p, unsigned char d)\r
{\r
- z80_write((unsigned char) data,a);\r
- z80_write((unsigned char)(data>>8),(u16)(a+1));\r
+ elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r
}\r
+\r
+static void z80_mem_setup(void)\r
+{\r
+ z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r
+ z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r
+ z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r
+ z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r
+\r
+ z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r
+ z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r
+ z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r
+ z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r
+\r
+#ifdef _USE_DRZ80\r
+ drZ80.z80_in = z80_md_in;\r
+ drZ80.z80_out = z80_md_out;\r
#endif\r
+#ifdef _USE_CZ80\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r
+ Cz80_Set_INPort(&CZ80, z80_md_in);\r
+ Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
+#endif\r
+}\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r
notaz.gp2x.de / picodrive.git / blobdiff