} \\r
} while (0)\r
# define sh2_cycles_left(sh2) (sh2)->icount\r
-# define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
+# define sh2_pc(sh2) (sh2)->ppc\r
#else\r
# define sh2_end_run(sh2, after_) do { \\r
int left_ = (signed int)(sh2)->sr >> 12; \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)\r
-# define sh2_pc(c) (c) ? ssh2.pc : msh2.pc\r
+# define sh2_pc(sh2) (sh2)->pc\r
#endif\r
\r
#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))\r
#define SH2_DRCBLK_RAM_SHIFT 1\r
#define SH2_DRCBLK_DA_SHIFT 1\r
\r
+#define SH2_READ_SHIFT 25\r
#define SH2_WRITE_SHIFT 25\r
\r
struct Pico32x\r
unsigned char m68k_rom[0x100];\r
unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE\r
};\r
- unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)\r
#ifdef DRC_SH2\r
unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];\r
#endif\r
unsigned char sh2_rom_s[0x400];\r
unsigned short pal[0x100];\r
unsigned short pal_native[0x100]; // converted to native (for renderer)\r
- unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s\r
signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame\r
signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries\r
};\r
void p32x_dreq1_trigger(void);\r
void p32x_timers_recalc(void);\r
void p32x_timers_do(unsigned int m68k_slice);\r
-unsigned int sh2_peripheral_read8(unsigned int a, int id);\r
-unsigned int sh2_peripheral_read16(unsigned int a, int id);\r
-unsigned int sh2_peripheral_read32(unsigned int a, int id);\r
-int sh2_peripheral_write8(unsigned int a, unsigned int d, int id);\r
-int sh2_peripheral_write16(unsigned int a, unsigned int d, int id);\r
-void sh2_peripheral_write32(unsigned int a, unsigned int d, int id);\r
+unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
+unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
+unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
+void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
+void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
\r
#else\r
#define Pico32xInit()\r