cc68a136 |
1 | // This is part of Pico Library\r |
2 | \r |
3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
4 | // (c) Copyright 2006 notaz, All rights reserved.\r |
5 | // Free for non-commercial use.\r |
6 | \r |
7 | // For commercial use, separate licencing terms must be obtained.\r |
8 | \r |
9 | \r |
10 | //#define __debug_io\r |
11 | \r |
12 | #include "PicoInt.h"\r |
13 | \r |
14 | #include "sound/sound.h"\r |
15 | #include "sound/ym2612.h"\r |
16 | #include "sound/sn76496.h"\r |
17 | \r |
18 | typedef unsigned char u8;\r |
19 | typedef unsigned short u16;\r |
20 | typedef unsigned int u32;\r |
21 | \r |
22 | extern unsigned int lastSSRamWrite; // used by serial SRAM code\r |
23 | \r |
24 | #ifdef _ASM_MEMORY_C\r |
25 | u8 PicoRead8(u32 a);\r |
26 | u16 PicoRead16(u32 a);\r |
27 | void PicoWriteRomHW_SSF2(u32 a,u32 d);\r |
28 | void PicoWriteRomHW_in1 (u32 a,u32 d);\r |
29 | #endif\r |
30 | \r |
31 | \r |
32 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
33 | // cyclone debug mode\r |
34 | u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r |
35 | int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r |
36 | extern unsigned int ppop;\r |
37 | #endif\r |
38 | \r |
39 | #if defined(EMU_C68K) || defined(EMU_A68K)\r |
40 | static __inline int PicoMemBase(u32 pc)\r |
41 | {\r |
42 | int membase=0;\r |
43 | \r |
44 | if (pc<Pico.romsize+4)\r |
45 | {\r |
46 | membase=(int)Pico.rom; // Program Counter in Rom\r |
47 | }\r |
48 | else if ((pc&0xe00000)==0xe00000)\r |
49 | {\r |
50 | membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r |
51 | }\r |
52 | else\r |
53 | {\r |
54 | // Error - Program Counter is invalid\r |
55 | membase=(int)Pico.rom;\r |
56 | }\r |
57 | \r |
58 | return membase;\r |
59 | }\r |
60 | #endif\r |
61 | \r |
62 | \r |
63 | #ifdef EMU_A68K\r |
64 | extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r |
65 | #endif\r |
66 | \r |
67 | static u32 CPU_CALL PicoCheckPc(u32 pc)\r |
68 | {\r |
69 | u32 ret=0;\r |
70 | #if defined(EMU_C68K)\r |
71 | pc-=PicoCpu.membase; // Get real pc\r |
72 | pc&=0xfffffe;\r |
73 | \r |
74 | PicoCpu.membase=PicoMemBase(pc);\r |
75 | \r |
76 | ret = PicoCpu.membase+pc;\r |
77 | #elif defined(EMU_A68K)\r |
78 | OP_ROM=(u8 *)PicoMemBase(pc);\r |
79 | \r |
80 | // don't bother calling us back unless it's outside the 64k segment\r |
81 | M68000_regs.AsmBank=(pc>>16);\r |
82 | #endif\r |
83 | return ret;\r |
84 | }\r |
85 | \r |
86 | \r |
87 | int PicoInitPc(u32 pc)\r |
88 | {\r |
89 | PicoCheckPc(pc);\r |
90 | return 0;\r |
91 | }\r |
92 | \r |
93 | #ifndef _ASM_MEMORY_C\r |
94 | void PicoMemReset()\r |
95 | {\r |
96 | }\r |
97 | #endif\r |
98 | \r |
99 | // -----------------------------------------------------------------\r |
100 | \r |
101 | #ifndef _ASM_MEMORY_C\r |
102 | // address must already be checked\r |
103 | static int SRAMRead(u32 a)\r |
104 | {\r |
105 | u8 *d = SRam.data-SRam.start+a;\r |
106 | return (d[0]<<8)|d[1];\r |
107 | }\r |
108 | #endif\r |
109 | \r |
110 | static int PadRead(int i)\r |
111 | {\r |
112 | int pad=0,value=0,TH;\r |
113 | pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r |
114 | TH=Pico.ioports[i+1]&0x40;\r |
115 | \r |
116 | if(PicoOpt & 0x20) { // 6 button gamepad enabled\r |
117 | int phase = Pico.m.padTHPhase[i];\r |
118 | \r |
119 | if(phase == 2 && !TH) {\r |
120 | value=(pad&0xc0)>>2; // ?0SA 0000\r |
121 | goto end;\r |
122 | } else if(phase == 3 && TH) {\r |
123 | value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r |
124 | goto end;\r |
125 | } else if(phase == 3 && !TH) {\r |
126 | value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r |
127 | goto end;\r |
128 | }\r |
129 | }\r |
130 | \r |
131 | if(TH) value=(pad&0x3f); // ?1CB RLDU\r |
132 | else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r |
133 | \r |
134 | end:\r |
135 | \r |
136 | // orr the bits, which are set as output\r |
137 | value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r |
138 | \r |
139 | return value; // will mirror later\r |
140 | }\r |
141 | \r |
142 | u8 z80Read8(u32 a)\r |
143 | {\r |
144 | if(Pico.m.z80Run&1) return 0;\r |
145 | \r |
146 | a&=0x1fff;\r |
147 | \r |
148 | if(!(PicoOpt&4)) {\r |
149 | // Z80 disabled, do some faking\r |
150 | static u8 zerosent = 0;\r |
151 | if(a == Pico.m.z80_lastaddr) { // probably polling something\r |
152 | u8 d = Pico.m.z80_fakeval;\r |
153 | if((d & 0xf) == 0xf && !zerosent) {\r |
154 | d = 0; zerosent = 1;\r |
155 | } else {\r |
156 | Pico.m.z80_fakeval++;\r |
157 | zerosent = 0;\r |
158 | }\r |
159 | return d;\r |
160 | } else {\r |
161 | Pico.m.z80_fakeval = 0;\r |
162 | }\r |
163 | }\r |
164 | \r |
165 | Pico.m.z80_lastaddr = (u16) a;\r |
166 | return Pico.zram[a];\r |
167 | }\r |
168 | \r |
169 | \r |
170 | // for nonstandard reads\r |
171 | #ifndef _ASM_MEMORY_C\r |
172 | static\r |
173 | #endif\r |
174 | u32 UnusualRead16(u32 a, int realsize)\r |
175 | {\r |
176 | u32 d=0;\r |
177 | \r |
178 | dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r |
179 | \r |
180 | // for games with simple protection devices, discovered by Haze\r |
181 | // some dumb detection is used, but that should be enough to make things work\r |
182 | if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r |
183 | if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r |
4f672280 |
184 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
185 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
186 | }\r |
187 | else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r |
188 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
189 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
190 | else if (a == 0x400004) { d=0xaa<<8; goto end; }\r |
191 | else if (a == 0x400006) { d=0xf0<<8; goto end; }\r |
192 | }\r |
193 | else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r |
194 | if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r |
195 | else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r |
196 | // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r |
197 | }\r |
198 | else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r |
199 | if (a == 0x400000) { d=0x90<<8; goto end; }\r |
200 | else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r |
201 | // checks the result, which is of the above one. Left it just in case.\r |
202 | }\r |
203 | else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r |
204 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
205 | else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r |
206 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
207 | else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r |
208 | }\r |
cc68a136 |
209 | // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r |
4f672280 |
210 | // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r |
211 | // @ 400004 which is expected @ 400006, so we really remember 2 values here\r |
cc68a136 |
212 | d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r |
213 | }\r |
214 | else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r |
215 | if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r |
4f672280 |
216 | d=0x0c; goto end;\r |
217 | }\r |
cc68a136 |
218 | else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r |
4f672280 |
219 | d=0x28; goto end; // does the check from RAM\r |
220 | }\r |
cc68a136 |
221 | else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r |
4f672280 |
222 | d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r |
223 | }\r |
cc68a136 |
224 | else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r |
4f672280 |
225 | d=0x0a; goto end;\r |
226 | }\r |
cc68a136 |
227 | }\r |
228 | else if (a == 0xa13002) { // Pocket Monsters (Unl)\r |
229 | d=0x01; goto end;\r |
230 | }\r |
231 | else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r |
232 | d=0x1f; goto end;\r |
233 | }\r |
234 | else if (a == 0x30fe02) {\r |
235 | // Virtua Racing - just for fun\r |
4f672280 |
236 | // this seems to be some flag that SVP is ready or something similar\r |
cc68a136 |
237 | d=1; goto end;\r |
238 | }\r |
239 | \r |
240 | end:\r |
241 | dprintf("ret = %04x", d);\r |
242 | return d;\r |
243 | }\r |
244 | \r |
245 | #ifndef _ASM_MEMORY_C\r |
246 | static\r |
247 | #endif\r |
248 | u32 OtherRead16(u32 a, int realsize)\r |
249 | {\r |
250 | u32 d=0;\r |
251 | \r |
252 | if ((a&0xff0000)==0xa00000) {\r |
253 | if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r |
4f672280 |
254 | if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; dprintf("read ym2612: %04x", d); goto end; } // 0x4000-0x5fff, Fudge if disabled\r |
255 | d=0xffff; goto end;\r |
cc68a136 |
256 | }\r |
257 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
258 | a=(a>>1)&0xf;\r |
259 | switch(a) {\r |
260 | case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r |
261 | case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r |
262 | case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r |
263 | default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r |
264 | }\r |
265 | d|=d<<8;\r |
266 | goto end;\r |
267 | }\r |
268 | // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r |
4f672280 |
269 | if (a==0xa11100) {\r |
4f672280 |
270 | d=Pico.m.z80Run&1;\r |
312e9ce1 |
271 | #if 0\r |
4f672280 |
272 | if (!d) {\r |
312e9ce1 |
273 | // do we need this?\r |
274 | extern int z80stopCycle; // TODO: tidy\r |
4f672280 |
275 | int stop_before = SekCyclesDone() - z80stopCycle;\r |
312e9ce1 |
276 | if (stop_before > 0 && stop_before <= 16) // Gens uses 16 here\r |
4f672280 |
277 | d = 1; // bus not yet available\r |
278 | }\r |
312e9ce1 |
279 | #endif\r |
4f672280 |
280 | d=(d<<8)|0x8000|Pico.m.rotate++;\r |
281 | dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r |
282 | goto end; }\r |
cc68a136 |
283 | \r |
284 | #ifndef _ASM_MEMORY_C\r |
285 | if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r |
286 | #endif\r |
287 | \r |
288 | d = UnusualRead16(a, realsize);\r |
289 | \r |
290 | end:\r |
291 | return d;\r |
292 | }\r |
293 | \r |
294 | //extern UINT32 mz80GetRegisterValue(void *, UINT32);\r |
295 | \r |
296 | static void OtherWrite8(u32 a,u32 d,int realsize)\r |
297 | {\r |
298 | if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r |
299 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r |
300 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r |
301 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
302 | a=(a>>1)&0xf;\r |
303 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
304 | if(PicoOpt&0x20) {\r |
305 | if(a==1) {\r |
306 | Pico.m.padDelay[0] = 0;\r |
307 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
308 | }\r |
309 | else if(a==2) {\r |
310 | Pico.m.padDelay[1] = 0;\r |
311 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
312 | }\r |
313 | }\r |
314 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
315 | return;\r |
316 | }\r |
317 | if (a==0xa11100) {\r |
4f672280 |
318 | extern int z80startCycle, z80stopCycle;\r |
cc68a136 |
319 | //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r |
320 | d&=1; d^=1;\r |
4f672280 |
321 | if(!d) {\r |
322 | // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r |
323 | // if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20); // FIXME: movies\r |
324 | z80stopCycle = SekCyclesDone();\r |
325 | //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r |
326 | } else {\r |
327 | z80startCycle = SekCyclesDone();\r |
328 | //if(Pico.m.scanline != -1)\r |
329 | //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r |
330 | }\r |
331 | dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);\r |
332 | Pico.m.z80Run=(u8)d; return;\r |
cc68a136 |
333 | }\r |
4f672280 |
334 | if (a==0xa11200) { dprintf("write z80Reset: %02x", d); if(!(d&1)) z80_reset(); return; }\r |
cc68a136 |
335 | \r |
336 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r |
337 | {\r |
338 | Pico.m.z80_bank68k>>=1;\r |
339 | Pico.m.z80_bank68k|=(d&1)<<8;\r |
340 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r |
341 | return;\r |
342 | }\r |
343 | \r |
344 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r |
345 | \r |
346 | // sram\r |
347 | //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r |
348 | //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r |
349 | if(a >= SRam.start && a <= SRam.end) {\r |
350 | unsigned int sreg = Pico.m.sram_reg;\r |
351 | if(!(sreg & 0x10)) {\r |
4f672280 |
352 | // not detected SRAM\r |
353 | if((a&~1)==0x200000) {\r |
cc68a136 |
354 | Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r |
355 | SRam.start=0x200000; SRam.end=SRam.start+1;\r |
356 | }\r |
4f672280 |
357 | Pico.m.sram_reg|=0x10;\r |
358 | }\r |
cc68a136 |
359 | if(sreg & 4) { // EEPROM write\r |
4f672280 |
360 | if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r |
361 | // just update pending state\r |
362 | SRAMUpdPending(a, d);\r |
363 | } else {\r |
364 | SRAMWriteEEPROM(sreg>>6); // execute pending\r |
365 | SRAMUpdPending(a, d);\r |
cc68a136 |
366 | lastSSRamWrite = SekCyclesDoneT();\r |
4f672280 |
367 | }\r |
cc68a136 |
368 | } else if(!(sreg & 2)) {\r |
369 | u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r |
370 | if(*pm != (u8)d) {\r |
371 | SRam.changed = 1;\r |
372 | *pm=(u8)d;\r |
373 | }\r |
4f672280 |
374 | }\r |
cc68a136 |
375 | return;\r |
376 | }\r |
377 | \r |
378 | #ifdef _ASM_MEMORY_C\r |
379 | // special ROM hardware (currently only banking and sram reg supported)\r |
380 | if((a&0xfffff1) == 0xA130F1) {\r |
381 | PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r |
382 | return;\r |
383 | }\r |
384 | #else\r |
385 | // sram access register\r |
386 | if(a == 0xA130F1) {\r |
387 | Pico.m.sram_reg = (u8)(d&3);\r |
388 | return;\r |
389 | }\r |
390 | #endif\r |
391 | dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
392 | \r |
393 | if(a >= 0xA13004 && a < 0xA13040) {\r |
394 | // dumb 12-in-1 or 4-in-1 banking support\r |
4f672280 |
395 | int len;\r |
396 | a &= 0x3f; a <<= 16;\r |
397 | len = Pico.romsize - a;\r |
398 | if (len <= 0) return; // invalid/missing bank\r |
399 | if (len > 0x200000) len = 0x200000; // 2 megs\r |
400 | memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r |
cc68a136 |
401 | return;\r |
402 | }\r |
403 | \r |
404 | // for games with simple protection devices, discovered by Haze\r |
405 | else if ((a>>22) == 1)\r |
406 | Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r |
407 | }\r |
408 | \r |
409 | static void OtherWrite16(u32 a,u32 d)\r |
410 | {\r |
411 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r |
412 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r |
413 | \r |
414 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
415 | a=(a>>1)&0xf;\r |
416 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
417 | if(PicoOpt&0x20) {\r |
418 | if(a==1) {\r |
419 | Pico.m.padDelay[0] = 0;\r |
420 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
421 | }\r |
422 | else if(a==2) {\r |
423 | Pico.m.padDelay[1] = 0;\r |
424 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
425 | }\r |
426 | }\r |
427 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
428 | return;\r |
429 | }\r |
430 | if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r |
4f672280 |
431 | if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }\r |
cc68a136 |
432 | \r |
433 | OtherWrite8(a, d>>8, 16);\r |
434 | OtherWrite8(a+1,d&0xff, 16);\r |
435 | }\r |
436 | \r |
437 | // -----------------------------------------------------------------\r |
438 | // Read Rom and read Ram\r |
439 | \r |
440 | #ifndef _ASM_MEMORY_C\r |
441 | u8 CPU_CALL PicoRead8(u32 a)\r |
442 | {\r |
443 | u32 d=0;\r |
444 | \r |
445 | if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r |
446 | \r |
447 | a&=0xffffff;\r |
448 | \r |
449 | #if !(defined(EMU_C68K) && defined(EMU_M68K))\r |
450 | // sram\r |
451 | if(a >= SRam.start && a <= SRam.end) {\r |
452 | unsigned int sreg = Pico.m.sram_reg;\r |
453 | if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r |
4f672280 |
454 | Pico.m.sram_reg|=0x10; // should be normal SRAM\r |
455 | }\r |
cc68a136 |
456 | if(sreg & 4) { // EEPROM read\r |
457 | d = SRAMReadEEPROM();\r |
458 | goto end;\r |
459 | } else if(sreg & 1) {\r |
460 | d = *(u8 *)(SRam.data-SRam.start+a);\r |
461 | goto end;\r |
462 | }\r |
463 | }\r |
464 | #endif\r |
465 | \r |
466 | if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r |
467 | if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r |
468 | \r |
469 | d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r |
470 | \r |
471 | end:\r |
472 | \r |
473 | //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r |
474 | // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
475 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
476 | // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
477 | \r |
478 | //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r |
479 | //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r |
480 | #ifdef __debug_io\r |
481 | dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
482 | #endif\r |
483 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
484 | if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r |
485 | lastread_a = a;\r |
486 | lastread_d[lrp_cyc++&15] = (u8)d;\r |
487 | }\r |
488 | #endif\r |
489 | return (u8)d;\r |
490 | }\r |
491 | \r |
492 | u16 CPU_CALL PicoRead16(u32 a)\r |
493 | {\r |
494 | u16 d=0;\r |
495 | \r |
496 | if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r |
497 | \r |
498 | a&=0xfffffe;\r |
499 | \r |
500 | #if !(defined(EMU_C68K) && defined(EMU_M68K))\r |
501 | // sram\r |
502 | if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r |
503 | d = (u16) SRAMRead(a);\r |
504 | goto end;\r |
505 | }\r |
506 | #endif\r |
507 | \r |
508 | if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r |
509 | \r |
510 | d = (u16)OtherRead16(a, 16);\r |
511 | \r |
512 | end:\r |
513 | //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r |
514 | // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
515 | \r |
516 | #ifdef __debug_io\r |
517 | dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
518 | #endif\r |
519 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
520 | if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r |
521 | lastread_a = a;\r |
522 | lastread_d[lrp_cyc++&15] = d;\r |
523 | }\r |
524 | #endif\r |
525 | return d;\r |
526 | }\r |
527 | \r |
528 | u32 CPU_CALL PicoRead32(u32 a)\r |
529 | {\r |
530 | u32 d=0;\r |
531 | \r |
532 | if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r |
533 | \r |
534 | a&=0xfffffe;\r |
535 | \r |
536 | // sram\r |
537 | if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r |
538 | d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r |
539 | goto end;\r |
540 | }\r |
541 | \r |
542 | if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r |
543 | \r |
544 | d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r |
545 | \r |
546 | end:\r |
547 | #ifdef __debug_io\r |
548 | dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
549 | #endif\r |
550 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
551 | if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r |
552 | lastread_a = a;\r |
553 | lastread_d[lrp_cyc++&15] = d;\r |
554 | }\r |
555 | #endif\r |
556 | return d;\r |
557 | }\r |
558 | #endif\r |
559 | \r |
560 | // -----------------------------------------------------------------\r |
561 | // Write Ram\r |
562 | \r |
563 | static void CPU_CALL PicoWrite8(u32 a,u8 d)\r |
564 | {\r |
565 | #ifdef __debug_io\r |
566 | dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
567 | #endif\r |
568 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
569 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
570 | #endif\r |
571 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
572 | // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
573 | \r |
574 | \r |
312e9ce1 |
575 | if ((a&0xe00000)==0xe00000) {\r |
576 | if((a&0xffff)==0xf62a) dprintf("(f62a) = %02x [%i|%i] @ %x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r |
577 | u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r |
cc68a136 |
578 | \r |
579 | a&=0xffffff;\r |
580 | OtherWrite8(a,d,8);\r |
581 | }\r |
582 | \r |
583 | static void CPU_CALL PicoWrite16(u32 a,u16 d)\r |
584 | {\r |
585 | #ifdef __debug_io\r |
586 | dprintf("w16: %06x, %04x", a&0xffffff, d);\r |
587 | #endif\r |
588 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
589 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
590 | #endif\r |
591 | //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r |
592 | // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
593 | \r |
594 | if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r |
595 | \r |
596 | a&=0xfffffe;\r |
597 | OtherWrite16(a,d);\r |
598 | }\r |
599 | \r |
600 | static void CPU_CALL PicoWrite32(u32 a,u32 d)\r |
601 | {\r |
602 | #ifdef __debug_io\r |
603 | dprintf("w32: %06x, %08x", a&0xffffff, d);\r |
604 | #endif\r |
605 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
606 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
607 | #endif\r |
608 | \r |
609 | if ((a&0xe00000)==0xe00000)\r |
610 | {\r |
611 | // Ram:\r |
612 | u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r |
613 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
614 | return;\r |
615 | }\r |
616 | \r |
617 | a&=0xfffffe;\r |
618 | OtherWrite16(a, (u16)(d>>16));\r |
619 | OtherWrite16(a+2,(u16)d);\r |
620 | }\r |
621 | \r |
622 | \r |
623 | // -----------------------------------------------------------------\r |
624 | int PicoMemInit()\r |
625 | {\r |
626 | #ifdef EMU_C68K\r |
627 | // Setup memory callbacks:\r |
628 | PicoCpu.checkpc=PicoCheckPc;\r |
629 | PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r |
630 | PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r |
631 | PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r |
632 | PicoCpu.write8 =PicoWrite8;\r |
633 | PicoCpu.write16=PicoWrite16;\r |
634 | PicoCpu.write32=PicoWrite32;\r |
635 | #endif\r |
636 | return 0;\r |
637 | }\r |
638 | \r |
639 | #ifdef EMU_A68K\r |
640 | struct A68KInter\r |
641 | {\r |
642 | u32 unknown;\r |
643 | u8 (__fastcall *Read8) (u32 a);\r |
644 | u16 (__fastcall *Read16)(u32 a);\r |
645 | u32 (__fastcall *Read32)(u32 a);\r |
646 | void (__fastcall *Write8) (u32 a,u8 d);\r |
647 | void (__fastcall *Write16) (u32 a,u16 d);\r |
648 | void (__fastcall *Write32) (u32 a,u32 d);\r |
649 | void (__fastcall *ChangePc)(u32 a);\r |
650 | u8 (__fastcall *PcRel8) (u32 a);\r |
651 | u16 (__fastcall *PcRel16)(u32 a);\r |
652 | u32 (__fastcall *PcRel32)(u32 a);\r |
653 | u16 (__fastcall *Dir16)(u32 a);\r |
654 | u32 (__fastcall *Dir32)(u32 a);\r |
655 | };\r |
656 | \r |
657 | struct A68KInter a68k_memory_intf=\r |
658 | {\r |
659 | 0,\r |
660 | PicoRead8,\r |
661 | PicoRead16,\r |
662 | PicoRead32,\r |
663 | PicoWrite8,\r |
664 | PicoWrite16,\r |
665 | PicoWrite32,\r |
666 | PicoCheckPc,\r |
667 | PicoRead8,\r |
668 | PicoRead16,\r |
669 | PicoRead32,\r |
670 | PicoRead16, // unused\r |
671 | PicoRead32, // unused\r |
672 | };\r |
673 | #endif\r |
674 | \r |
675 | #ifdef EMU_M68K\r |
676 | unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r |
677 | unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r |
678 | unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r |
679 | \r |
680 | // these are allowed to access RAM\r |
681 | unsigned int m68k_read_pcrelative_8 (unsigned int a) {\r |
682 | a&=0xffffff;\r |
683 | if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r |
684 | if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r |
685 | if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r |
686 | return 0;//(u8) lastread_d;\r |
687 | }\r |
688 | unsigned int m68k_read_pcrelative_16(unsigned int a) {\r |
689 | a&=0xffffff;\r |
690 | if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r |
691 | if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r |
692 | if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r |
693 | return 0;//(u16) lastread_d;\r |
694 | }\r |
695 | unsigned int m68k_read_pcrelative_32(unsigned int a) {\r |
696 | a&=0xffffff;\r |
697 | if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r |
698 | if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r |
699 | if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r |
700 | return 0;//lastread_d;\r |
701 | }\r |
702 | \r |
703 | unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r |
704 | unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r |
705 | unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_pcrelative_8 (a); }\r |
706 | unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r |
707 | unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r |
708 | \r |
709 | #ifdef EMU_C68K\r |
710 | // ROM only\r |
711 | unsigned int m68k_read_memory_8(unsigned int a) { if(a<Pico.romsize) return *(u8 *) (Pico.rom+(a^1)); return (u8) lastread_d[lrp_mus++&15]; }\r |
712 | unsigned int m68k_read_memory_16(unsigned int a) { if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1));return (u16) lastread_d[lrp_mus++&15]; }\r |
713 | unsigned int m68k_read_memory_32(unsigned int a) { if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));return (pm[0]<<16)|pm[1];} return lastread_d[lrp_mus++&15]; }\r |
714 | \r |
715 | // ignore writes, Cyclone already done that\r |
716 | void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
717 | void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
718 | void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
719 | #else\r |
720 | unsigned char PicoReadCD8w (unsigned int a);\r |
721 | unsigned short PicoReadCD16w(unsigned int a);\r |
722 | unsigned int PicoReadCD32w(unsigned int a);\r |
723 | void PicoWriteCD8w (unsigned int a, unsigned char d);\r |
724 | void PicoWriteCD16w(unsigned int a, unsigned short d);\r |
725 | void PicoWriteCD32w(unsigned int a, unsigned int d);\r |
726 | \r |
727 | unsigned int m68k_read_memory_8(unsigned int address)\r |
728 | {\r |
4f672280 |
729 | return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r |
cc68a136 |
730 | }\r |
731 | \r |
732 | unsigned int m68k_read_memory_16(unsigned int address)\r |
733 | {\r |
4f672280 |
734 | return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r |
cc68a136 |
735 | }\r |
736 | \r |
737 | unsigned int m68k_read_memory_32(unsigned int address)\r |
738 | {\r |
4f672280 |
739 | return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r |
cc68a136 |
740 | }\r |
741 | \r |
742 | void m68k_write_memory_8(unsigned int address, unsigned int value)\r |
743 | {\r |
4f672280 |
744 | if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r |
cc68a136 |
745 | }\r |
746 | \r |
747 | void m68k_write_memory_16(unsigned int address, unsigned int value)\r |
748 | {\r |
4f672280 |
749 | if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r |
cc68a136 |
750 | }\r |
751 | \r |
752 | void m68k_write_memory_32(unsigned int address, unsigned int value)\r |
753 | {\r |
4f672280 |
754 | if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r |
cc68a136 |
755 | }\r |
756 | #endif\r |
757 | #endif // EMU_M68K\r |
758 | \r |
759 | \r |
760 | // -----------------------------------------------------------------\r |
761 | // z80 memhandlers\r |
762 | \r |
763 | unsigned char z80_read(unsigned short a)\r |
764 | {\r |
765 | u8 ret = 0;\r |
766 | \r |
767 | if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r |
768 | {\r |
769 | if(PicoOpt&1) ret = (u8) YM2612Read();\r |
770 | goto end;\r |
771 | }\r |
772 | \r |
773 | if (a>=0x8000)\r |
774 | {\r |
775 | u32 addr68k;\r |
776 | addr68k=Pico.m.z80_bank68k<<15;\r |
777 | addr68k+=a&0x7fff;\r |
778 | \r |
779 | ret = (u8) PicoRead8(addr68k);\r |
780 | //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r |
781 | goto end;\r |
782 | }\r |
783 | \r |
784 | // should not be needed || dprintf("z80_read RAM");\r |
785 | if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r |
786 | \r |
787 | end:\r |
788 | return ret;\r |
789 | }\r |
790 | \r |
791 | unsigned short z80_read16(unsigned short a)\r |
792 | {\r |
793 | //dprintf("z80_read16");\r |
794 | \r |
795 | return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r |
796 | }\r |
797 | \r |
798 | void z80_write(unsigned char data, unsigned short a)\r |
799 | {\r |
800 | //if (a<0x4000)\r |
801 | // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r |
802 | \r |
803 | if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r |
804 | {\r |
805 | if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r |
806 | return;\r |
807 | }\r |
808 | \r |
809 | if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r |
810 | {\r |
811 | if(PicoOpt&2) SN76496Write(data);\r |
812 | return;\r |
813 | }\r |
814 | \r |
815 | if ((a>>8)==0x60)\r |
816 | {\r |
817 | Pico.m.z80_bank68k>>=1;\r |
818 | Pico.m.z80_bank68k|=(data&1)<<8;\r |
819 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r |
820 | return;\r |
821 | }\r |
822 | \r |
823 | if (a>=0x8000)\r |
824 | {\r |
825 | u32 addr68k;\r |
826 | addr68k=Pico.m.z80_bank68k<<15;\r |
827 | addr68k+=a&0x7fff;\r |
828 | PicoWrite8(addr68k, data);\r |
829 | //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r |
830 | return;\r |
831 | }\r |
832 | \r |
833 | // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r |
834 | if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r |
835 | }\r |
836 | \r |
837 | void z80_write16(unsigned short data, unsigned short a)\r |
838 | {\r |
839 | //dprintf("z80_write16");\r |
840 | \r |
841 | z80_write((unsigned char) data,a);\r |
842 | z80_write((unsigned char)(data>>8),(u16)(a+1));\r |
843 | }\r |
844 | \r |