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[picodrive.git] / Pico / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10//#define __debug_io\r
11\r
12#include "PicoInt.h"\r
13\r
14#include "sound/sound.h"\r
15#include "sound/ym2612.h"\r
16#include "sound/sn76496.h"\r
17\r
18typedef unsigned char u8;\r
19typedef unsigned short u16;\r
20typedef unsigned int u32;\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
25u8 PicoRead8(u32 a);\r
26u16 PicoRead16(u32 a);\r
27void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
28void PicoWriteRomHW_in1 (u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#if defined(EMU_C68K) && defined(EMU_M68K)\r
33// cyclone debug mode\r
34u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
35int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
36extern unsigned int ppop;\r
37#endif\r
38\r
39#if defined(EMU_C68K) || defined(EMU_A68K)\r
40static __inline int PicoMemBase(u32 pc)\r
41{\r
42 int membase=0;\r
43\r
44 if (pc<Pico.romsize+4)\r
45 {\r
46 membase=(int)Pico.rom; // Program Counter in Rom\r
47 }\r
48 else if ((pc&0xe00000)==0xe00000)\r
49 {\r
50 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
51 }\r
52 else\r
53 {\r
54 // Error - Program Counter is invalid\r
55 membase=(int)Pico.rom;\r
56 }\r
57\r
58 return membase;\r
59}\r
60#endif\r
61\r
62\r
63#ifdef EMU_A68K\r
64extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
65#endif\r
66\r
67static u32 CPU_CALL PicoCheckPc(u32 pc)\r
68{\r
69 u32 ret=0;\r
70#if defined(EMU_C68K)\r
71 pc-=PicoCpu.membase; // Get real pc\r
72 pc&=0xfffffe;\r
73\r
74 PicoCpu.membase=PicoMemBase(pc);\r
75\r
76 ret = PicoCpu.membase+pc;\r
77#elif defined(EMU_A68K)\r
78 OP_ROM=(u8 *)PicoMemBase(pc);\r
79\r
80 // don't bother calling us back unless it's outside the 64k segment\r
81 M68000_regs.AsmBank=(pc>>16);\r
82#endif\r
83 return ret;\r
84}\r
85\r
86\r
87int PicoInitPc(u32 pc)\r
88{\r
89 PicoCheckPc(pc);\r
90 return 0;\r
91}\r
92\r
93#ifndef _ASM_MEMORY_C\r
94void PicoMemReset()\r
95{\r
96}\r
97#endif\r
98\r
99// -----------------------------------------------------------------\r
100\r
101#ifndef _ASM_MEMORY_C\r
102// address must already be checked\r
103static int SRAMRead(u32 a)\r
104{\r
105 u8 *d = SRam.data-SRam.start+a;\r
106 return (d[0]<<8)|d[1];\r
107}\r
108#endif\r
109\r
110static int PadRead(int i)\r
111{\r
112 int pad=0,value=0,TH;\r
113 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
114 TH=Pico.ioports[i+1]&0x40;\r
115\r
116 if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
117 int phase = Pico.m.padTHPhase[i];\r
118\r
119 if(phase == 2 && !TH) {\r
120 value=(pad&0xc0)>>2; // ?0SA 0000\r
121 goto end;\r
122 } else if(phase == 3 && TH) {\r
123 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
124 goto end;\r
125 } else if(phase == 3 && !TH) {\r
126 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
127 goto end;\r
128 }\r
129 }\r
130\r
131 if(TH) value=(pad&0x3f); // ?1CB RLDU\r
132 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
133\r
134 end:\r
135\r
136 // orr the bits, which are set as output\r
137 value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
138\r
139 return value; // will mirror later\r
140}\r
141\r
142u8 z80Read8(u32 a)\r
143{\r
144 if(Pico.m.z80Run&1) return 0;\r
145\r
146 a&=0x1fff;\r
147\r
148 if(!(PicoOpt&4)) {\r
149 // Z80 disabled, do some faking\r
150 static u8 zerosent = 0;\r
151 if(a == Pico.m.z80_lastaddr) { // probably polling something\r
152 u8 d = Pico.m.z80_fakeval;\r
153 if((d & 0xf) == 0xf && !zerosent) {\r
154 d = 0; zerosent = 1;\r
155 } else {\r
156 Pico.m.z80_fakeval++;\r
157 zerosent = 0;\r
158 }\r
159 return d;\r
160 } else {\r
161 Pico.m.z80_fakeval = 0;\r
162 }\r
163 }\r
164\r
165 Pico.m.z80_lastaddr = (u16) a;\r
166 return Pico.zram[a];\r
167}\r
168\r
169\r
170// for nonstandard reads\r
171#ifndef _ASM_MEMORY_C\r
172static\r
173#endif\r
174u32 UnusualRead16(u32 a, int realsize)\r
175{\r
176 u32 d=0;\r
177\r
178 dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
179\r
180 // for games with simple protection devices, discovered by Haze\r
181 // some dumb detection is used, but that should be enough to make things work\r
182 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
183 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
184 if (a == 0x400000) { d=0x55<<8; goto end; }\r
185 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
186 }\r
187 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
188 if (a == 0x400000) { d=0x55<<8; goto end; }\r
189 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
190 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
191 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
192 }\r
193 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
194 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
195 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
196 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
197 }\r
198 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
199 if (a == 0x400000) { d=0x90<<8; goto end; }\r
200 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
201 // checks the result, which is of the above one. Left it just in case.\r
202 }\r
203 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
204 if (a == 0x400000) { d=0x55<<8; goto end; }\r
205 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
206 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
207 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
208 }\r
209 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
210 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
211 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
212 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
213 }\r
214 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
215 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
216 d=0x0c; goto end;\r
217 }\r
218 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
219 d=0x28; goto end; // does the check from RAM\r
220 }\r
221 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
222 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
223 }\r
224 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
225 d=0x0a; goto end;\r
226 }\r
227 }\r
228 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
229 d=0x01; goto end;\r
230 }\r
231 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
232 d=0x1f; goto end;\r
233 }\r
234 else if (a == 0x30fe02) {\r
235 // Virtua Racing - just for fun\r
236 // this seems to be some flag that SVP is ready or something similar\r
237 d=1; goto end;\r
238 }\r
239\r
240end:\r
241 dprintf("ret = %04x", d);\r
242 return d;\r
243}\r
244\r
245#ifndef _ASM_MEMORY_C\r
246static\r
247#endif\r
248u32 OtherRead16(u32 a, int realsize)\r
249{\r
250 u32 d=0;\r
251\r
252 if ((a&0xff0000)==0xa00000) {\r
253 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
254 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r
255 d=0xffff; goto end;\r
256 }\r
257 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
258 a=(a>>1)&0xf;\r
259 switch(a) {\r
260 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r
261 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
262 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
263 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
264 }\r
265 d|=d<<8;\r
266 goto end;\r
267 }\r
268 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
269 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r
270\r
271#ifndef _ASM_MEMORY_C\r
272 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
273#endif\r
274\r
275 d = UnusualRead16(a, realsize);\r
276\r
277end:\r
278 return d;\r
279}\r
280\r
281//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
282\r
283static void OtherWrite8(u32 a,u32 d,int realsize)\r
284{\r
285 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
286 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
287 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
288 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
289 a=(a>>1)&0xf;\r
290 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
291 if(PicoOpt&0x20) {\r
292 if(a==1) {\r
293 Pico.m.padDelay[0] = 0;\r
294 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
295 }\r
296 else if(a==2) {\r
297 Pico.m.padDelay[1] = 0;\r
298 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
299 }\r
300 }\r
301 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
302 return;\r
303 }\r
304 if (a==0xa11100) {\r
305 extern int z80startCycle, z80stopCycle;\r
306 //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
307 d&=1; d^=1;\r
308 if(!d) {\r
309 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
310 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r
311 z80stopCycle = SekCyclesDone();\r
312 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
313 } else {\r
314 z80startCycle = SekCyclesDone();\r
315 //if(Pico.m.scanline != -1)\r
316 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
317 }\r
318 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r
319 Pico.m.z80Run=(u8)d; return;\r
320 }\r
321 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r
322\r
323 if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
324 {\r
325 Pico.m.z80_bank68k>>=1;\r
326 Pico.m.z80_bank68k|=(d&1)<<8;\r
327 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
328 return;\r
329 }\r
330\r
331 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
332\r
333 // sram\r
334 //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
335 //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
336 if(a >= SRam.start && a <= SRam.end) {\r
337 unsigned int sreg = Pico.m.sram_reg;\r
338 if(!(sreg & 0x10)) {\r
339 // not detected SRAM\r
340 if((a&~1)==0x200000) {\r
341 Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
342 SRam.start=0x200000; SRam.end=SRam.start+1;\r
343 }\r
344 Pico.m.sram_reg|=0x10;\r
345 }\r
346 if(sreg & 4) { // EEPROM write\r
347 if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
348 // just update pending state\r
349 SRAMUpdPending(a, d);\r
350 } else {\r
351 SRAMWriteEEPROM(sreg>>6); // execute pending\r
352 SRAMUpdPending(a, d);\r
353 lastSSRamWrite = SekCyclesDoneT();\r
354 }\r
355 } else if(!(sreg & 2)) {\r
356 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
357 if(*pm != (u8)d) {\r
358 SRam.changed = 1;\r
359 *pm=(u8)d;\r
360 }\r
361 }\r
362 return;\r
363 }\r
364\r
365#ifdef _ASM_MEMORY_C\r
366 // special ROM hardware (currently only banking and sram reg supported)\r
367 if((a&0xfffff1) == 0xA130F1) {\r
368 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
369 return;\r
370 }\r
371#else\r
372 // sram access register\r
373 if(a == 0xA130F1) {\r
374 Pico.m.sram_reg = (u8)(d&3);\r
375 return;\r
376 }\r
377#endif\r
378 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
379\r
380 if(a >= 0xA13004 && a < 0xA13040) {\r
381 // dumb 12-in-1 or 4-in-1 banking support\r
382 int len;\r
383 a &= 0x3f; a <<= 16;\r
384 len = Pico.romsize - a;\r
385 if (len <= 0) return; // invalid/missing bank\r
386 if (len > 0x200000) len = 0x200000; // 2 megs\r
387 memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
388 return;\r
389 }\r
390\r
391 // for games with simple protection devices, discovered by Haze\r
392 else if ((a>>22) == 1)\r
393 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
394}\r
395\r
396static void OtherWrite16(u32 a,u32 d)\r
397{\r
398 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
399 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
400\r
401 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
402 a=(a>>1)&0xf;\r
403 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
404 if(PicoOpt&0x20) {\r
405 if(a==1) {\r
406 Pico.m.padDelay[0] = 0;\r
407 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
408 }\r
409 else if(a==2) {\r
410 Pico.m.padDelay[1] = 0;\r
411 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
412 }\r
413 }\r
414 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
415 return;\r
416 }\r
417 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
418 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r
419\r
420 OtherWrite8(a, d>>8, 16);\r
421 OtherWrite8(a+1,d&0xff, 16);\r
422}\r
423\r
424// -----------------------------------------------------------------\r
425// Read Rom and read Ram\r
426\r
427#ifndef _ASM_MEMORY_C\r
428u8 CPU_CALL PicoRead8(u32 a)\r
429{\r
430 u32 d=0;\r
431\r
432 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
433\r
434 a&=0xffffff;\r
435\r
436#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
437 // sram\r
438 if(a >= SRam.start && a <= SRam.end) {\r
439 unsigned int sreg = Pico.m.sram_reg;\r
440 if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
441 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
442 }\r
443 if(sreg & 4) { // EEPROM read\r
444 d = SRAMReadEEPROM();\r
445 goto end;\r
446 } else if(sreg & 1) {\r
447 d = *(u8 *)(SRam.data-SRam.start+a);\r
448 goto end;\r
449 }\r
450 }\r
451#endif\r
452\r
453 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
454 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
455\r
456 d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
457\r
458 end:\r
459\r
460 //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
461 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
462 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
463 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
464\r
465 //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
466 //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
467#ifdef __debug_io\r
468 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
469#endif\r
470#if defined(EMU_C68K) && defined(EMU_M68K)\r
471 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
472 lastread_a = a;\r
473 lastread_d[lrp_cyc++&15] = (u8)d;\r
474 }\r
475#endif\r
476 return (u8)d;\r
477}\r
478\r
479u16 CPU_CALL PicoRead16(u32 a)\r
480{\r
481 u16 d=0;\r
482\r
483 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
484\r
485 a&=0xfffffe;\r
486\r
487#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
488 // sram\r
489 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
490 d = (u16) SRAMRead(a);\r
491 goto end;\r
492 }\r
493#endif\r
494\r
495 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
496\r
497 d = (u16)OtherRead16(a, 16);\r
498\r
499 end:\r
500 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
501 // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
502\r
503#ifdef __debug_io\r
504 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
505#endif\r
506#if defined(EMU_C68K) && defined(EMU_M68K)\r
507 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
508 lastread_a = a;\r
509 lastread_d[lrp_cyc++&15] = d;\r
510 }\r
511#endif\r
512 return d;\r
513}\r
514\r
515u32 CPU_CALL PicoRead32(u32 a)\r
516{\r
517 u32 d=0;\r
518\r
519 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
520\r
521 a&=0xfffffe;\r
522\r
523 // sram\r
524 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
525 d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
526 goto end;\r
527 }\r
528\r
529 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
530\r
531 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
532\r
533 end:\r
534#ifdef __debug_io\r
535 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
536#endif\r
537#if defined(EMU_C68K) && defined(EMU_M68K)\r
538 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
539 lastread_a = a;\r
540 lastread_d[lrp_cyc++&15] = d;\r
541 }\r
542#endif\r
543 return d;\r
544}\r
545#endif\r
546\r
547// -----------------------------------------------------------------\r
548// Write Ram\r
549\r
550static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
551{\r
552#ifdef __debug_io\r
553 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
554#endif\r
555#if defined(EMU_C68K) && defined(EMU_M68K)\r
556 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
557#endif\r
558 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
559 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
560\r
561\r
562 if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
563\r
564 a&=0xffffff;\r
565 OtherWrite8(a,d,8);\r
566}\r
567\r
568static void CPU_CALL PicoWrite16(u32 a,u16 d)\r
569{\r
570#ifdef __debug_io\r
571 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
572#endif\r
573#if defined(EMU_C68K) && defined(EMU_M68K)\r
574 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
575#endif\r
576 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
577 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
578\r
579 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
580\r
581 a&=0xfffffe;\r
582 OtherWrite16(a,d);\r
583}\r
584\r
585static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
586{\r
587#ifdef __debug_io\r
588 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
589#endif\r
590#if defined(EMU_C68K) && defined(EMU_M68K)\r
591 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
592#endif\r
593\r
594 if ((a&0xe00000)==0xe00000)\r
595 {\r
596 // Ram:\r
597 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
598 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
599 return;\r
600 }\r
601\r
602 a&=0xfffffe;\r
603 OtherWrite16(a, (u16)(d>>16));\r
604 OtherWrite16(a+2,(u16)d);\r
605}\r
606\r
607\r
608// -----------------------------------------------------------------\r
609int PicoMemInit()\r
610{\r
611#ifdef EMU_C68K\r
612 // Setup memory callbacks:\r
613 PicoCpu.checkpc=PicoCheckPc;\r
614 PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
615 PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
616 PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
617 PicoCpu.write8 =PicoWrite8;\r
618 PicoCpu.write16=PicoWrite16;\r
619 PicoCpu.write32=PicoWrite32;\r
620#endif\r
621 return 0;\r
622}\r
623\r
624#ifdef EMU_A68K\r
625struct A68KInter\r
626{\r
627 u32 unknown;\r
628 u8 (__fastcall *Read8) (u32 a);\r
629 u16 (__fastcall *Read16)(u32 a);\r
630 u32 (__fastcall *Read32)(u32 a);\r
631 void (__fastcall *Write8) (u32 a,u8 d);\r
632 void (__fastcall *Write16) (u32 a,u16 d);\r
633 void (__fastcall *Write32) (u32 a,u32 d);\r
634 void (__fastcall *ChangePc)(u32 a);\r
635 u8 (__fastcall *PcRel8) (u32 a);\r
636 u16 (__fastcall *PcRel16)(u32 a);\r
637 u32 (__fastcall *PcRel32)(u32 a);\r
638 u16 (__fastcall *Dir16)(u32 a);\r
639 u32 (__fastcall *Dir32)(u32 a);\r
640};\r
641\r
642struct A68KInter a68k_memory_intf=\r
643{\r
644 0,\r
645 PicoRead8,\r
646 PicoRead16,\r
647 PicoRead32,\r
648 PicoWrite8,\r
649 PicoWrite16,\r
650 PicoWrite32,\r
651 PicoCheckPc,\r
652 PicoRead8,\r
653 PicoRead16,\r
654 PicoRead32,\r
655 PicoRead16, // unused\r
656 PicoRead32, // unused\r
657};\r
658#endif\r
659\r
660#ifdef EMU_M68K\r
661unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
662unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
663unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
664\r
665// these are allowed to access RAM\r
666unsigned int m68k_read_pcrelative_8 (unsigned int a) {\r
667 a&=0xffffff;\r
668 if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
669 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
670 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
671 return 0;//(u8) lastread_d;\r
672}\r
673unsigned int m68k_read_pcrelative_16(unsigned int a) {\r
674 a&=0xffffff;\r
675 if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
676 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
677 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
678 return 0;//(u16) lastread_d;\r
679}\r
680unsigned int m68k_read_pcrelative_32(unsigned int a) {\r
681 a&=0xffffff;\r
682 if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
683 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
684 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
685 return 0;//lastread_d;\r
686}\r
687\r
688unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r
689unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r
690unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_pcrelative_8 (a); }\r
691unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r
692unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r
693\r
694#ifdef EMU_C68K\r
695// ROM only\r
696unsigned int m68k_read_memory_8(unsigned int a) { if(a<Pico.romsize) return *(u8 *) (Pico.rom+(a^1)); return (u8) lastread_d[lrp_mus++&15]; }\r
697unsigned int m68k_read_memory_16(unsigned int a) { if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1));return (u16) lastread_d[lrp_mus++&15]; }\r
698unsigned int m68k_read_memory_32(unsigned int a) { if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));return (pm[0]<<16)|pm[1];} return lastread_d[lrp_mus++&15]; }\r
699\r
700// ignore writes, Cyclone already done that\r
701void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
702void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
703void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
704#else\r
705unsigned char PicoReadCD8w (unsigned int a);\r
706unsigned short PicoReadCD16w(unsigned int a);\r
707unsigned int PicoReadCD32w(unsigned int a);\r
708void PicoWriteCD8w (unsigned int a, unsigned char d);\r
709void PicoWriteCD16w(unsigned int a, unsigned short d);\r
710void PicoWriteCD32w(unsigned int a, unsigned int d);\r
711\r
712unsigned int m68k_read_memory_8(unsigned int address)\r
713{\r
714 return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
715}\r
716\r
717unsigned int m68k_read_memory_16(unsigned int address)\r
718{\r
719 return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
720}\r
721\r
722unsigned int m68k_read_memory_32(unsigned int address)\r
723{\r
724 return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
725}\r
726\r
727void m68k_write_memory_8(unsigned int address, unsigned int value)\r
728{\r
729 if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
730}\r
731\r
732void m68k_write_memory_16(unsigned int address, unsigned int value)\r
733{\r
734 if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
735}\r
736\r
737void m68k_write_memory_32(unsigned int address, unsigned int value)\r
738{\r
739 if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
740}\r
741#endif\r
742#endif // EMU_M68K\r
743\r
744\r
745// -----------------------------------------------------------------\r
746// z80 memhandlers\r
747\r
748unsigned char z80_read(unsigned short a)\r
749{\r
750 u8 ret = 0;\r
751\r
752 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
753 {\r
754 if(PicoOpt&1) ret = (u8) YM2612Read();\r
755 goto end;\r
756 }\r
757\r
758 if (a>=0x8000)\r
759 {\r
760 u32 addr68k;\r
761 addr68k=Pico.m.z80_bank68k<<15;\r
762 addr68k+=a&0x7fff;\r
763\r
764 ret = (u8) PicoRead8(addr68k);\r
765 //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r
766 goto end;\r
767 }\r
768\r
769 // should not be needed || dprintf("z80_read RAM");\r
770 if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
771\r
772end:\r
773 return ret;\r
774}\r
775\r
776unsigned short z80_read16(unsigned short a)\r
777{\r
778 //dprintf("z80_read16");\r
779\r
780 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
781}\r
782\r
783void z80_write(unsigned char data, unsigned short a)\r
784{\r
785 //if (a<0x4000)\r
786 // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
787\r
788 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
789 {\r
790 if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
791 return;\r
792 }\r
793\r
794 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
795 {\r
796 if(PicoOpt&2) SN76496Write(data);\r
797 return;\r
798 }\r
799\r
800 if ((a>>8)==0x60)\r
801 {\r
802 Pico.m.z80_bank68k>>=1;\r
803 Pico.m.z80_bank68k|=(data&1)<<8;\r
804 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
805 return;\r
806 }\r
807\r
808 if (a>=0x8000)\r
809 {\r
810 u32 addr68k;\r
811 addr68k=Pico.m.z80_bank68k<<15;\r
812 addr68k+=a&0x7fff;\r
813 PicoWrite8(addr68k, data);\r
814 //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r
815 return;\r
816 }\r
817\r
818 // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
819 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
820}\r
821\r
822void z80_write16(unsigned short data, unsigned short a)\r
823{\r
824 //dprintf("z80_write16");\r
825\r
826 z80_write((unsigned char) data,a);\r
827 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
828}\r
829\r
fast MegaDrive/MegaCD/32X emulator