NOT setting upper bits on PUSH PC, minor adjustments
[picodrive.git] / Pico / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
2d0b15bb 10#define __debug_io\r
cc68a136 11\r
12#include "PicoInt.h"\r
13\r
14#include "sound/sound.h"\r
15#include "sound/ym2612.h"\r
16#include "sound/sn76496.h"\r
17\r
18typedef unsigned char u8;\r
19typedef unsigned short u16;\r
20typedef unsigned int u32;\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
25u8 PicoRead8(u32 a);\r
26u16 PicoRead16(u32 a);\r
27void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
28void PicoWriteRomHW_in1 (u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#if defined(EMU_C68K) && defined(EMU_M68K)\r
33// cyclone debug mode\r
34u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
35int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
36extern unsigned int ppop;\r
37#endif\r
38\r
39#if defined(EMU_C68K) || defined(EMU_A68K)\r
40static __inline int PicoMemBase(u32 pc)\r
41{\r
42 int membase=0;\r
43\r
44 if (pc<Pico.romsize+4)\r
45 {\r
46 membase=(int)Pico.rom; // Program Counter in Rom\r
47 }\r
48 else if ((pc&0xe00000)==0xe00000)\r
49 {\r
50 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
51 }\r
52 else\r
53 {\r
54 // Error - Program Counter is invalid\r
55 membase=(int)Pico.rom;\r
56 }\r
57\r
58 return membase;\r
59}\r
60#endif\r
61\r
62\r
63#ifdef EMU_A68K\r
64extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
65#endif\r
66\r
67static u32 CPU_CALL PicoCheckPc(u32 pc)\r
68{\r
69 u32 ret=0;\r
70#if defined(EMU_C68K)\r
71 pc-=PicoCpu.membase; // Get real pc\r
72 pc&=0xfffffe;\r
721cd396 73 if (pc == 0)\r
74 return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
cc68a136 75\r
76 PicoCpu.membase=PicoMemBase(pc);\r
77\r
78 ret = PicoCpu.membase+pc;\r
79#elif defined(EMU_A68K)\r
80 OP_ROM=(u8 *)PicoMemBase(pc);\r
81\r
82 // don't bother calling us back unless it's outside the 64k segment\r
83 M68000_regs.AsmBank=(pc>>16);\r
84#endif\r
85 return ret;\r
86}\r
87\r
88\r
89int PicoInitPc(u32 pc)\r
90{\r
91 PicoCheckPc(pc);\r
92 return 0;\r
93}\r
94\r
95#ifndef _ASM_MEMORY_C\r
96void PicoMemReset()\r
97{\r
98}\r
99#endif\r
100\r
101// -----------------------------------------------------------------\r
102\r
103#ifndef _ASM_MEMORY_C\r
104// address must already be checked\r
105static int SRAMRead(u32 a)\r
106{\r
107 u8 *d = SRam.data-SRam.start+a;\r
108 return (d[0]<<8)|d[1];\r
109}\r
110#endif\r
111\r
cc68a136 112\r
113// for nonstandard reads\r
114#ifndef _ASM_MEMORY_C\r
115static\r
116#endif\r
fa1e5e29 117u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 118{\r
119 u32 d=0;\r
120\r
121 dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
122\r
123 // for games with simple protection devices, discovered by Haze\r
124 // some dumb detection is used, but that should be enough to make things work\r
125 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
126 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
4f672280 127 if (a == 0x400000) { d=0x55<<8; goto end; }\r
128 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
129 }\r
130 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
131 if (a == 0x400000) { d=0x55<<8; goto end; }\r
132 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
133 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
134 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
135 }\r
136 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
137 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
138 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
139 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
140 }\r
141 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
142 if (a == 0x400000) { d=0x90<<8; goto end; }\r
143 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
144 // checks the result, which is of the above one. Left it just in case.\r
145 }\r
146 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
147 if (a == 0x400000) { d=0x55<<8; goto end; }\r
148 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
149 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
150 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
151 }\r
cc68a136 152 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
4f672280 153 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
154 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
cc68a136 155 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
156 }\r
157 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
158 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
4f672280 159 d=0x0c; goto end;\r
160 }\r
cc68a136 161 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
4f672280 162 d=0x28; goto end; // does the check from RAM\r
163 }\r
cc68a136 164 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
4f672280 165 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
166 }\r
cc68a136 167 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
4f672280 168 d=0x0a; goto end;\r
169 }\r
cc68a136 170 }\r
171 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
172 d=0x01; goto end;\r
173 }\r
174 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
175 d=0x1f; goto end;\r
176 }\r
177 else if (a == 0x30fe02) {\r
178 // Virtua Racing - just for fun\r
4f672280 179 // this seems to be some flag that SVP is ready or something similar\r
cc68a136 180 d=1; goto end;\r
181 }\r
182\r
183end:\r
184 dprintf("ret = %04x", d);\r
185 return d;\r
186}\r
187\r
cc68a136 188\r
189//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
190\r
fa1e5e29 191static void OtherWrite8End(u32 a,u32 d,int realsize)\r
cc68a136 192{\r
cc68a136 193 // sram\r
194 //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
195 //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
196 if(a >= SRam.start && a <= SRam.end) {\r
721cd396 197 dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 198 unsigned int sreg = Pico.m.sram_reg;\r
199 if(!(sreg & 0x10)) {\r
4f672280 200 // not detected SRAM\r
201 if((a&~1)==0x200000) {\r
cc68a136 202 Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
203 SRam.start=0x200000; SRam.end=SRam.start+1;\r
204 }\r
4f672280 205 Pico.m.sram_reg|=0x10;\r
206 }\r
cc68a136 207 if(sreg & 4) { // EEPROM write\r
4f672280 208 if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
209 // just update pending state\r
210 SRAMUpdPending(a, d);\r
211 } else {\r
212 SRAMWriteEEPROM(sreg>>6); // execute pending\r
213 SRAMUpdPending(a, d);\r
cc68a136 214 lastSSRamWrite = SekCyclesDoneT();\r
4f672280 215 }\r
cc68a136 216 } else if(!(sreg & 2)) {\r
217 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
218 if(*pm != (u8)d) {\r
219 SRam.changed = 1;\r
220 *pm=(u8)d;\r
221 }\r
4f672280 222 }\r
cc68a136 223 return;\r
224 }\r
225\r
226#ifdef _ASM_MEMORY_C\r
227 // special ROM hardware (currently only banking and sram reg supported)\r
228 if((a&0xfffff1) == 0xA130F1) {\r
229 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
230 return;\r
231 }\r
232#else\r
233 // sram access register\r
234 if(a == 0xA130F1) {\r
721cd396 235 dprintf("sram reg=%02x", d);\r
236 Pico.m.sram_reg &= ~3;\r
237 Pico.m.sram_reg |= (u8)(d&3);\r
cc68a136 238 return;\r
239 }\r
240#endif\r
241 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
242\r
243 if(a >= 0xA13004 && a < 0xA13040) {\r
244 // dumb 12-in-1 or 4-in-1 banking support\r
4f672280 245 int len;\r
246 a &= 0x3f; a <<= 16;\r
247 len = Pico.romsize - a;\r
248 if (len <= 0) return; // invalid/missing bank\r
249 if (len > 0x200000) len = 0x200000; // 2 megs\r
250 memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
cc68a136 251 return;\r
252 }\r
253\r
254 // for games with simple protection devices, discovered by Haze\r
255 else if ((a>>22) == 1)\r
256 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
257}\r
258\r
cc68a136 259\r
fa1e5e29 260#include "MemoryCmn.c"\r
261\r
cc68a136 262\r
263// -----------------------------------------------------------------\r
264// Read Rom and read Ram\r
265\r
266#ifndef _ASM_MEMORY_C\r
267u8 CPU_CALL PicoRead8(u32 a)\r
268{\r
269 u32 d=0;\r
270\r
271 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
272\r
273 a&=0xffffff;\r
274\r
275#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
276 // sram\r
277 if(a >= SRam.start && a <= SRam.end) {\r
278 unsigned int sreg = Pico.m.sram_reg;\r
279 if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
4f672280 280 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
281 }\r
cc68a136 282 if(sreg & 4) { // EEPROM read\r
283 d = SRAMReadEEPROM();\r
284 goto end;\r
285 } else if(sreg & 1) {\r
286 d = *(u8 *)(SRam.data-SRam.start+a);\r
287 goto end;\r
288 }\r
289 }\r
290#endif\r
291\r
292 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
293 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
294\r
295 d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
296\r
297 end:\r
298\r
299 //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
300 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
301 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
302 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
303\r
304 //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
305 //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
306#ifdef __debug_io\r
307 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
308#endif\r
309#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 310 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 311 lastread_a = a;\r
312 lastread_d[lrp_cyc++&15] = (u8)d;\r
313 }\r
314#endif\r
315 return (u8)d;\r
316}\r
317\r
318u16 CPU_CALL PicoRead16(u32 a)\r
319{\r
320 u16 d=0;\r
321\r
322 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
323\r
324 a&=0xfffffe;\r
325\r
326#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
327 // sram\r
328 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
329 d = (u16) SRAMRead(a);\r
330 goto end;\r
331 }\r
332#endif\r
333\r
334 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
335\r
336 d = (u16)OtherRead16(a, 16);\r
337\r
338 end:\r
339 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
340 // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
341\r
342#ifdef __debug_io\r
343 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
344#endif\r
345#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 346 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 347 lastread_a = a;\r
348 lastread_d[lrp_cyc++&15] = d;\r
349 }\r
350#endif\r
351 return d;\r
352}\r
353\r
354u32 CPU_CALL PicoRead32(u32 a)\r
355{\r
356 u32 d=0;\r
357\r
358 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
359\r
360 a&=0xfffffe;\r
361\r
362 // sram\r
363 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
364 d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
365 goto end;\r
366 }\r
367\r
368 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
369\r
370 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
371\r
372 end:\r
373#ifdef __debug_io\r
374 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
375#endif\r
376#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 377 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 378 lastread_a = a;\r
379 lastread_d[lrp_cyc++&15] = d;\r
380 }\r
381#endif\r
382 return d;\r
383}\r
384#endif\r
385\r
386// -----------------------------------------------------------------\r
387// Write Ram\r
388\r
389static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
390{\r
391#ifdef __debug_io\r
392 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
393#endif\r
394#if defined(EMU_C68K) && defined(EMU_M68K)\r
395 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
396#endif\r
397 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
398 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
399\r
d9153729 400 if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
cc68a136 401\r
402 a&=0xffffff;\r
403 OtherWrite8(a,d,8);\r
404}\r
405\r
b67ef287 406void CPU_CALL PicoWrite16(u32 a,u16 d)\r
cc68a136 407{\r
408#ifdef __debug_io\r
409 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
410#endif\r
411#if defined(EMU_C68K) && defined(EMU_M68K)\r
412 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
413#endif\r
414 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
415 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
416\r
417 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
418\r
419 a&=0xfffffe;\r
420 OtherWrite16(a,d);\r
421}\r
422\r
423static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
424{\r
425#ifdef __debug_io\r
426 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
427#endif\r
428#if defined(EMU_C68K) && defined(EMU_M68K)\r
429 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
430#endif\r
431\r
432 if ((a&0xe00000)==0xe00000)\r
433 {\r
434 // Ram:\r
435 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
436 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
437 return;\r
438 }\r
439\r
440 a&=0xfffffe;\r
441 OtherWrite16(a, (u16)(d>>16));\r
442 OtherWrite16(a+2,(u16)d);\r
443}\r
444\r
445\r
446// -----------------------------------------------------------------\r
b837b69b 447void PicoMemSetup()\r
cc68a136 448{\r
449#ifdef EMU_C68K\r
450 // Setup memory callbacks:\r
451 PicoCpu.checkpc=PicoCheckPc;\r
452 PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
453 PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
454 PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
455 PicoCpu.write8 =PicoWrite8;\r
456 PicoCpu.write16=PicoWrite16;\r
457 PicoCpu.write32=PicoWrite32;\r
458#endif\r
cc68a136 459}\r
460\r
461#ifdef EMU_A68K\r
462struct A68KInter\r
463{\r
464 u32 unknown;\r
465 u8 (__fastcall *Read8) (u32 a);\r
466 u16 (__fastcall *Read16)(u32 a);\r
467 u32 (__fastcall *Read32)(u32 a);\r
468 void (__fastcall *Write8) (u32 a,u8 d);\r
469 void (__fastcall *Write16) (u32 a,u16 d);\r
470 void (__fastcall *Write32) (u32 a,u32 d);\r
471 void (__fastcall *ChangePc)(u32 a);\r
472 u8 (__fastcall *PcRel8) (u32 a);\r
473 u16 (__fastcall *PcRel16)(u32 a);\r
474 u32 (__fastcall *PcRel32)(u32 a);\r
475 u16 (__fastcall *Dir16)(u32 a);\r
476 u32 (__fastcall *Dir32)(u32 a);\r
477};\r
478\r
479struct A68KInter a68k_memory_intf=\r
480{\r
481 0,\r
482 PicoRead8,\r
483 PicoRead16,\r
484 PicoRead32,\r
485 PicoWrite8,\r
486 PicoWrite16,\r
487 PicoWrite32,\r
488 PicoCheckPc,\r
489 PicoRead8,\r
490 PicoRead16,\r
491 PicoRead32,\r
492 PicoRead16, // unused\r
493 PicoRead32, // unused\r
494};\r
495#endif\r
496\r
497#ifdef EMU_M68K\r
498unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
499unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
500unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
501\r
502// these are allowed to access RAM\r
2d0b15bb 503static unsigned int m68k_read_8 (unsigned int a, int do_fake) {\r
cc68a136 504 a&=0xffffff;\r
505 if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
506 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
2d0b15bb 507 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
cc68a136 508 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
2d0b15bb 509 return 0;\r
cc68a136 510}\r
2d0b15bb 511static unsigned int m68k_read_16(unsigned int a, int do_fake) {\r
cc68a136 512 a&=0xffffff;\r
513 if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
514 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
2d0b15bb 515 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
cc68a136 516 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
2d0b15bb 517 return 0;\r
cc68a136 518}\r
2d0b15bb 519static unsigned int m68k_read_32(unsigned int a, int do_fake) {\r
cc68a136 520 a&=0xffffff;\r
521 if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
522 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
2d0b15bb 523 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
cc68a136 524 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
2d0b15bb 525 return 0;\r
cc68a136 526}\r
527\r
2d0b15bb 528unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
529unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
530unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
531unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
532unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
533unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
534unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
535unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
cc68a136 536\r
537#ifdef EMU_C68K\r
538// ROM only\r
2d0b15bb 539unsigned int m68k_read_memory_8(unsigned int a)\r
540{\r
541 u8 d;\r
542 if(a<Pico.romsize) d = *(u8 *) (Pico.rom+(a^1));\r
543 else d = (u8) lastread_d[lrp_mus++&15];\r
544#ifdef __debug_io\r
545 dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
546#endif\r
547 return d;\r
548}\r
549unsigned int m68k_read_memory_16(unsigned int a)\r
550{\r
551 u16 d;\r
552 if(a<Pico.romsize) d = *(u16 *)(Pico.rom+(a&~1));\r
553 else d = (u16) lastread_d[lrp_mus++&15];\r
554#ifdef __debug_io\r
555 dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
556#endif\r
557 return d;\r
558}\r
559unsigned int m68k_read_memory_32(unsigned int a)\r
560{\r
561 u32 d;\r
562 if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1];}\r
563 else d = lastread_d[lrp_mus++&15];\r
564#ifdef __debug_io\r
565 dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
566#endif\r
567 return d;\r
568}\r
cc68a136 569\r
570// ignore writes, Cyclone already done that\r
571void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
572void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
573void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
574#else\r
575unsigned char PicoReadCD8w (unsigned int a);\r
576unsigned short PicoReadCD16w(unsigned int a);\r
577unsigned int PicoReadCD32w(unsigned int a);\r
578void PicoWriteCD8w (unsigned int a, unsigned char d);\r
579void PicoWriteCD16w(unsigned int a, unsigned short d);\r
580void PicoWriteCD32w(unsigned int a, unsigned int d);\r
581\r
582unsigned int m68k_read_memory_8(unsigned int address)\r
583{\r
4f672280 584 return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
cc68a136 585}\r
586\r
587unsigned int m68k_read_memory_16(unsigned int address)\r
588{\r
4f672280 589 return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
cc68a136 590}\r
591\r
592unsigned int m68k_read_memory_32(unsigned int address)\r
593{\r
4f672280 594 return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
cc68a136 595}\r
596\r
597void m68k_write_memory_8(unsigned int address, unsigned int value)\r
598{\r
4f672280 599 if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
cc68a136 600}\r
601\r
602void m68k_write_memory_16(unsigned int address, unsigned int value)\r
603{\r
4f672280 604 if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
cc68a136 605}\r
606\r
607void m68k_write_memory_32(unsigned int address, unsigned int value)\r
608{\r
4f672280 609 if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
cc68a136 610}\r
611#endif\r
612#endif // EMU_M68K\r
613\r
614\r
615// -----------------------------------------------------------------\r
616// z80 memhandlers\r
617\r
618unsigned char z80_read(unsigned short a)\r
619{\r
620 u8 ret = 0;\r
621\r
622 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
623 {\r
624 if(PicoOpt&1) ret = (u8) YM2612Read();\r
625 goto end;\r
626 }\r
627\r
628 if (a>=0x8000)\r
629 {\r
630 u32 addr68k;\r
631 addr68k=Pico.m.z80_bank68k<<15;\r
632 addr68k+=a&0x7fff;\r
633\r
634 ret = (u8) PicoRead8(addr68k);\r
635 //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r
636 goto end;\r
637 }\r
638\r
639 // should not be needed || dprintf("z80_read RAM");\r
640 if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
641\r
642end:\r
643 return ret;\r
644}\r
645\r
646unsigned short z80_read16(unsigned short a)\r
647{\r
648 //dprintf("z80_read16");\r
649\r
650 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
651}\r
652\r
653void z80_write(unsigned char data, unsigned short a)\r
654{\r
655 //if (a<0x4000)\r
656 // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
657\r
658 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
659 {\r
660 if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
661 return;\r
662 }\r
663\r
664 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
665 {\r
666 if(PicoOpt&2) SN76496Write(data);\r
667 return;\r
668 }\r
669\r
670 if ((a>>8)==0x60)\r
671 {\r
672 Pico.m.z80_bank68k>>=1;\r
673 Pico.m.z80_bank68k|=(data&1)<<8;\r
674 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
675 return;\r
676 }\r
677\r
678 if (a>=0x8000)\r
679 {\r
680 u32 addr68k;\r
681 addr68k=Pico.m.z80_bank68k<<15;\r
682 addr68k+=a&0x7fff;\r
683 PicoWrite8(addr68k, data);\r
684 //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r
685 return;\r
686 }\r
687\r
688 // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
689 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
690}\r
691\r
692void z80_write16(unsigned short data, unsigned short a)\r
693{\r
694 //dprintf("z80_write16");\r
695\r
696 z80_write((unsigned char) data,a);\r
697 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
698}\r
699\r