some skin adjustments
[picodrive.git] / Pico / Memory.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
2d0b15bb 10#define __debug_io\r
cc68a136 11\r
12#include "PicoInt.h"\r
13\r
14#include "sound/sound.h"\r
15#include "sound/ym2612.h"\r
16#include "sound/sn76496.h"\r
17\r
18typedef unsigned char u8;\r
19typedef unsigned short u16;\r
20typedef unsigned int u32;\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
0af33fe0 25u32 PicoRead8(u32 a);\r
26u32 PicoRead16(u32 a);\r
cc68a136 27void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
28void PicoWriteRomHW_in1 (u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#if defined(EMU_C68K) && defined(EMU_M68K)\r
33// cyclone debug mode\r
34u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
35int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
36extern unsigned int ppop;\r
37#endif\r
38\r
39#if defined(EMU_C68K) || defined(EMU_A68K)\r
40static __inline int PicoMemBase(u32 pc)\r
41{\r
42 int membase=0;\r
43\r
44 if (pc<Pico.romsize+4)\r
45 {\r
46 membase=(int)Pico.rom; // Program Counter in Rom\r
47 }\r
48 else if ((pc&0xe00000)==0xe00000)\r
49 {\r
50 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
51 }\r
52 else\r
53 {\r
54 // Error - Program Counter is invalid\r
55 membase=(int)Pico.rom;\r
56 }\r
57\r
58 return membase;\r
59}\r
60#endif\r
61\r
62\r
63#ifdef EMU_A68K\r
64extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
65#endif\r
66\r
67static u32 CPU_CALL PicoCheckPc(u32 pc)\r
68{\r
69 u32 ret=0;\r
70#if defined(EMU_C68K)\r
71 pc-=PicoCpu.membase; // Get real pc\r
0af33fe0 72// pc&=0xfffffe;\r
73 pc&=~1;\r
74 if ((pc<<8) == 0)\r
721cd396 75 return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
cc68a136 76\r
0af33fe0 77 PicoCpu.membase=PicoMemBase(pc&0x00ffffff);\r
78 PicoCpu.membase-=pc&0xff000000;\r
cc68a136 79\r
80 ret = PicoCpu.membase+pc;\r
81#elif defined(EMU_A68K)\r
82 OP_ROM=(u8 *)PicoMemBase(pc);\r
83\r
84 // don't bother calling us back unless it's outside the 64k segment\r
85 M68000_regs.AsmBank=(pc>>16);\r
86#endif\r
87 return ret;\r
88}\r
89\r
90\r
91int PicoInitPc(u32 pc)\r
92{\r
93 PicoCheckPc(pc);\r
94 return 0;\r
95}\r
96\r
97#ifndef _ASM_MEMORY_C\r
98void PicoMemReset()\r
99{\r
100}\r
101#endif\r
102\r
103// -----------------------------------------------------------------\r
104\r
105#ifndef _ASM_MEMORY_C\r
106// address must already be checked\r
107static int SRAMRead(u32 a)\r
108{\r
109 u8 *d = SRam.data-SRam.start+a;\r
110 return (d[0]<<8)|d[1];\r
111}\r
112#endif\r
113\r
cc68a136 114\r
115// for nonstandard reads\r
116#ifndef _ASM_MEMORY_C\r
117static\r
118#endif\r
fa1e5e29 119u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 120{\r
121 u32 d=0;\r
122\r
123 dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
124\r
125 // for games with simple protection devices, discovered by Haze\r
126 // some dumb detection is used, but that should be enough to make things work\r
127 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
128 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
4f672280 129 if (a == 0x400000) { d=0x55<<8; goto end; }\r
130 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
131 }\r
132 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
133 if (a == 0x400000) { d=0x55<<8; goto end; }\r
134 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
135 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
136 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
137 }\r
138 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
139 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
140 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
141 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
142 }\r
143 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
144 if (a == 0x400000) { d=0x90<<8; goto end; }\r
145 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
146 // checks the result, which is of the above one. Left it just in case.\r
147 }\r
148 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
149 if (a == 0x400000) { d=0x55<<8; goto end; }\r
150 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
151 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
152 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
153 }\r
cc68a136 154 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
4f672280 155 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
156 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
cc68a136 157 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
158 }\r
159 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
160 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
4f672280 161 d=0x0c; goto end;\r
162 }\r
cc68a136 163 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
4f672280 164 d=0x28; goto end; // does the check from RAM\r
165 }\r
cc68a136 166 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
4f672280 167 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
168 }\r
cc68a136 169 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
4f672280 170 d=0x0a; goto end;\r
171 }\r
cc68a136 172 }\r
173 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
174 d=0x01; goto end;\r
175 }\r
176 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
177 d=0x1f; goto end;\r
178 }\r
179 else if (a == 0x30fe02) {\r
180 // Virtua Racing - just for fun\r
4f672280 181 // this seems to be some flag that SVP is ready or something similar\r
cc68a136 182 d=1; goto end;\r
183 }\r
184\r
185end:\r
186 dprintf("ret = %04x", d);\r
187 return d;\r
188}\r
189\r
cc68a136 190\r
191//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
192\r
fa1e5e29 193static void OtherWrite8End(u32 a,u32 d,int realsize)\r
cc68a136 194{\r
cc68a136 195 // sram\r
196 //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
197 //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
198 if(a >= SRam.start && a <= SRam.end) {\r
721cd396 199 dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 200 unsigned int sreg = Pico.m.sram_reg;\r
201 if(!(sreg & 0x10)) {\r
4f672280 202 // not detected SRAM\r
203 if((a&~1)==0x200000) {\r
cc68a136 204 Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
205 SRam.start=0x200000; SRam.end=SRam.start+1;\r
206 }\r
4f672280 207 Pico.m.sram_reg|=0x10;\r
208 }\r
cc68a136 209 if(sreg & 4) { // EEPROM write\r
4f672280 210 if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
211 // just update pending state\r
212 SRAMUpdPending(a, d);\r
213 } else {\r
214 SRAMWriteEEPROM(sreg>>6); // execute pending\r
215 SRAMUpdPending(a, d);\r
cc68a136 216 lastSSRamWrite = SekCyclesDoneT();\r
4f672280 217 }\r
cc68a136 218 } else if(!(sreg & 2)) {\r
219 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
220 if(*pm != (u8)d) {\r
221 SRam.changed = 1;\r
222 *pm=(u8)d;\r
223 }\r
4f672280 224 }\r
cc68a136 225 return;\r
226 }\r
227\r
228#ifdef _ASM_MEMORY_C\r
229 // special ROM hardware (currently only banking and sram reg supported)\r
230 if((a&0xfffff1) == 0xA130F1) {\r
231 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
232 return;\r
233 }\r
234#else\r
235 // sram access register\r
236 if(a == 0xA130F1) {\r
721cd396 237 dprintf("sram reg=%02x", d);\r
238 Pico.m.sram_reg &= ~3;\r
239 Pico.m.sram_reg |= (u8)(d&3);\r
cc68a136 240 return;\r
241 }\r
242#endif\r
243 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
244\r
245 if(a >= 0xA13004 && a < 0xA13040) {\r
246 // dumb 12-in-1 or 4-in-1 banking support\r
4f672280 247 int len;\r
248 a &= 0x3f; a <<= 16;\r
249 len = Pico.romsize - a;\r
250 if (len <= 0) return; // invalid/missing bank\r
251 if (len > 0x200000) len = 0x200000; // 2 megs\r
252 memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
cc68a136 253 return;\r
254 }\r
255\r
256 // for games with simple protection devices, discovered by Haze\r
257 else if ((a>>22) == 1)\r
258 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
259}\r
260\r
cc68a136 261\r
fa1e5e29 262#include "MemoryCmn.c"\r
263\r
cc68a136 264\r
265// -----------------------------------------------------------------\r
266// Read Rom and read Ram\r
267\r
268#ifndef _ASM_MEMORY_C\r
0af33fe0 269u32 CPU_CALL PicoRead8(u32 a)\r
cc68a136 270{\r
271 u32 d=0;\r
272\r
273 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
274\r
275 a&=0xffffff;\r
276\r
277#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
278 // sram\r
279 if(a >= SRam.start && a <= SRam.end) {\r
280 unsigned int sreg = Pico.m.sram_reg;\r
281 if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
4f672280 282 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
283 }\r
cc68a136 284 if(sreg & 4) { // EEPROM read\r
285 d = SRAMReadEEPROM();\r
286 goto end;\r
287 } else if(sreg & 1) {\r
288 d = *(u8 *)(SRam.data-SRam.start+a);\r
289 goto end;\r
290 }\r
291 }\r
292#endif\r
293\r
294 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
295 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
296\r
297 d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
298\r
299 end:\r
300\r
301 //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
302 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
303 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
304 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
305\r
306 //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
307 //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
308#ifdef __debug_io\r
309 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
310#endif\r
311#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 312 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 313 lastread_a = a;\r
314 lastread_d[lrp_cyc++&15] = (u8)d;\r
315 }\r
316#endif\r
0af33fe0 317 return d;\r
cc68a136 318}\r
319\r
0af33fe0 320u32 CPU_CALL PicoRead16(u32 a)\r
cc68a136 321{\r
0af33fe0 322 u32 d=0;\r
cc68a136 323\r
324 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
325\r
326 a&=0xfffffe;\r
327\r
328#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
329 // sram\r
330 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
0af33fe0 331 d = SRAMRead(a);\r
cc68a136 332 goto end;\r
333 }\r
334#endif\r
335\r
336 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
337\r
0af33fe0 338 d = OtherRead16(a, 16);\r
cc68a136 339\r
340 end:\r
341 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
342 // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
343\r
344#ifdef __debug_io\r
345 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
346#endif\r
347#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 348 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 349 lastread_a = a;\r
350 lastread_d[lrp_cyc++&15] = d;\r
351 }\r
352#endif\r
353 return d;\r
354}\r
355\r
356u32 CPU_CALL PicoRead32(u32 a)\r
357{\r
358 u32 d=0;\r
359\r
360 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
361\r
362 a&=0xfffffe;\r
363\r
364 // sram\r
365 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
366 d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
367 goto end;\r
368 }\r
369\r
370 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
371\r
372 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
373\r
374 end:\r
375#ifdef __debug_io\r
376 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
377#endif\r
378#if defined(EMU_C68K) && defined(EMU_M68K)\r
2d0b15bb 379 if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
cc68a136 380 lastread_a = a;\r
381 lastread_d[lrp_cyc++&15] = d;\r
382 }\r
383#endif\r
384 return d;\r
385}\r
386#endif\r
387\r
388// -----------------------------------------------------------------\r
389// Write Ram\r
390\r
391static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
392{\r
393#ifdef __debug_io\r
394 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
395#endif\r
396#if defined(EMU_C68K) && defined(EMU_M68K)\r
397 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
398#endif\r
399 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
400 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
401\r
d9153729 402 if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
cc68a136 403\r
404 a&=0xffffff;\r
405 OtherWrite8(a,d,8);\r
406}\r
407\r
b67ef287 408void CPU_CALL PicoWrite16(u32 a,u16 d)\r
cc68a136 409{\r
410#ifdef __debug_io\r
411 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
412#endif\r
413#if defined(EMU_C68K) && defined(EMU_M68K)\r
414 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
415#endif\r
416 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
417 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
418\r
419 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
420\r
421 a&=0xfffffe;\r
422 OtherWrite16(a,d);\r
423}\r
424\r
425static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
426{\r
427#ifdef __debug_io\r
428 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
429#endif\r
430#if defined(EMU_C68K) && defined(EMU_M68K)\r
431 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
432#endif\r
433\r
434 if ((a&0xe00000)==0xe00000)\r
435 {\r
436 // Ram:\r
437 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
438 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
439 return;\r
440 }\r
441\r
442 a&=0xfffffe;\r
443 OtherWrite16(a, (u16)(d>>16));\r
444 OtherWrite16(a+2,(u16)d);\r
445}\r
446\r
447\r
448// -----------------------------------------------------------------\r
b837b69b 449void PicoMemSetup()\r
cc68a136 450{\r
451#ifdef EMU_C68K\r
452 // Setup memory callbacks:\r
453 PicoCpu.checkpc=PicoCheckPc;\r
454 PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
455 PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
456 PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
457 PicoCpu.write8 =PicoWrite8;\r
458 PicoCpu.write16=PicoWrite16;\r
459 PicoCpu.write32=PicoWrite32;\r
460#endif\r
cc68a136 461}\r
462\r
463#ifdef EMU_A68K\r
464struct A68KInter\r
465{\r
466 u32 unknown;\r
467 u8 (__fastcall *Read8) (u32 a);\r
468 u16 (__fastcall *Read16)(u32 a);\r
469 u32 (__fastcall *Read32)(u32 a);\r
470 void (__fastcall *Write8) (u32 a,u8 d);\r
471 void (__fastcall *Write16) (u32 a,u16 d);\r
472 void (__fastcall *Write32) (u32 a,u32 d);\r
473 void (__fastcall *ChangePc)(u32 a);\r
474 u8 (__fastcall *PcRel8) (u32 a);\r
475 u16 (__fastcall *PcRel16)(u32 a);\r
476 u32 (__fastcall *PcRel32)(u32 a);\r
477 u16 (__fastcall *Dir16)(u32 a);\r
478 u32 (__fastcall *Dir32)(u32 a);\r
479};\r
480\r
481struct A68KInter a68k_memory_intf=\r
482{\r
483 0,\r
484 PicoRead8,\r
485 PicoRead16,\r
486 PicoRead32,\r
487 PicoWrite8,\r
488 PicoWrite16,\r
489 PicoWrite32,\r
490 PicoCheckPc,\r
491 PicoRead8,\r
492 PicoRead16,\r
493 PicoRead32,\r
494 PicoRead16, // unused\r
495 PicoRead32, // unused\r
496};\r
497#endif\r
498\r
499#ifdef EMU_M68K\r
500unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
501unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
502unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
503\r
504// these are allowed to access RAM\r
2d0b15bb 505static unsigned int m68k_read_8 (unsigned int a, int do_fake) {\r
cc68a136 506 a&=0xffffff;\r
507 if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
508 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
2270612a 509#ifdef EMU_C68K\r
2d0b15bb 510 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 511#endif\r
cc68a136 512 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
2d0b15bb 513 return 0;\r
cc68a136 514}\r
2d0b15bb 515static unsigned int m68k_read_16(unsigned int a, int do_fake) {\r
cc68a136 516 a&=0xffffff;\r
517 if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
518 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
2270612a 519#ifdef EMU_C68K\r
2d0b15bb 520 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 521#endif\r
cc68a136 522 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
2d0b15bb 523 return 0;\r
cc68a136 524}\r
2d0b15bb 525static unsigned int m68k_read_32(unsigned int a, int do_fake) {\r
cc68a136 526 a&=0xffffff;\r
527 if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
528 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
2270612a 529#ifdef EMU_C68K\r
2d0b15bb 530 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
2270612a 531#endif\r
cc68a136 532 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
2d0b15bb 533 return 0;\r
cc68a136 534}\r
535\r
2d0b15bb 536unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
537unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
538unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
539unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
540unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
541unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
542unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
543unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
cc68a136 544\r
545#ifdef EMU_C68K\r
546// ROM only\r
2d0b15bb 547unsigned int m68k_read_memory_8(unsigned int a)\r
548{\r
549 u8 d;\r
550 if(a<Pico.romsize) d = *(u8 *) (Pico.rom+(a^1));\r
551 else d = (u8) lastread_d[lrp_mus++&15];\r
552#ifdef __debug_io\r
553 dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
554#endif\r
555 return d;\r
556}\r
557unsigned int m68k_read_memory_16(unsigned int a)\r
558{\r
559 u16 d;\r
560 if(a<Pico.romsize) d = *(u16 *)(Pico.rom+(a&~1));\r
561 else d = (u16) lastread_d[lrp_mus++&15];\r
562#ifdef __debug_io\r
563 dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
564#endif\r
565 return d;\r
566}\r
567unsigned int m68k_read_memory_32(unsigned int a)\r
568{\r
569 u32 d;\r
570 if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1];}\r
571 else d = lastread_d[lrp_mus++&15];\r
572#ifdef __debug_io\r
573 dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
574#endif\r
575 return d;\r
576}\r
cc68a136 577\r
578// ignore writes, Cyclone already done that\r
579void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
580void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
581void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
582#else\r
583unsigned char PicoReadCD8w (unsigned int a);\r
584unsigned short PicoReadCD16w(unsigned int a);\r
585unsigned int PicoReadCD32w(unsigned int a);\r
586void PicoWriteCD8w (unsigned int a, unsigned char d);\r
587void PicoWriteCD16w(unsigned int a, unsigned short d);\r
588void PicoWriteCD32w(unsigned int a, unsigned int d);\r
589\r
590unsigned int m68k_read_memory_8(unsigned int address)\r
591{\r
4f672280 592 return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
cc68a136 593}\r
594\r
595unsigned int m68k_read_memory_16(unsigned int address)\r
596{\r
4f672280 597 return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
cc68a136 598}\r
599\r
600unsigned int m68k_read_memory_32(unsigned int address)\r
601{\r
4f672280 602 return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
cc68a136 603}\r
604\r
605void m68k_write_memory_8(unsigned int address, unsigned int value)\r
606{\r
4f672280 607 if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
cc68a136 608}\r
609\r
610void m68k_write_memory_16(unsigned int address, unsigned int value)\r
611{\r
4f672280 612 if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
cc68a136 613}\r
614\r
615void m68k_write_memory_32(unsigned int address, unsigned int value)\r
616{\r
4f672280 617 if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
cc68a136 618}\r
619#endif\r
620#endif // EMU_M68K\r
621\r
622\r
623// -----------------------------------------------------------------\r
624// z80 memhandlers\r
625\r
626unsigned char z80_read(unsigned short a)\r
627{\r
628 u8 ret = 0;\r
629\r
630 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
631 {\r
632 if(PicoOpt&1) ret = (u8) YM2612Read();\r
633 goto end;\r
634 }\r
635\r
636 if (a>=0x8000)\r
637 {\r
638 u32 addr68k;\r
639 addr68k=Pico.m.z80_bank68k<<15;\r
640 addr68k+=a&0x7fff;\r
641\r
642 ret = (u8) PicoRead8(addr68k);\r
643 //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r
644 goto end;\r
645 }\r
646\r
647 // should not be needed || dprintf("z80_read RAM");\r
648 if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
649\r
650end:\r
651 return ret;\r
652}\r
653\r
654unsigned short z80_read16(unsigned short a)\r
655{\r
656 //dprintf("z80_read16");\r
657\r
658 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
659}\r
660\r
661void z80_write(unsigned char data, unsigned short a)\r
662{\r
663 //if (a<0x4000)\r
664 // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
665\r
666 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
667 {\r
668 if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
669 return;\r
670 }\r
671\r
672 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
673 {\r
674 if(PicoOpt&2) SN76496Write(data);\r
675 return;\r
676 }\r
677\r
678 if ((a>>8)==0x60)\r
679 {\r
680 Pico.m.z80_bank68k>>=1;\r
681 Pico.m.z80_bank68k|=(data&1)<<8;\r
682 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
683 return;\r
684 }\r
685\r
686 if (a>=0x8000)\r
687 {\r
688 u32 addr68k;\r
689 addr68k=Pico.m.z80_bank68k<<15;\r
690 addr68k+=a&0x7fff;\r
691 PicoWrite8(addr68k, data);\r
692 //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r
693 return;\r
694 }\r
695\r
696 // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
697 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
698}\r
699\r
700void z80_write16(unsigned short data, unsigned short a)\r
701{\r
702 //dprintf("z80_write16");\r
703\r
704 z80_write((unsigned char) data,a);\r
705 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
706}\r
707\r