[picodrive.git] / Pico / cd / LC89510.c

/***********************************************************\r
 *                                                         *\r
 * This source file was taken from the Gens project        *\r
 * Written by Stéphane Dallongeville                       *\r
 * Copyright (c) 2002 by Stéphane Dallongeville            *\r
 * Modified/adapted for PicoDrive by notaz, 2007           *\r
 *                                                         *\r
 ***********************************************************/\r
\r
#include "../PicoInt.h"\r
\r
#define cdprintf(x...)\r
\r
\r
#define CDC_DMA_SPEED 256\r
\r
\r
static void CDD_Reset(void)\r
{\r
	// Reseting CDD\r
\r
	memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
	Pico_mcd->cdd.Status = 0;\r
	Pico_mcd->cdd.Minute = 0;\r
	Pico_mcd->cdd.Seconde = 0;\r
	Pico_mcd->cdd.Frame = 0;\r
	Pico_mcd->cdd.Ext = 0;\r
\r
	// clear receive status and transfer command\r
	memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
	Pico_mcd->s68k_regs[0x38+9] = 0xF;		// Default checksum\r
}\r
\r
\r
static void CDC_Reset(void)\r
{\r
	// Reseting CDC\r
\r
	memset(Pico_mcd->cdc.Buffer, 0, sizeof(Pico_mcd->cdc.Buffer));\r
\r
	Pico_mcd->cdc.COMIN = 0;\r
	Pico_mcd->cdc.IFSTAT = 0xFF;\r
	Pico_mcd->cdc.DAC.N = 0;\r
	Pico_mcd->cdc.DBC.N = 0;\r
	Pico_mcd->cdc.HEAD.N = 0x01000000;\r
	Pico_mcd->cdc.PT.N = 0;\r
	Pico_mcd->cdc.WA.N = 2352 * 2;\r
	Pico_mcd->cdc.STAT.N = 0x00000080;\r
	Pico_mcd->cdc.SBOUT = 0;\r
	Pico_mcd->cdc.IFCTRL = 0;\r
	Pico_mcd->cdc.CTRL.N = 0;\r
\r
	Pico_mcd->cdc.Decode_Reg_Read = 0;\r
	Pico_mcd->scd.Status_CDC &= ~0x08;\r
}\r
\r
\r
PICO_INTERNAL void LC89510_Reset(void)\r
{\r
	CDD_Reset();\r
	CDC_Reset();\r
\r
	// clear DMA_Adr & Stop_Watch\r
	memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
}\r
\r
\r
PICO_INTERNAL void Update_CDC_TRansfer(int which)\r
{\r
	unsigned int DMA_Adr, dep, length;\r
	unsigned short *dest;\r
	unsigned char  *src;\r
\r
	if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
	{\r
		length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
		Pico_mcd->scd.Status_CDC &= ~0x08;	// Last transfer\r
		Pico_mcd->s68k_regs[4] |=  0x80;	// End data transfer\r
		Pico_mcd->s68k_regs[4] &= ~0x40;	// no more data ready\r
		Pico_mcd->cdc.IFSTAT |= 0x08;		// No more data transfer in progress\r
\r
		if (Pico_mcd->cdc.IFCTRL & 0x40)	// DTEIEN = Data Trasnfer End Interrupt Enable ?\r
		{\r
			Pico_mcd->cdc.IFSTAT &= ~0x40;\r
\r
			if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
			{\r
				elprintf(EL_INTS, "cdc DTE irq 5");\r
				SekInterruptS68k(5);\r
			}\r
		}\r
	}\r
	else length = CDC_DMA_SPEED;\r
\r
\r
	// TODO: dst bounds checking?\r
	src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
	DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];\r
\r
	if (which == 7) // WORD RAM\r
	{\r
		if (Pico_mcd->s68k_regs[3] & 4)\r
		{\r
			// test: Final Fight\r
			int bank = !(Pico_mcd->s68k_regs[3]&1);\r
			dep = ((DMA_Adr & 0x3FFF) << 3);\r
			cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
					Pico_mcd->cdc.DAC.N, dep, length);\r
\r
			dest = (unsigned short *) (Pico_mcd->word_ram1M[bank] + dep);\r
\r
			memcpy16bswap(dest, src, length);\r
\r
			/*{ // debug\r
				unsigned char *b1 = Pico_mcd->word_ram1M[bank] + dep;\r
				unsigned char *b2 = (unsigned char *)(dest+length) - 8;\r
				dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
					b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);\r
			}*/\r
		}\r
		else\r
		{\r
			dep = ((DMA_Adr & 0x7FFF) << 3);\r
			cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
					Pico_mcd->cdc.DAC.N, dep, length);\r
			dest = (unsigned short *) (Pico_mcd->word_ram2M + dep);\r
\r
			memcpy16bswap(dest, src, length);\r
\r
			/*{ // debug\r
				unsigned char *b1 = Pico_mcd->word_ram2M + dep;\r
				unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
				dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
					b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
			}*/\r
		}\r
	}\r
	else if (which == 4) // PCM RAM (check: popful Mail)\r
	{\r
		dep = (DMA_Adr & 0x03FF) << 2;\r
		cdprintf("CD DMA # %04x -> PCM[%i] # %04x, len=%i",\r
			Pico_mcd->cdc.DAC.N, Pico_mcd->pcm.bank, dep, length);\r
		dest = (unsigned short *) (Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank] + dep);\r
\r
		if (Pico_mcd->cdc.DAC.N & 1) /* unaligned src? */\r
			memcpy(dest, src, length*2);\r
		else	memcpy16(dest, (unsigned short *) src, length);\r
	}\r
	else if (which == 5) // PRG RAM\r
	{\r
		dep = DMA_Adr << 3;\r
		dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
		cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
				Pico_mcd->cdc.DAC.N, dep, length);\r
\r
		memcpy16bswap(dest, src, length);\r
\r
		/*{ // debug\r
			unsigned char *b1 = Pico_mcd->prg_ram + dep;\r
			unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
			dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
				b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
		}*/\r
	}\r
\r
	length <<= 1;\r
	Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
	if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
	else Pico_mcd->cdc.DBC.N = 0;\r
\r
	// update DMA_Adr\r
	length >>= 2;\r
	if (which != 4) length >>= 1;\r
	DMA_Adr += length;\r
	Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;\r
	Pico_mcd->s68k_regs[0xB] = DMA_Adr;\r
}\r
\r
\r
PICO_INTERNAL_ASM unsigned short Read_CDC_Host(int is_sub)\r
{\r
	int addr;\r
\r
	if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
	{\r
		// Transfer data disabled\r
		cdprintf("Read_CDC_Host FIXME: Transfer data disabled");\r
		return 0;\r
	}\r
\r
	if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r
		(!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
	{\r
		// Wrong setting\r
		cdprintf("Read_CDC_Host FIXME: Wrong setting");\r
		return 0;\r
	}\r
\r
	Pico_mcd->cdc.DBC.N -= 2;\r
\r
	if (Pico_mcd->cdc.DBC.N <= 0)\r
	{\r
		Pico_mcd->cdc.DBC.N = 0;\r
		Pico_mcd->scd.Status_CDC &= ~0x08;		// Last transfer\r
		Pico_mcd->s68k_regs[4] |=  0x80;		// End data transfer\r
		Pico_mcd->s68k_regs[4] &= ~0x40;		// no more data ready\r
		Pico_mcd->cdc.IFSTAT |= 0x08;			// No more data transfer in progress\r
\r
		if (Pico_mcd->cdc.IFCTRL & 0x40)		// DTEIEN = Data Transfer End Interrupt Enable ?\r
		{\r
			Pico_mcd->cdc.IFSTAT &= ~0x40;\r
\r
			if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
				elprintf(EL_INTS, "m68k: s68k irq 5");\r
				SekInterruptS68k(5);\r
			}\r
\r
			cdprintf("CDC - DTE interrupt");\r
		}\r
	}\r
\r
	addr = Pico_mcd->cdc.DAC.N;\r
	Pico_mcd->cdc.DAC.N += 2;\r
\r
	cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
		(Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
\r
	return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
}\r
\r
\r
PICO_INTERNAL void CDC_Update_Header(void)\r
{\r
	if (Pico_mcd->cdc.CTRL.B.B1 & 0x01)		// Sub-Header wanted ?\r
	{\r
		Pico_mcd->cdc.HEAD.B.B0 = 0;\r
		Pico_mcd->cdc.HEAD.B.B1 = 0;\r
		Pico_mcd->cdc.HEAD.B.B2 = 0;\r
		Pico_mcd->cdc.HEAD.B.B3 = 0;\r
	}\r
	else\r
	{\r
		_msf MSF;\r
\r
		LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
\r
		Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
		Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
		Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
		Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
	}\r
}\r
\r
\r
PICO_INTERNAL unsigned char CDC_Read_Reg(void)\r
{\r
	unsigned char ret;\r
\r
	switch(Pico_mcd->s68k_regs[5] & 0xF)\r
	{\r
		case 0x0: // COMIN\r
			cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
\r
			Pico_mcd->s68k_regs[5] = 0x1;\r
			return Pico_mcd->cdc.COMIN;\r
\r
		case 0x1: // IFSTAT\r
			cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 1);		// Reg 1 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x2;\r
			return Pico_mcd->cdc.IFSTAT;\r
\r
		case 0x2: // DBCL\r
			cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
\r
			Pico_mcd->s68k_regs[5] = 0x3;\r
			return Pico_mcd->cdc.DBC.B.L;\r
\r
		case 0x3: // DBCH\r
			cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
\r
			Pico_mcd->s68k_regs[5] = 0x4;\r
			return Pico_mcd->cdc.DBC.B.H;\r
\r
		case 0x4: // HEAD0\r
			cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 4);		// Reg 4 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x5;\r
			return Pico_mcd->cdc.HEAD.B.B0;\r
\r
		case 0x5: // HEAD1\r
			cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 5);		// Reg 5 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x6;\r
			return Pico_mcd->cdc.HEAD.B.B1;\r
\r
		case 0x6: // HEAD2\r
			cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 6);		// Reg 6 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x7;\r
			return Pico_mcd->cdc.HEAD.B.B2;\r
\r
		case 0x7: // HEAD3\r
			cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 7);		// Reg 7 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x8;\r
			return Pico_mcd->cdc.HEAD.B.B3;\r
\r
		case 0x8: // PTL\r
			cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 8);		// Reg 8 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0x9;\r
			return Pico_mcd->cdc.PT.B.L;\r
\r
		case 0x9: // PTH\r
			cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 9);		// Reg 9 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0xA;\r
			return Pico_mcd->cdc.PT.B.H;\r
\r
		case 0xA: // WAL\r
			cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
\r
			Pico_mcd->s68k_regs[5] = 0xB;\r
			return Pico_mcd->cdc.WA.B.L;\r
\r
		case 0xB: // WAH\r
			cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
\r
			Pico_mcd->s68k_regs[5] = 0xC;\r
			return Pico_mcd->cdc.WA.B.H;\r
\r
		case 0xC: // STAT0\r
			cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 12);		// Reg 12 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0xD;\r
			return Pico_mcd->cdc.STAT.B.B0;\r
\r
		case 0xD: // STAT1\r
			cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 13);		// Reg 13 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0xE;\r
			return Pico_mcd->cdc.STAT.B.B1;\r
\r
		case 0xE: // STAT2\r
			cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
\r
			Pico_mcd->cdc.Decode_Reg_Read |= (1 << 14);		// Reg 14 (decoding)\r
			Pico_mcd->s68k_regs[5] = 0xF;\r
			return Pico_mcd->cdc.STAT.B.B2;\r
\r
		case 0xF: // STAT3\r
			cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
\r
			ret = Pico_mcd->cdc.STAT.B.B3;\r
			Pico_mcd->cdc.IFSTAT |= 0x20;			// decoding interrupt flag cleared\r
			if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
			{\r
				if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)\r
					Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
			}\r
			return ret;\r
	}\r
\r
	return 0;\r
}\r
\r
\r
PICO_INTERNAL void CDC_Write_Reg(unsigned char Data)\r
{\r
	cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
\r
	switch (Pico_mcd->s68k_regs[5] & 0xF)\r
	{\r
		case 0x0: // SBOUT\r
			Pico_mcd->s68k_regs[5] = 0x1;\r
			Pico_mcd->cdc.SBOUT = Data;\r
\r
			break;\r
\r
		case 0x1: // IFCTRL\r
			Pico_mcd->s68k_regs[5] = 0x2;\r
			Pico_mcd->cdc.IFCTRL = Data;\r
\r
			if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0)		// Stop data transfer\r
			{\r
				Pico_mcd->cdc.DBC.N = 0;\r
				Pico_mcd->scd.Status_CDC &= ~0x08;\r
				Pico_mcd->cdc.IFSTAT |= 0x08;		// No more data transfer in progress\r
			}\r
			break;\r
\r
		case 0x2: // DBCL\r
			Pico_mcd->s68k_regs[5] = 0x3;\r
			Pico_mcd->cdc.DBC.B.L = Data;\r
\r
			break;\r
\r
		case 0x3: // DBCH\r
			Pico_mcd->s68k_regs[5] = 0x4;\r
			Pico_mcd->cdc.DBC.B.H = Data;\r
\r
			break;\r
\r
		case 0x4: // DACL\r
			Pico_mcd->s68k_regs[5] = 0x5;\r
			Pico_mcd->cdc.DAC.B.L = Data;\r
\r
			break;\r
\r
		case 0x5: // DACH\r
			Pico_mcd->s68k_regs[5] = 0x6;\r
			Pico_mcd->cdc.DAC.B.H = Data;\r
\r
			break;\r
\r
		case 0x6: // DTTRG\r
			if (Pico_mcd->cdc.IFCTRL & 0x02)		// Data transfer enable ?\r
			{\r
				Pico_mcd->cdc.IFSTAT &= ~0x08;		// Data transfer in progress\r
				Pico_mcd->scd.Status_CDC |= 0x08;	// Data transfer in progress\r
				Pico_mcd->s68k_regs[4] &= 0x7F;		// A data transfer start\r
\r
				cdprintf("************** Starting Data Transfer ***********");\r
				cdprintf("RS0 = %.4X  DAC = %.4X  DBC = %.4X  DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
					Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
			}\r
			break;\r
\r
		case 0x7: // DTACK\r
			Pico_mcd->cdc.IFSTAT |= 0x40;			// end data transfer interrupt flag cleared\r
			break;\r
\r
		case 0x8: // WAL\r
			Pico_mcd->s68k_regs[5] = 0x9;\r
			Pico_mcd->cdc.WA.B.L = Data;\r
\r
			break;\r
\r
		case 0x9: // WAH\r
			Pico_mcd->s68k_regs[5] = 0xA;\r
			Pico_mcd->cdc.WA.B.H = Data;\r
\r
			break;\r
\r
		case 0xA: // CTRL0\r
			Pico_mcd->s68k_regs[5] = 0xB;\r
			Pico_mcd->cdc.CTRL.B.B0 = Data;\r
\r
			break;\r
\r
		case 0xB: // CTRL1\r
			Pico_mcd->s68k_regs[5] = 0xC;\r
			Pico_mcd->cdc.CTRL.B.B1 = Data;\r
\r
			break;\r
\r
		case 0xC: // PTL\r
			Pico_mcd->s68k_regs[5] = 0xD;\r
			Pico_mcd->cdc.PT.B.L = Data;\r
\r
			break;\r
\r
		case 0xD: // PTH\r
			Pico_mcd->s68k_regs[5] = 0xE;\r
			Pico_mcd->cdc.PT.B.H = Data;\r
\r
			break;\r
\r
		case 0xE: // CTRL2\r
			Pico_mcd->cdc.CTRL.B.B2 = Data;\r
			break;\r
\r
		case 0xF: // RESET\r
			CDC_Reset();\r
			break;\r
	}\r
}\r
\r
\r
static int bswapwrite(int a, unsigned short d)\r
{\r
	*(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r
	return d + (d >> 8);\r
}\r
\r
PICO_INTERNAL void CDD_Export_Status(void)\r
{\r
	unsigned int csum;\r
\r
	csum  = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
	csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
	csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
	csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
	Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
	csum += Pico_mcd->cdd.Ext;\r
	Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
\r
	Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
\r
	if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
	{\r
		elprintf(EL_INTS, "cdd export irq 4");\r
		SekInterruptS68k(4);\r
	}\r
\r
//	cdprintf("CDD exported status\n");\r
	cdprintf("out:  Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
		(Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
		(Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
		(Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
		(Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r
		(Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r
}\r
\r
\r
PICO_INTERNAL void CDD_Import_Command(void)\r
{\r
//	cdprintf("CDD importing command\n");\r
	cdprintf("in:  Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
		(Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
		(Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
		(Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
		(Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r
		(Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r
\r
	switch (Pico_mcd->s68k_regs[0x38+10+0])\r
	{\r
		case 0x0:	// STATUS (?)\r
			Get_Status_CDD_c0();\r
			break;\r
\r
		case 0x1:	// STOP ALL (?)\r
			Stop_CDD_c1();\r
			break;\r
\r
		case 0x2:	// GET TOC INFORMATIONS\r
			switch(Pico_mcd->s68k_regs[0x38+10+3])\r
			{\r
				case 0x0:	// get current position (MSF format)\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
					Get_Pos_CDD_c20();\r
					break;\r
\r
				case 0x1:	// get elapsed time of current track played/scanned (relative MSF format)\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r
					Get_Track_Pos_CDD_c21();\r
					break;\r
\r
				case 0x2:	// get current track in RS2-RS3\r
					Pico_mcd->cdd.Status =  (Pico_mcd->cdd.Status & 0xFF00) | 2;\r
					Get_Current_Track_CDD_c22();\r
					break;\r
\r
				case 0x3:	// get total length (MSF format)\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r
					Get_Total_Lenght_CDD_c23();\r
					break;\r
\r
				case 0x4:	// first & last track number\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r
					Get_First_Last_Track_CDD_c24();\r
					break;\r
\r
				case 0x5:	// get track addresse (MSF format)\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r
					Get_Track_Adr_CDD_c25();\r
					break;\r
\r
				default :	// invalid, then we return status\r
					Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r
					Get_Status_CDD_c0();\r
					break;\r
			}\r
			break;\r
\r
		case 0x3:	// READ\r
			Play_CDD_c3();\r
			break;\r
\r
		case 0x4:	// SEEK\r
			Seek_CDD_c4();\r
			break;\r
\r
		case 0x6:	// PAUSE/STOP\r
			Pause_CDD_c6();\r
			break;\r
\r
		case 0x7:	// RESUME\r
			Resume_CDD_c7();\r
			break;\r
\r
		case 0x8:	// FAST FOWARD\r
			Fast_Foward_CDD_c8();\r
			break;\r
\r
		case 0x9:	// FAST REWIND\r
			Fast_Rewind_CDD_c9();\r
			break;\r
\r
		case 0xA:	// RECOVER INITIAL STATE (?)\r
			CDD_cA();\r
			break;\r
\r
		case 0xC:	// CLOSE TRAY\r
			Close_Tray_CDD_cC();\r
			break;\r
\r
		case 0xD:	// OPEN TRAY\r
			Open_Tray_CDD_cD();\r
			break;\r
\r
		default:	// UNKNOWN\r
			CDD_Def();\r
			break;\r
	}\r
}\r
\r
Commit	Line	Data
bf098bc5	1	/***********************************************************\r
bf098bc5	2	* *\r
8b99ab90	3	* This source file was taken from the Gens project *\r
bf098bc5	4	* Written by Stéphane Dallongeville *\r
bf098bc5	5	* Copyright (c) 2002 by Stéphane Dallongeville *\r
6cadc2da	6	* Modified/adapted for PicoDrive by notaz, 2007 *\r
bf098bc5	7	* *\r
bf098bc5	8	***********************************************************/\r
cc68a136	9	\r
	10	#include "../PicoInt.h"\r
	11	\r
ca61ee42	12	#define cdprintf(x...)\r
cc68a136	13	\r
	14	\r
	15	#define CDC_DMA_SPEED 256\r
	16	\r
cc68a136	17	\r
	18	static void CDD_Reset(void)\r
	19	{\r
	20	// Reseting CDD\r
	21	\r
	22	memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
	23	Pico_mcd->cdd.Status = 0;\r
	24	Pico_mcd->cdd.Minute = 0;\r
	25	Pico_mcd->cdd.Seconde = 0;\r
	26	Pico_mcd->cdd.Frame = 0;\r
	27	Pico_mcd->cdd.Ext = 0;\r
	28	\r
	29	// clear receive status and transfer command\r
	30	memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
	31	Pico_mcd->s68k_regs[0x38+9] = 0xF; // Default checksum\r
	32	}\r
	33	\r
	34	\r
	35	static void CDC_Reset(void)\r
	36	{\r
	37	// Reseting CDC\r
	38	\r
5c69a605	39	memset(Pico_mcd->cdc.Buffer, 0, sizeof(Pico_mcd->cdc.Buffer));\r
cc68a136	40	\r
	41	Pico_mcd->cdc.COMIN = 0;\r
	42	Pico_mcd->cdc.IFSTAT = 0xFF;\r
	43	Pico_mcd->cdc.DAC.N = 0;\r
	44	Pico_mcd->cdc.DBC.N = 0;\r
	45	Pico_mcd->cdc.HEAD.N = 0x01000000;\r
	46	Pico_mcd->cdc.PT.N = 0;\r
	47	Pico_mcd->cdc.WA.N = 2352 * 2;\r
	48	Pico_mcd->cdc.STAT.N = 0x00000080;\r
	49	Pico_mcd->cdc.SBOUT = 0;\r
	50	Pico_mcd->cdc.IFCTRL = 0;\r
	51	Pico_mcd->cdc.CTRL.N = 0;\r
	52	\r
75736070	53	Pico_mcd->cdc.Decode_Reg_Read = 0;\r
c459aefd	54	Pico_mcd->scd.Status_CDC &= ~0x08;\r
cc68a136	55	}\r
	56	\r
	57	\r
eff55556	58	PICO_INTERNAL void LC89510_Reset(void)\r
cc68a136	59	{\r
	60	CDD_Reset();\r
	61	CDC_Reset();\r
	62	\r
cb4a513a	63	// clear DMA_Adr & Stop_Watch\r
cb4a513a	64	memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
cc68a136	65	}\r
cc68a136	66	\r
cc68a136	67	\r
eff55556	68	PICO_INTERNAL void Update_CDC_TRansfer(int which)\r
bf098bc5	69	{\r
0a051f55	70	unsigned int DMA_Adr, dep, length;\r
bf098bc5	71	unsigned short *dest;\r
bf098bc5	72	unsigned char *src;\r
cc68a136	73	\r
	74	if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
	75	{\r
bf098bc5	76	length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
c459aefd	77	Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
bf098bc5	78	Pico_mcd->s68k_regs[4] \|= 0x80; // End data transfer\r
	79	Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
	80	Pico_mcd->cdc.IFSTAT \|= 0x08; // No more data transfer in progress\r
cc68a136	81	\r
bf098bc5	82	if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Trasnfer End Interrupt Enable ?\r
cc68a136	83	{\r
	84	Pico_mcd->cdc.IFSTAT &= ~0x40;\r
	85	\r
bf098bc5	86	if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
bf098bc5	87	{\r
ca61ee42	88	elprintf(EL_INTS, "cdc DTE irq 5");\r
bf098bc5	89	SekInterruptS68k(5);\r
bf098bc5	90	}\r
cc68a136	91	}\r
cc68a136	92	}\r
bf098bc5	93	else length = CDC_DMA_SPEED;\r
bf098bc5	94	\r
cc68a136	95	\r
0a051f55	96	// TODO: dst bounds checking?\r
bf098bc5	97	src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
cb4a513a	98	DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) \| Pico_mcd->s68k_regs[0xB];\r
cc68a136	99	\r
bf098bc5	100	if (which == 7) // WORD RAM\r
cc68a136	101	{\r
bf098bc5	102	if (Pico_mcd->s68k_regs[3] & 4)\r
cc68a136	103	{\r
fa1e5e29	104	// test: Final Fight\r
fa1e5e29	105	int bank = !(Pico_mcd->s68k_regs[3]&1);\r
cb4a513a	106	dep = ((DMA_Adr & 0x3FFF) << 3);\r
bf098bc5	107	cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
	108	Pico_mcd->cdc.DAC.N, dep, length);\r
	109	\r
fa1e5e29	110	dest = (unsigned short *) (Pico_mcd->word_ram1M[bank] + dep);\r
bf098bc5	111	\r
0a051f55	112	memcpy16bswap(dest, src, length);\r
1cd356a3	113	\r
721cd396	114	/*{ // debug\r
fa1e5e29	115	unsigned char *b1 = Pico_mcd->word_ram1M[bank] + dep;\r
0a051f55	116	unsigned char b2 = (unsigned char )(dest+length) - 8;\r
1cd356a3	117	dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
1cd356a3	118	b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);\r
721cd396	119	}*/\r
cc68a136	120	}\r
bf098bc5	121	else\r
bf098bc5	122	{\r
cb4a513a	123	dep = ((DMA_Adr & 0x7FFF) << 3);\r
bf098bc5	124	cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
bf098bc5	125	Pico_mcd->cdc.DAC.N, dep, length);\r
fa1e5e29	126	dest = (unsigned short *) (Pico_mcd->word_ram2M + dep);\r
cc68a136	127	\r
0a051f55	128	memcpy16bswap(dest, src, length);\r
1cd356a3	129	\r
721cd396	130	/*{ // debug\r
fa1e5e29	131	unsigned char *b1 = Pico_mcd->word_ram2M + dep;\r
0a051f55	132	unsigned char b2 = (unsigned char )(dest+length) - 4;\r
1cd356a3	133	dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
1cd356a3	134	b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
721cd396	135	}*/\r
bf098bc5	136	}\r
cc68a136	137	}\r
0a051f55	138	else if (which == 4) // PCM RAM (check: popful Mail)\r
cc68a136	139	{\r
0a051f55	140	dep = (DMA_Adr & 0x03FF) << 2;\r
ca61ee42	141	cdprintf("CD DMA # %04x -> PCM[%i] # %04x, len=%i",\r
0a051f55	142	Pico_mcd->cdc.DAC.N, Pico_mcd->pcm.bank, dep, length);\r
	143	dest = (unsigned short *) (Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank] + dep);\r
	144	\r
	145	if (Pico_mcd->cdc.DAC.N & 1) /* unaligned src? */\r
	146	memcpy(dest, src, length*2);\r
	147	else memcpy16(dest, (unsigned short *) src, length);\r
bf098bc5	148	}\r
	149	else if (which == 5) // PRG RAM\r
	150	{\r
cb4a513a	151	dep = DMA_Adr << 3;\r
bf098bc5	152	dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
	153	cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
	154	Pico_mcd->cdc.DAC.N, dep, length);\r
cc68a136	155	\r
0a051f55	156	memcpy16bswap(dest, src, length);\r
1cd356a3	157	\r
721cd396	158	/*{ // debug\r
1cd356a3	159	unsigned char *b1 = Pico_mcd->prg_ram + dep;\r
0a051f55	160	unsigned char b2 = (unsigned char )(dest+length) - 4;\r
1cd356a3	161	dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
1cd356a3	162	b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
721cd396	163	}*/\r
cc68a136	164	}\r
cc68a136	165	\r
bf098bc5	166	length <<= 1;\r
bf098bc5	167	Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
c459aefd	168	if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
cc68a136	169	else Pico_mcd->cdc.DBC.N = 0;\r
1cd356a3	170	\r
	171	// update DMA_Adr\r
	172	length >>= 2;\r
	173	if (which != 4) length >>= 1;\r
	174	DMA_Adr += length;\r
	175	Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;\r
	176	Pico_mcd->s68k_regs[0xB] = DMA_Adr;\r
cc68a136	177	}\r
cc68a136	178	\r
cc68a136	179	\r
eff55556	180	PICO_INTERNAL_ASM unsigned short Read_CDC_Host(int is_sub)\r
cc68a136	181	{\r
	182	int addr;\r
	183	\r
c459aefd	184	if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
cc68a136	185	{\r
cc68a136	186	// Transfer data disabled\r
fa1e5e29	187	cdprintf("Read_CDC_Host FIXME: Transfer data disabled");\r
cc68a136	188	return 0;\r
	189	}\r
	190	\r
	191	if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) \|\|\r
	192	(!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
	193	{\r
	194	// Wrong setting\r
fa1e5e29	195	cdprintf("Read_CDC_Host FIXME: Wrong setting");\r
cc68a136	196	return 0;\r
	197	}\r
	198	\r
	199	Pico_mcd->cdc.DBC.N -= 2;\r
	200	\r
	201	if (Pico_mcd->cdc.DBC.N <= 0)\r
	202	{\r
	203	Pico_mcd->cdc.DBC.N = 0;\r
c459aefd	204	Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
cc68a136	205	Pico_mcd->s68k_regs[4] \|= 0x80; // End data transfer\r
	206	Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
	207	Pico_mcd->cdc.IFSTAT \|= 0x08; // No more data transfer in progress\r
	208	\r
	209	if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Transfer End Interrupt Enable ?\r
	210	{\r
	211	Pico_mcd->cdc.IFSTAT &= ~0x40;\r
	212	\r
	213	if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
ca61ee42	214	elprintf(EL_INTS, "m68k: s68k irq 5");\r
cc68a136	215	SekInterruptS68k(5);\r
	216	}\r
	217	\r
c459aefd	218	cdprintf("CDC - DTE interrupt");\r
cc68a136	219	}\r
	220	}\r
	221	\r
	222	addr = Pico_mcd->cdc.DAC.N;\r
	223	Pico_mcd->cdc.DAC.N += 2;\r
c459aefd	224	\r
	225	cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
	226	(Pico_mcd->cdc.Buffer[addr]<<8) \| Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
	227	\r
cc68a136	228	return (Pico_mcd->cdc.Buffer[addr]<<8) \| Pico_mcd->cdc.Buffer[addr+1];\r
cc68a136	229	}\r
	230	\r
	231	\r
eff55556	232	PICO_INTERNAL void CDC_Update_Header(void)\r
cc68a136	233	{\r
	234	if (Pico_mcd->cdc.CTRL.B.B1 & 0x01) // Sub-Header wanted ?\r
	235	{\r
	236	Pico_mcd->cdc.HEAD.B.B0 = 0;\r
	237	Pico_mcd->cdc.HEAD.B.B1 = 0;\r
	238	Pico_mcd->cdc.HEAD.B.B2 = 0;\r
	239	Pico_mcd->cdc.HEAD.B.B3 = 0;\r
	240	}\r
	241	else\r
	242	{\r
	243	_msf MSF;\r
	244	\r
	245	LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
	246	\r
	247	Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
	248	Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
	249	Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
	250	Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
	251	}\r
	252	}\r
	253	\r
	254	\r
eff55556	255	PICO_INTERNAL unsigned char CDC_Read_Reg(void)\r
cc68a136	256	{\r
	257	unsigned char ret;\r
	258	\r
cc68a136	259	switch(Pico_mcd->s68k_regs[5] & 0xF)\r
	260	{\r
	261	case 0x0: // COMIN\r
c459aefd	262	cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
cc68a136	263	\r
	264	Pico_mcd->s68k_regs[5] = 0x1;\r
	265	return Pico_mcd->cdc.COMIN;\r
	266	\r
	267	case 0x1: // IFSTAT\r
c459aefd	268	cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
cc68a136	269	\r
75736070	270	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 1); // Reg 1 (decoding)\r
cc68a136	271	Pico_mcd->s68k_regs[5] = 0x2;\r
	272	return Pico_mcd->cdc.IFSTAT;\r
	273	\r
	274	case 0x2: // DBCL\r
c459aefd	275	cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
cc68a136	276	\r
	277	Pico_mcd->s68k_regs[5] = 0x3;\r
	278	return Pico_mcd->cdc.DBC.B.L;\r
	279	\r
	280	case 0x3: // DBCH\r
c459aefd	281	cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
cc68a136	282	\r
	283	Pico_mcd->s68k_regs[5] = 0x4;\r
	284	return Pico_mcd->cdc.DBC.B.H;\r
	285	\r
	286	case 0x4: // HEAD0\r
c459aefd	287	cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
cc68a136	288	\r
75736070	289	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 4); // Reg 4 (decoding)\r
cc68a136	290	Pico_mcd->s68k_regs[5] = 0x5;\r
	291	return Pico_mcd->cdc.HEAD.B.B0;\r
	292	\r
	293	case 0x5: // HEAD1\r
c459aefd	294	cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
cc68a136	295	\r
75736070	296	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 5); // Reg 5 (decoding)\r
cc68a136	297	Pico_mcd->s68k_regs[5] = 0x6;\r
	298	return Pico_mcd->cdc.HEAD.B.B1;\r
	299	\r
	300	case 0x6: // HEAD2\r
c459aefd	301	cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
cc68a136	302	\r
75736070	303	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 6); // Reg 6 (decoding)\r
cc68a136	304	Pico_mcd->s68k_regs[5] = 0x7;\r
	305	return Pico_mcd->cdc.HEAD.B.B2;\r
	306	\r
	307	case 0x7: // HEAD3\r
c459aefd	308	cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
cc68a136	309	\r
75736070	310	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 7); // Reg 7 (decoding)\r
cc68a136	311	Pico_mcd->s68k_regs[5] = 0x8;\r
	312	return Pico_mcd->cdc.HEAD.B.B3;\r
	313	\r
	314	case 0x8: // PTL\r
c459aefd	315	cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
cc68a136	316	\r
75736070	317	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 8); // Reg 8 (decoding)\r
cc68a136	318	Pico_mcd->s68k_regs[5] = 0x9;\r
	319	return Pico_mcd->cdc.PT.B.L;\r
	320	\r
	321	case 0x9: // PTH\r
c459aefd	322	cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
cc68a136	323	\r
75736070	324	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 9); // Reg 9 (decoding)\r
cc68a136	325	Pico_mcd->s68k_regs[5] = 0xA;\r
	326	return Pico_mcd->cdc.PT.B.H;\r
	327	\r
	328	case 0xA: // WAL\r
c459aefd	329	cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
cc68a136	330	\r
	331	Pico_mcd->s68k_regs[5] = 0xB;\r
	332	return Pico_mcd->cdc.WA.B.L;\r
	333	\r
	334	case 0xB: // WAH\r
c459aefd	335	cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
cc68a136	336	\r
	337	Pico_mcd->s68k_regs[5] = 0xC;\r
	338	return Pico_mcd->cdc.WA.B.H;\r
	339	\r
	340	case 0xC: // STAT0\r
c459aefd	341	cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
cc68a136	342	\r
75736070	343	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 12); // Reg 12 (decoding)\r
cc68a136	344	Pico_mcd->s68k_regs[5] = 0xD;\r
	345	return Pico_mcd->cdc.STAT.B.B0;\r
	346	\r
	347	case 0xD: // STAT1\r
c459aefd	348	cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
cc68a136	349	\r
75736070	350	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 13); // Reg 13 (decoding)\r
cc68a136	351	Pico_mcd->s68k_regs[5] = 0xE;\r
	352	return Pico_mcd->cdc.STAT.B.B1;\r
	353	\r
	354	case 0xE: // STAT2\r
c459aefd	355	cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
cc68a136	356	\r
75736070	357	Pico_mcd->cdc.Decode_Reg_Read \|= (1 << 14); // Reg 14 (decoding)\r
cc68a136	358	Pico_mcd->s68k_regs[5] = 0xF;\r
	359	return Pico_mcd->cdc.STAT.B.B2;\r
	360	\r
	361	case 0xF: // STAT3\r
c459aefd	362	cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
cc68a136	363	\r
	364	ret = Pico_mcd->cdc.STAT.B.B3;\r
	365	Pico_mcd->cdc.IFSTAT \|= 0x20; // decoding interrupt flag cleared\r
	366	if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
	367	{\r
75736070	368	if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)\r
cc68a136	369	Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
	370	}\r
	371	return ret;\r
	372	}\r
	373	\r
	374	return 0;\r
	375	}\r
	376	\r
	377	\r
eff55556	378	PICO_INTERNAL void CDC_Write_Reg(unsigned char Data)\r
cc68a136	379	{\r
c459aefd	380	cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
cc68a136	381	\r
	382	switch (Pico_mcd->s68k_regs[5] & 0xF)\r
	383	{\r
	384	case 0x0: // SBOUT\r
	385	Pico_mcd->s68k_regs[5] = 0x1;\r
	386	Pico_mcd->cdc.SBOUT = Data;\r
	387	\r
	388	break;\r
	389	\r
	390	case 0x1: // IFCTRL\r
	391	Pico_mcd->s68k_regs[5] = 0x2;\r
	392	Pico_mcd->cdc.IFCTRL = Data;\r
	393	\r
	394	if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r
	395	{\r
	396	Pico_mcd->cdc.DBC.N = 0;\r
c459aefd	397	Pico_mcd->scd.Status_CDC &= ~0x08;\r
cc68a136	398	Pico_mcd->cdc.IFSTAT \|= 0x08; // No more data transfer in progress\r
	399	}\r
	400	break;\r
	401	\r
	402	case 0x2: // DBCL\r
	403	Pico_mcd->s68k_regs[5] = 0x3;\r
	404	Pico_mcd->cdc.DBC.B.L = Data;\r
	405	\r
	406	break;\r
	407	\r
	408	case 0x3: // DBCH\r
	409	Pico_mcd->s68k_regs[5] = 0x4;\r
	410	Pico_mcd->cdc.DBC.B.H = Data;\r
	411	\r
	412	break;\r
	413	\r
	414	case 0x4: // DACL\r
	415	Pico_mcd->s68k_regs[5] = 0x5;\r
	416	Pico_mcd->cdc.DAC.B.L = Data;\r
	417	\r
	418	break;\r
	419	\r
	420	case 0x5: // DACH\r
	421	Pico_mcd->s68k_regs[5] = 0x6;\r
	422	Pico_mcd->cdc.DAC.B.H = Data;\r
	423	\r
	424	break;\r
	425	\r
	426	case 0x6: // DTTRG\r
	427	if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r
	428	{\r
	429	Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r
c459aefd	430	Pico_mcd->scd.Status_CDC \|= 0x08; // Data transfer in progress\r
cc68a136	431	Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r
cc68a136	432	\r
c459aefd	433	cdprintf("************ Starting Data Transfer *********");\r
cc68a136	434	cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
cb4a513a	435	Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) \| Pico_mcd->s68k_regs[0xB]);\r
cc68a136	436	}\r
	437	break;\r
	438	\r
	439	case 0x7: // DTACK\r
	440	Pico_mcd->cdc.IFSTAT \|= 0x40; // end data transfer interrupt flag cleared\r
	441	break;\r
	442	\r
	443	case 0x8: // WAL\r
	444	Pico_mcd->s68k_regs[5] = 0x9;\r
	445	Pico_mcd->cdc.WA.B.L = Data;\r
	446	\r
	447	break;\r
	448	\r
	449	case 0x9: // WAH\r
	450	Pico_mcd->s68k_regs[5] = 0xA;\r
	451	Pico_mcd->cdc.WA.B.H = Data;\r
	452	\r
	453	break;\r
	454	\r
	455	case 0xA: // CTRL0\r
	456	Pico_mcd->s68k_regs[5] = 0xB;\r
	457	Pico_mcd->cdc.CTRL.B.B0 = Data;\r
	458	\r
	459	break;\r
	460	\r
	461	case 0xB: // CTRL1\r
	462	Pico_mcd->s68k_regs[5] = 0xC;\r
	463	Pico_mcd->cdc.CTRL.B.B1 = Data;\r
	464	\r
	465	break;\r
	466	\r
	467	case 0xC: // PTL\r
	468	Pico_mcd->s68k_regs[5] = 0xD;\r
	469	Pico_mcd->cdc.PT.B.L = Data;\r
	470	\r
	471	break;\r
	472	\r
	473	case 0xD: // PTH\r
	474	Pico_mcd->s68k_regs[5] = 0xE;\r
	475	Pico_mcd->cdc.PT.B.H = Data;\r
	476	\r
	477	break;\r
	478	\r
	479	case 0xE: // CTRL2\r
	480	Pico_mcd->cdc.CTRL.B.B2 = Data;\r
	481	break;\r
	482	\r
	483	case 0xF: // RESET\r
	484	CDC_Reset();\r
	485	break;\r
	486	}\r
	487	}\r
	488	\r
	489	\r
	490	static int bswapwrite(int a, unsigned short d)\r
	491	{\r
	492	(unsigned short )(Pico_mcd->s68k_regs + a) = (d>>8)\|(d<<8);\r
	493	return d + (d >> 8);\r
	494	}\r
	495	\r
eff55556	496	PICO_INTERNAL void CDD_Export_Status(void)\r
cc68a136	497	{\r
	498	unsigned int csum;\r
	499	\r
	500	csum = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
	501	csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
	502	csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
	503	csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
	504	Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
	505	csum += Pico_mcd->cdd.Ext;\r
	506	Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
	507	\r
672ad671	508	Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
cc68a136	509	\r
	510	if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
	511	{\r
ca61ee42	512	elprintf(EL_INTS, "cdd export irq 4");\r
cc68a136	513	SekInterruptS68k(4);\r
	514	}\r
	515	\r
c459aefd	516	// cdprintf("CDD exported status\n");\r
c459aefd	517	cdprintf("out: Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
cc68a136	518	(Pico_mcd->s68k_regs[0x38+0] << 8) \| Pico_mcd->s68k_regs[0x38+1],\r
	519	(Pico_mcd->s68k_regs[0x38+2] << 8) \| Pico_mcd->s68k_regs[0x38+3],\r
	520	(Pico_mcd->s68k_regs[0x38+4] << 8) \| Pico_mcd->s68k_regs[0x38+5],\r
	521	(Pico_mcd->s68k_regs[0x38+6] << 8) \| Pico_mcd->s68k_regs[0x38+7],\r
	522	(Pico_mcd->s68k_regs[0x38+8] << 8) \| Pico_mcd->s68k_regs[0x38+9]);\r
	523	}\r
	524	\r
	525	\r
eff55556	526	PICO_INTERNAL void CDD_Import_Command(void)\r
cc68a136	527	{\r
c459aefd	528	// cdprintf("CDD importing command\n");\r
c459aefd	529	cdprintf("in: Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
cc68a136	530	(Pico_mcd->s68k_regs[0x38+10+0] << 8) \| Pico_mcd->s68k_regs[0x38+10+1],\r
	531	(Pico_mcd->s68k_regs[0x38+10+2] << 8) \| Pico_mcd->s68k_regs[0x38+10+3],\r
	532	(Pico_mcd->s68k_regs[0x38+10+4] << 8) \| Pico_mcd->s68k_regs[0x38+10+5],\r
	533	(Pico_mcd->s68k_regs[0x38+10+6] << 8) \| Pico_mcd->s68k_regs[0x38+10+7],\r
	534	(Pico_mcd->s68k_regs[0x38+10+8] << 8) \| Pico_mcd->s68k_regs[0x38+10+9]);\r
	535	\r
	536	switch (Pico_mcd->s68k_regs[0x38+10+0])\r
	537	{\r
	538	case 0x0: // STATUS (?)\r
	539	Get_Status_CDD_c0();\r
	540	break;\r
	541	\r
	542	case 0x1: // STOP ALL (?)\r
	543	Stop_CDD_c1();\r
	544	break;\r
	545	\r
	546	case 0x2: // GET TOC INFORMATIONS\r
	547	switch(Pico_mcd->s68k_regs[0x38+10+3])\r
	548	{\r
	549	case 0x0: // get current position (MSF format)\r
	550	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
	551	Get_Pos_CDD_c20();\r
	552	break;\r
	553	\r
	554	case 0x1: // get elapsed time of current track played/scanned (relative MSF format)\r
	555	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 1;\r
	556	Get_Track_Pos_CDD_c21();\r
	557	break;\r
	558	\r
	559	case 0x2: // get current track in RS2-RS3\r
	560	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 2;\r
	561	Get_Current_Track_CDD_c22();\r
	562	break;\r
	563	\r
bf098bc5	564	case 0x3: // get total length (MSF format)\r
cc68a136	565	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 3;\r
	566	Get_Total_Lenght_CDD_c23();\r
	567	break;\r
	568	\r
	569	case 0x4: // first & last track number\r
	570	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 4;\r
	571	Get_First_Last_Track_CDD_c24();\r
	572	break;\r
	573	\r
	574	case 0x5: // get track addresse (MSF format)\r
	575	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 5;\r
	576	Get_Track_Adr_CDD_c25();\r
	577	break;\r
	578	\r
	579	default : // invalid, then we return status\r
	580	Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) \| 0xF;\r
	581	Get_Status_CDD_c0();\r
	582	break;\r
	583	}\r
	584	break;\r
	585	\r
	586	case 0x3: // READ\r
	587	Play_CDD_c3();\r
	588	break;\r
	589	\r
	590	case 0x4: // SEEK\r
	591	Seek_CDD_c4();\r
	592	break;\r
	593	\r
	594	case 0x6: // PAUSE/STOP\r
	595	Pause_CDD_c6();\r
	596	break;\r
	597	\r
	598	case 0x7: // RESUME\r
	599	Resume_CDD_c7();\r
	600	break;\r
	601	\r
	602	case 0x8: // FAST FOWARD\r
	603	Fast_Foward_CDD_c8();\r
	604	break;\r
	605	\r
	606	case 0x9: // FAST REWIND\r
	607	Fast_Rewind_CDD_c9();\r
	608	break;\r
	609	\r
	610	case 0xA: // RECOVER INITIAL STATE (?)\r
	611	CDD_cA();\r
	612	break;\r
	613	\r
	614	case 0xC: // CLOSE TRAY\r
	615	Close_Tray_CDD_cC();\r
	616	break;\r
	617	\r
	618	case 0xD: // OPEN TRAY\r
	619	Open_Tray_CDD_cD();\r
	620	break;\r
	621	\r
	622	default: // UNKNOWN\r
	623	CDD_Def();\r
	624	break;\r
	625	}\r
	626	}\r
	627	\r