cc68a136 |
1 | // This is part of Pico Library\r |
2 | \r |
3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
b837b69b |
4 | // (c) Copyright 2007 notaz, All rights reserved.\r |
cc68a136 |
5 | // Free for non-commercial use.\r |
6 | \r |
7 | // For commercial use, separate licencing terms must be obtained.\r |
8 | \r |
9 | // A68K no longer supported here\r |
10 | \r |
11 | //#define __debug_io\r |
12 | \r |
13 | #include "../PicoInt.h"\r |
14 | \r |
15 | #include "../sound/sound.h"\r |
16 | #include "../sound/ym2612.h"\r |
17 | #include "../sound/sn76496.h"\r |
18 | \r |
cb4a513a |
19 | #include "gfx_cd.h"\r |
4f265db7 |
20 | #include "pcm.h"\r |
cb4a513a |
21 | \r |
cc68a136 |
22 | typedef unsigned char u8;\r |
23 | typedef unsigned short u16;\r |
24 | typedef unsigned int u32;\r |
25 | \r |
26 | //#define __debug_io\r |
27 | //#define __debug_io2\r |
d1df8786 |
28 | //#define rdprintf dprintf\r |
29 | #define rdprintf(...)\r |
cc68a136 |
30 | \r |
31 | // -----------------------------------------------------------------\r |
32 | \r |
cc68a136 |
33 | \r |
cb4a513a |
34 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
35 | {\r |
36 | u32 d=0;\r |
37 | a &= 0x3e;\r |
672ad671 |
38 | // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r |
cc68a136 |
39 | \r |
40 | switch (a) {\r |
672ad671 |
41 | case 0:\r |
c459aefd |
42 | d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r |
672ad671 |
43 | goto end;\r |
cc68a136 |
44 | case 2:\r |
672ad671 |
45 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
bf098bc5 |
46 | dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
cc68a136 |
47 | goto end;\r |
c459aefd |
48 | case 4:\r |
49 | d = Pico_mcd->s68k_regs[4]<<8;\r |
50 | goto end;\r |
51 | case 6:\r |
52 | d = Pico_mcd->m.hint_vector;\r |
53 | goto end;\r |
cc68a136 |
54 | case 8:\r |
cc68a136 |
55 | d = Read_CDC_Host(0);\r |
56 | goto end;\r |
c459aefd |
57 | case 0xA:\r |
58 | dprintf("m68k reserved read");\r |
59 | goto end;\r |
cc68a136 |
60 | case 0xC:\r |
d1df8786 |
61 | dprintf("m68k stopwatch timer read");\r |
cc68a136 |
62 | break;\r |
63 | }\r |
64 | \r |
cc68a136 |
65 | if (a < 0x30) {\r |
66 | // comm flag/cmd/status (0xE-0x2F)\r |
67 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
68 | goto end;\r |
69 | }\r |
70 | \r |
71 | dprintf("m68k_regs invalid read @ %02x", a);\r |
72 | \r |
73 | end:\r |
74 | \r |
672ad671 |
75 | // dprintf("ret = %04x", d);\r |
cc68a136 |
76 | return d;\r |
77 | }\r |
78 | \r |
cb4a513a |
79 | static void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
80 | {\r |
81 | a &= 0x3f;\r |
672ad671 |
82 | // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r |
cc68a136 |
83 | \r |
84 | switch (a) {\r |
85 | case 0:\r |
672ad671 |
86 | d &= 1;\r |
cc68a136 |
87 | if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r |
c459aefd |
88 | return;\r |
cc68a136 |
89 | case 1:\r |
672ad671 |
90 | d &= 3;\r |
51a902ae |
91 | if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r |
c459aefd |
92 | if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r |
93 | if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r |
51a902ae |
94 | if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r |
cc68a136 |
95 | SekResetS68k(); // S68k comes out of RESET or BRQ state\r |
51a902ae |
96 | Pico_mcd->m.state_flags&=~1;\r |
672ad671 |
97 | dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r |
cc68a136 |
98 | }\r |
c459aefd |
99 | Pico_mcd->m.busreq = d;\r |
100 | return;\r |
672ad671 |
101 | case 2:\r |
102 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
103 | return;\r |
cc68a136 |
104 | case 3:\r |
bf098bc5 |
105 | dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
672ad671 |
106 | d &= 0xc2;\r |
107 | if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r |
108 | dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
109 | //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r |
110 | //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r |
111 | // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r |
112 | d |= Pico_mcd->s68k_regs[3]&0x1d;\r |
d0d47c5b |
113 | if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r |
672ad671 |
114 | Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r |
115 | return;\r |
c459aefd |
116 | case 6:\r |
117 | *((char *)&Pico_mcd->m.hint_vector+1) = d;\r |
d1df8786 |
118 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
119 | return;\r |
120 | case 7:\r |
121 | *(char *)&Pico_mcd->m.hint_vector = d;\r |
d1df8786 |
122 | Pico_mcd->bios[0x72] = d;\r |
c459aefd |
123 | return;\r |
cc68a136 |
124 | case 0xe:\r |
672ad671 |
125 | //dprintf("m68k: comm flag: %02x", d);\r |
cc68a136 |
126 | \r |
672ad671 |
127 | //dprintf("s68k @ %06x", SekPcS68k);\r |
cc68a136 |
128 | \r |
129 | Pico_mcd->s68k_regs[0xe] = d;\r |
c459aefd |
130 | return;\r |
672ad671 |
131 | }\r |
132 | \r |
133 | if ((a&0xf0) == 0x10) {\r |
cc68a136 |
134 | Pico_mcd->s68k_regs[a] = d;\r |
672ad671 |
135 | return;\r |
cc68a136 |
136 | }\r |
137 | \r |
c459aefd |
138 | dprintf("m68k: invalid write? [%02x] %02x", a, d);\r |
cc68a136 |
139 | }\r |
140 | \r |
141 | \r |
142 | \r |
cb4a513a |
143 | static u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
144 | {\r |
145 | u32 d=0;\r |
cc68a136 |
146 | \r |
672ad671 |
147 | // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r |
cc68a136 |
148 | \r |
149 | switch (a) {\r |
150 | case 0:\r |
cb4a513a |
151 | d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
c459aefd |
152 | goto end;\r |
672ad671 |
153 | case 2:\r |
154 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r |
bf098bc5 |
155 | dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
672ad671 |
156 | goto end;\r |
cc68a136 |
157 | case 6:\r |
158 | d = CDC_Read_Reg();\r |
159 | goto end;\r |
160 | case 8:\r |
cb4a513a |
161 | d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
cc68a136 |
162 | goto end;\r |
163 | case 0xC:\r |
d1df8786 |
164 | dprintf("s68k stopwatch timer read");\r |
4f265db7 |
165 | d = Pico_mcd->m.timer_stopwatch >> 16;\r |
166 | goto end;\r |
d1df8786 |
167 | case 0x30:\r |
168 | dprintf("s68k int3 timer read");\r |
cc68a136 |
169 | break;\r |
170 | case 0x34: // fader\r |
171 | d = 0; // no busy bit\r |
172 | goto end;\r |
173 | }\r |
174 | \r |
175 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
176 | \r |
177 | end:\r |
178 | \r |
672ad671 |
179 | // dprintf("ret = %04x", d);\r |
cc68a136 |
180 | \r |
181 | return d;\r |
182 | }\r |
183 | \r |
cb4a513a |
184 | static void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
185 | {\r |
672ad671 |
186 | //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r |
cc68a136 |
187 | \r |
188 | // TODO: review against Gens\r |
189 | switch (a) {\r |
672ad671 |
190 | case 2:\r |
191 | return; // only m68k can change WP\r |
192 | case 3:\r |
bf098bc5 |
193 | dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
672ad671 |
194 | d &= 0x1d;\r |
d0d47c5b |
195 | if (d&4) {\r |
196 | d |= Pico_mcd->s68k_regs[3]&0xc2;\r |
197 | if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r |
198 | } else {\r |
199 | d |= Pico_mcd->s68k_regs[3]&0xc3;\r |
200 | if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r |
201 | }\r |
672ad671 |
202 | break;\r |
cc68a136 |
203 | case 4:\r |
204 | dprintf("s68k CDC dest: %x", d&7);\r |
205 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
206 | return;\r |
207 | case 5:\r |
c459aefd |
208 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
209 | break;\r |
210 | case 7:\r |
211 | CDC_Write_Reg(d);\r |
212 | return;\r |
213 | case 0xa:\r |
214 | dprintf("s68k set CDC dma addr");\r |
215 | break;\r |
d1df8786 |
216 | case 0xc:\r |
4f265db7 |
217 | case 0xd:\r |
d1df8786 |
218 | dprintf("s68k set stopwatch timer");\r |
4f265db7 |
219 | Pico_mcd->m.timer_stopwatch = 0;\r |
220 | return;\r |
d1df8786 |
221 | case 0x31:\r |
4f265db7 |
222 | dprintf("s68k set int3 timer: %02x", d);\r |
223 | Pico_mcd->m.timer_int3 = d << 16;\r |
d1df8786 |
224 | break;\r |
cc68a136 |
225 | case 0x33: // IRQ mask\r |
226 | dprintf("s68k irq mask: %02x", d);\r |
227 | if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r |
228 | CDD_Export_Status();\r |
cc68a136 |
229 | }\r |
230 | break;\r |
231 | case 0x34: // fader\r |
232 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
233 | return;\r |
672ad671 |
234 | case 0x36:\r |
235 | return; // d/m bit is unsetable\r |
236 | case 0x37: {\r |
237 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
238 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
239 | if ((d&4) && !(d_old&4)) {\r |
cc68a136 |
240 | CDD_Export_Status();\r |
cc68a136 |
241 | }\r |
672ad671 |
242 | return;\r |
243 | }\r |
cc68a136 |
244 | case 0x4b:\r |
245 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
246 | CDD_Import_Command();\r |
247 | return;\r |
248 | }\r |
249 | \r |
250 | if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))\r |
251 | {\r |
252 | dprintf("m68k: invalid write @ %02x?", a);\r |
253 | return;\r |
254 | }\r |
255 | \r |
256 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
257 | }\r |
258 | \r |
259 | \r |
260 | \r |
261 | \r |
262 | \r |
263 | static int PadRead(int i)\r |
264 | {\r |
265 | int pad=0,value=0,TH;\r |
266 | pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r |
267 | TH=Pico.ioports[i+1]&0x40;\r |
268 | \r |
269 | if(PicoOpt & 0x20) { // 6 button gamepad enabled\r |
270 | int phase = Pico.m.padTHPhase[i];\r |
271 | \r |
272 | if(phase == 2 && !TH) {\r |
273 | value=(pad&0xc0)>>2; // ?0SA 0000\r |
274 | goto end;\r |
275 | } else if(phase == 3 && TH) {\r |
276 | value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r |
277 | goto end;\r |
278 | } else if(phase == 3 && !TH) {\r |
279 | value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r |
280 | goto end;\r |
281 | }\r |
282 | }\r |
283 | \r |
284 | if(TH) value=(pad&0x3f); // ?1CB RLDU\r |
285 | else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r |
286 | \r |
287 | end:\r |
288 | \r |
289 | // orr the bits, which are set as output\r |
290 | value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r |
291 | \r |
292 | return value; // will mirror later\r |
293 | }\r |
294 | \r |
295 | static u8 z80Read8(u32 a)\r |
296 | {\r |
297 | if(Pico.m.z80Run&1) return 0;\r |
298 | \r |
299 | a&=0x1fff;\r |
300 | \r |
301 | if(!(PicoOpt&4)) {\r |
302 | // Z80 disabled, do some faking\r |
303 | static u8 zerosent = 0;\r |
304 | if(a == Pico.m.z80_lastaddr) { // probably polling something\r |
305 | u8 d = Pico.m.z80_fakeval;\r |
306 | if((d & 0xf) == 0xf && !zerosent) {\r |
307 | d = 0; zerosent = 1;\r |
308 | } else {\r |
309 | Pico.m.z80_fakeval++;\r |
310 | zerosent = 0;\r |
311 | }\r |
312 | return d;\r |
313 | } else {\r |
314 | Pico.m.z80_fakeval = 0;\r |
315 | }\r |
316 | }\r |
317 | \r |
318 | Pico.m.z80_lastaddr = (u16) a;\r |
319 | return Pico.zram[a];\r |
320 | }\r |
321 | \r |
322 | \r |
323 | // for nonstandard reads\r |
324 | static u32 UnusualRead16(u32 a, int realsize)\r |
325 | {\r |
326 | u32 d=0;\r |
327 | \r |
328 | dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r |
329 | \r |
330 | \r |
331 | dprintf("ret = %04x", d);\r |
332 | return d;\r |
333 | }\r |
334 | \r |
335 | static u32 OtherRead16(u32 a, int realsize)\r |
336 | {\r |
337 | u32 d=0;\r |
338 | \r |
339 | if ((a&0xff0000)==0xa00000) {\r |
340 | if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r |
341 | if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r |
342 | d=0xffff; goto end;\r |
343 | }\r |
344 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
345 | a=(a>>1)&0xf;\r |
346 | switch(a) {\r |
347 | case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r |
348 | case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r |
349 | case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r |
350 | default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r |
351 | }\r |
352 | d|=d<<8;\r |
353 | goto end;\r |
354 | }\r |
355 | // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r |
356 | if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r |
357 | \r |
358 | if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r |
359 | \r |
672ad671 |
360 | if ((a&0xffffc0)==0xa12000) {\r |
cb4a513a |
361 | d=m68k_reg_read16(a);\r |
672ad671 |
362 | goto end;\r |
363 | }\r |
cc68a136 |
364 | \r |
365 | d = UnusualRead16(a, realsize);\r |
366 | \r |
367 | end:\r |
368 | return d;\r |
369 | }\r |
370 | \r |
371 | //extern UINT32 mz80GetRegisterValue(void *, UINT32);\r |
372 | \r |
373 | static void OtherWrite8(u32 a,u32 d,int realsize)\r |
374 | {\r |
375 | if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r |
376 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r |
377 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r |
378 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
379 | a=(a>>1)&0xf;\r |
380 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
381 | if(PicoOpt&0x20) {\r |
382 | if(a==1) {\r |
383 | Pico.m.padDelay[0] = 0;\r |
384 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
385 | }\r |
386 | else if(a==2) {\r |
387 | Pico.m.padDelay[1] = 0;\r |
388 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
389 | }\r |
390 | }\r |
391 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
392 | return;\r |
393 | }\r |
394 | if (a==0xa11100) {\r |
395 | extern int z80startCycle, z80stopCycle;\r |
396 | //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r |
397 | d&=1; d^=1;\r |
398 | if(!d) {\r |
399 | // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r |
400 | if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r |
401 | z80stopCycle = SekCyclesDone();\r |
402 | //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r |
403 | } else {\r |
404 | z80startCycle = SekCyclesDone();\r |
405 | //if(Pico.m.scanline != -1)\r |
406 | //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r |
407 | }\r |
408 | //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r |
409 | Pico.m.z80Run=(u8)d; return;\r |
410 | }\r |
411 | if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r |
412 | \r |
413 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r |
414 | {\r |
415 | Pico.m.z80_bank68k>>=1;\r |
416 | Pico.m.z80_bank68k|=(d&1)<<8;\r |
417 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r |
418 | return;\r |
419 | }\r |
420 | \r |
421 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r |
422 | \r |
cb4a513a |
423 | if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r |
cc68a136 |
424 | \r |
425 | dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
426 | }\r |
427 | \r |
428 | static void OtherWrite16(u32 a,u32 d)\r |
429 | {\r |
430 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r |
431 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r |
432 | \r |
433 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
434 | a=(a>>1)&0xf;\r |
435 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
436 | if(PicoOpt&0x20) {\r |
437 | if(a==1) {\r |
438 | Pico.m.padDelay[0] = 0;\r |
439 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
440 | }\r |
441 | else if(a==2) {\r |
442 | Pico.m.padDelay[1] = 0;\r |
443 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
444 | }\r |
445 | }\r |
446 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
447 | return;\r |
448 | }\r |
449 | if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r |
450 | if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r |
451 | \r |
452 | OtherWrite8(a, d>>8, 16);\r |
453 | OtherWrite8(a+1,d&0xff, 16);\r |
454 | }\r |
455 | \r |
456 | // -----------------------------------------------------------------\r |
457 | // Read Rom and read Ram\r |
458 | \r |
459 | u8 PicoReadM68k8(u32 a)\r |
460 | {\r |
461 | u32 d=0;\r |
462 | \r |
463 | if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r |
464 | \r |
465 | a&=0xffffff;\r |
466 | \r |
467 | if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r |
468 | \r |
469 | // prg RAM\r |
470 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
471 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
cc68a136 |
472 | d = *(prg_bank+((a^1)&0x1ffff));\r |
473 | goto end;\r |
474 | }\r |
475 | \r |
b837b69b |
476 | #if 0\r |
477 | if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r |
478 | {\r |
479 | int i;\r |
480 | FILE *ff;\r |
481 | unsigned short *ram = (unsigned short *) Pico.ram;\r |
482 | // unswap and dump RAM\r |
483 | for (i = 0; i < 0x10000/2; i++)\r |
484 | ram[i] = (ram[i]>>8) | (ram[i]<<8);\r |
485 | ff = fopen("ram.bin", "wb");\r |
486 | fwrite(ram, 1, 0x10000, ff);\r |
487 | fclose(ff);\r |
488 | exit(0);\r |
489 | }\r |
490 | #endif\r |
491 | \r |
d0d47c5b |
492 | // word RAM\r |
493 | if ((a&0xfc0000)==0x200000) {\r |
494 | dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r |
495 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
496 | if (a >= 0x220000) {\r |
497 | dprintf("cell");\r |
498 | } else {\r |
499 | a=((a&0x1fffe)<<1)|(a&1);\r |
500 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
501 | d = Pico_mcd->word_ram[a^1];\r |
502 | }\r |
d0d47c5b |
503 | } else {\r |
504 | // allow access in any mode, like Gens does\r |
505 | d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r |
506 | }\r |
507 | dprintf("ret = %02x", (u8)d);\r |
508 | goto end;\r |
509 | }\r |
510 | \r |
cc68a136 |
511 | if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r |
512 | \r |
c459aefd |
513 | if ((a&0xffffc0)==0xa12000)\r |
514 | rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r |
672ad671 |
515 | \r |
cc68a136 |
516 | d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r |
517 | \r |
c459aefd |
518 | if ((a&0xffffc0)==0xa12000)\r |
519 | rdprintf("ret = %02x", (u8)d);\r |
672ad671 |
520 | \r |
cc68a136 |
521 | end:\r |
522 | \r |
523 | #ifdef __debug_io\r |
524 | dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
525 | #endif\r |
526 | return (u8)d;\r |
527 | }\r |
528 | \r |
ab0607f7 |
529 | \r |
cc68a136 |
530 | u16 PicoReadM68k16(u32 a)\r |
531 | {\r |
532 | u16 d=0;\r |
533 | \r |
534 | if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r |
535 | \r |
536 | a&=0xfffffe;\r |
537 | \r |
538 | if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r |
539 | \r |
540 | // prg RAM\r |
541 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
542 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
cc68a136 |
543 | d = *(u16 *)(prg_bank+(a&0x1fffe));\r |
544 | goto end;\r |
545 | }\r |
546 | \r |
d0d47c5b |
547 | // word RAM\r |
548 | if ((a&0xfc0000)==0x200000) {\r |
549 | dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r |
550 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
551 | if (a >= 0x220000) {\r |
552 | dprintf("cell");\r |
553 | } else {\r |
554 | a=((a&0x1fffe)<<1);\r |
555 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
556 | d = *(u16 *)(Pico_mcd->word_ram+a);\r |
557 | }\r |
d0d47c5b |
558 | } else {\r |
559 | // allow access in any mode, like Gens does\r |
560 | d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
561 | }\r |
562 | dprintf("ret = %04x", d);\r |
563 | goto end;\r |
564 | }\r |
565 | \r |
c459aefd |
566 | if ((a&0xffffc0)==0xa12000)\r |
567 | rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r |
672ad671 |
568 | \r |
cc68a136 |
569 | d = (u16)OtherRead16(a, 16);\r |
570 | \r |
c459aefd |
571 | if ((a&0xffffc0)==0xa12000)\r |
572 | rdprintf("ret = %04x", d);\r |
672ad671 |
573 | \r |
cc68a136 |
574 | end:\r |
575 | \r |
576 | #ifdef __debug_io\r |
577 | dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
578 | #endif\r |
579 | return d;\r |
580 | }\r |
581 | \r |
ab0607f7 |
582 | \r |
cc68a136 |
583 | u32 PicoReadM68k32(u32 a)\r |
584 | {\r |
585 | u32 d=0;\r |
586 | \r |
587 | if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r |
588 | \r |
589 | a&=0xfffffe;\r |
590 | \r |
591 | if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r |
592 | \r |
593 | // prg RAM\r |
594 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
595 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
cc68a136 |
596 | u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r |
597 | d = (pm[0]<<16)|pm[1];\r |
598 | goto end;\r |
599 | }\r |
600 | \r |
d0d47c5b |
601 | // word RAM\r |
602 | if ((a&0xfc0000)==0x200000) {\r |
603 | dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r |
604 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
605 | if (a >= 0x220000) {\r |
606 | dprintf("cell");\r |
607 | } else {\r |
bf098bc5 |
608 | a=((a&0x1fffe)<<1);\r |
609 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
ab0607f7 |
610 | d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r |
611 | d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r |
bf098bc5 |
612 | }\r |
d0d47c5b |
613 | } else {\r |
614 | // allow access in any mode, like Gens does\r |
615 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r |
616 | }\r |
617 | dprintf("ret = %08x", d);\r |
618 | goto end;\r |
619 | }\r |
620 | \r |
c459aefd |
621 | if ((a&0xffffc0)==0xa12000)\r |
622 | rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r |
672ad671 |
623 | \r |
cc68a136 |
624 | d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r |
625 | \r |
c459aefd |
626 | if ((a&0xffffc0)==0xa12000)\r |
627 | rdprintf("ret = %08x", d);\r |
672ad671 |
628 | \r |
cc68a136 |
629 | end:\r |
630 | #ifdef __debug_io\r |
631 | dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
632 | #endif\r |
633 | return d;\r |
634 | }\r |
635 | \r |
ab0607f7 |
636 | \r |
cc68a136 |
637 | // -----------------------------------------------------------------\r |
638 | // Write Ram\r |
639 | \r |
640 | void PicoWriteM68k8(u32 a,u8 d)\r |
641 | {\r |
642 | #ifdef __debug_io\r |
643 | dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
644 | #endif\r |
645 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
646 | // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
647 | \r |
648 | \r |
ab0607f7 |
649 | if ((a&0xe00000)==0xe00000) { // Ram\r |
650 | *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r |
651 | return;\r |
652 | }\r |
cc68a136 |
653 | \r |
654 | a&=0xffffff;\r |
655 | \r |
656 | // prg RAM\r |
657 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
658 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
bf098bc5 |
659 | *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r |
cc68a136 |
660 | return;\r |
661 | }\r |
662 | \r |
d0d47c5b |
663 | // word RAM\r |
664 | if ((a&0xfc0000)==0x200000) {\r |
665 | dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r |
666 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
667 | if (a >= 0x220000) {\r |
668 | dprintf("cell");\r |
669 | } else {\r |
670 | a=((a&0x1fffe)<<1)|(a&1);\r |
671 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
672 | *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r |
673 | }\r |
d0d47c5b |
674 | } else {\r |
675 | // allow access in any mode, like Gens does\r |
bf098bc5 |
676 | *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r |
d0d47c5b |
677 | }\r |
678 | return;\r |
679 | }\r |
680 | \r |
c459aefd |
681 | if ((a&0xffffc0)==0xa12000)\r |
682 | rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r |
672ad671 |
683 | \r |
cc68a136 |
684 | OtherWrite8(a,d,8);\r |
685 | }\r |
686 | \r |
ab0607f7 |
687 | \r |
cc68a136 |
688 | void PicoWriteM68k16(u32 a,u16 d)\r |
689 | {\r |
690 | #ifdef __debug_io\r |
691 | dprintf("w16: %06x, %04x", a&0xffffff, d);\r |
692 | #endif\r |
cc68a136 |
693 | // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
694 | \r |
ab0607f7 |
695 | if ((a&0xe00000)==0xe00000) { // Ram\r |
696 | *(u16 *)(Pico.ram+(a&0xfffe))=d;\r |
697 | return;\r |
698 | }\r |
cc68a136 |
699 | \r |
700 | a&=0xfffffe;\r |
701 | \r |
702 | // prg RAM\r |
703 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
704 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
cc68a136 |
705 | *(u16 *)(prg_bank+(a&0x1fffe))=d;\r |
706 | return;\r |
707 | }\r |
708 | \r |
d0d47c5b |
709 | // word RAM\r |
710 | if ((a&0xfc0000)==0x200000) {\r |
711 | dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r |
712 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
713 | if (a >= 0x220000) {\r |
714 | dprintf("cell");\r |
715 | } else {\r |
716 | a=((a&0x1fffe)<<1);\r |
717 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
718 | *(u16 *)(Pico_mcd->word_ram+a)=d;\r |
719 | }\r |
d0d47c5b |
720 | } else {\r |
721 | // allow access in any mode, like Gens does\r |
722 | *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r |
723 | }\r |
724 | return;\r |
725 | }\r |
726 | \r |
c459aefd |
727 | if ((a&0xffffc0)==0xa12000)\r |
728 | rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r |
cc68a136 |
729 | \r |
730 | OtherWrite16(a,d);\r |
731 | }\r |
732 | \r |
ab0607f7 |
733 | \r |
cc68a136 |
734 | void PicoWriteM68k32(u32 a,u32 d)\r |
735 | {\r |
736 | #ifdef __debug_io\r |
737 | dprintf("w32: %06x, %08x", a&0xffffff, d);\r |
738 | #endif\r |
739 | \r |
740 | if ((a&0xe00000)==0xe00000)\r |
741 | {\r |
742 | // Ram:\r |
743 | u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r |
744 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
745 | return;\r |
746 | }\r |
747 | \r |
748 | a&=0xfffffe;\r |
749 | \r |
750 | // prg RAM\r |
751 | if ((a&0xfe0000)==0x020000) {\r |
672ad671 |
752 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
cc68a136 |
753 | u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r |
754 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
755 | return;\r |
756 | }\r |
757 | \r |
672ad671 |
758 | // word RAM\r |
d0d47c5b |
759 | if ((a&0xfc0000)==0x200000) {\r |
760 | if (d != 0) // don't log clears\r |
761 | dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r |
762 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
bf098bc5 |
763 | if (a >= 0x220000) {\r |
764 | dprintf("cell");\r |
765 | } else {\r |
bf098bc5 |
766 | a=((a&0x1fffe)<<1);\r |
767 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
ab0607f7 |
768 | *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r |
769 | *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r |
bf098bc5 |
770 | }\r |
d0d47c5b |
771 | } else {\r |
772 | // allow access in any mode, like Gens does\r |
773 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
774 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
775 | }\r |
672ad671 |
776 | return;\r |
d0d47c5b |
777 | }\r |
672ad671 |
778 | \r |
c459aefd |
779 | if ((a&0xffffc0)==0xa12000)\r |
780 | rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r |
cc68a136 |
781 | \r |
782 | OtherWrite16(a, (u16)(d>>16));\r |
783 | OtherWrite16(a+2,(u16)d);\r |
784 | }\r |
785 | \r |
786 | \r |
787 | // -----------------------------------------------------------------\r |
788 | \r |
789 | \r |
790 | u8 PicoReadS68k8(u32 a)\r |
791 | {\r |
792 | u32 d=0;\r |
793 | \r |
794 | a&=0xffffff;\r |
795 | \r |
796 | // prg RAM\r |
797 | if (a < 0x80000) {\r |
798 | d = *(Pico_mcd->prg_ram+(a^1));\r |
799 | goto end;\r |
800 | }\r |
801 | \r |
802 | // regs\r |
803 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
804 | a &= 0x1ff;\r |
805 | rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r |
806 | if (a >= 0x50 && a < 0x68)\r |
807 | d = gfx_cd_read(a&~1);\r |
808 | else d = s68k_reg_read16(a&~1);\r |
809 | if ((a&1)==0) d>>=8;\r |
c459aefd |
810 | rdprintf("ret = %02x", (u8)d);\r |
cc68a136 |
811 | goto end;\r |
812 | }\r |
813 | \r |
d0d47c5b |
814 | // word RAM (2M area)\r |
815 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
816 | dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);\r |
817 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
818 | // TODO (decode)\r |
819 | dprintf("(decode)");\r |
820 | } else {\r |
821 | // allow access in any mode, like Gens does\r |
822 | d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r |
823 | }\r |
824 | dprintf("ret = %02x", (u8)d);\r |
825 | goto end;\r |
826 | }\r |
827 | \r |
828 | // word RAM (1M area)\r |
829 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
830 | dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);\r |
bf098bc5 |
831 | a=((a&0x1fffe)<<1)|(a&1);\r |
832 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
833 | d = Pico_mcd->word_ram[a^1];\r |
834 | dprintf("ret = %02x", (u8)d);\r |
d0d47c5b |
835 | goto end;\r |
836 | }\r |
837 | \r |
4f265db7 |
838 | // PCM\r |
839 | if ((a&0xff8000)==0xff0000) {\r |
840 | dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPc);\r |
841 | a &= 0x7fff;\r |
842 | if (a >= 0x2000)\r |
843 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
844 | else if (a >= 0x20) {\r |
845 | a &= 0x1e;\r |
846 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
847 | if (a & 2) d >>= 8;\r |
848 | }\r |
849 | dprintf("ret = %02x", (u8)d);\r |
850 | goto end;\r |
851 | }\r |
852 | \r |
ab0607f7 |
853 | // bram\r |
854 | if ((a&0xff0000)==0xfe0000) {\r |
855 | d = Pico_mcd->bram[(a>>1)&0x1fff];\r |
856 | goto end;\r |
857 | }\r |
858 | \r |
cc68a136 |
859 | dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r |
860 | \r |
861 | end:\r |
862 | \r |
863 | #ifdef __debug_io2\r |
864 | dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r |
865 | #endif\r |
866 | return (u8)d;\r |
867 | }\r |
868 | \r |
ab0607f7 |
869 | \r |
cc68a136 |
870 | u16 PicoReadS68k16(u32 a)\r |
871 | {\r |
4f265db7 |
872 | u32 d=0;\r |
cc68a136 |
873 | \r |
874 | a&=0xfffffe;\r |
875 | \r |
876 | // prg RAM\r |
877 | if (a < 0x80000) {\r |
878 | d = *(u16 *)(Pico_mcd->prg_ram+a);\r |
879 | goto end;\r |
880 | }\r |
881 | \r |
882 | // regs\r |
883 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
884 | a &= 0x1fe;\r |
885 | rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r |
886 | if (a >= 0x50 && a < 0x68)\r |
887 | d = gfx_cd_read(a);\r |
888 | else d = s68k_reg_read16(a);\r |
c459aefd |
889 | rdprintf("ret = %04x", d);\r |
cc68a136 |
890 | goto end;\r |
891 | }\r |
892 | \r |
d0d47c5b |
893 | // word RAM (2M area)\r |
894 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
895 | dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);\r |
896 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
897 | // TODO (decode)\r |
898 | dprintf("(decode)");\r |
899 | } else {\r |
900 | // allow access in any mode, like Gens does\r |
901 | d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
902 | }\r |
ab0607f7 |
903 | dprintf("ret = %04x", d);\r |
d0d47c5b |
904 | goto end;\r |
905 | }\r |
906 | \r |
907 | // word RAM (1M area)\r |
908 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
909 | dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);\r |
bf098bc5 |
910 | a=((a&0x1fffe)<<1);\r |
911 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
912 | d = *(u16 *)(Pico_mcd->word_ram+a);\r |
ab0607f7 |
913 | dprintf("ret = %04x", d);\r |
914 | goto end;\r |
915 | }\r |
916 | \r |
917 | // bram\r |
918 | if ((a&0xff0000)==0xfe0000) {\r |
919 | dprintf("s68k_bram r16: [%06x] @%06x", a, SekPc);\r |
920 | a = (a>>1)&0x1fff;\r |
4f265db7 |
921 | d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r |
ab0607f7 |
922 | d|= Pico_mcd->bram[a++] << 8;\r |
923 | dprintf("ret = %04x", d);\r |
d0d47c5b |
924 | goto end;\r |
925 | }\r |
926 | \r |
4f265db7 |
927 | // PCM\r |
928 | if ((a&0xff8000)==0xff0000) {\r |
929 | dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPc);\r |
930 | a &= 0x7fff;\r |
931 | if (a >= 0x2000)\r |
932 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
933 | else if (a >= 0x20) {\r |
934 | a &= 0x1e;\r |
935 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
936 | if (a & 2) d >>= 8;\r |
937 | }\r |
938 | dprintf("ret = %04x", d);\r |
939 | goto end;\r |
940 | }\r |
941 | \r |
cc68a136 |
942 | dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
943 | \r |
944 | end:\r |
945 | \r |
946 | #ifdef __debug_io2\r |
947 | dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
948 | #endif\r |
949 | return d;\r |
950 | }\r |
951 | \r |
ab0607f7 |
952 | \r |
cc68a136 |
953 | u32 PicoReadS68k32(u32 a)\r |
954 | {\r |
955 | u32 d=0;\r |
956 | \r |
957 | a&=0xfffffe;\r |
958 | \r |
959 | // prg RAM\r |
960 | if (a < 0x80000) {\r |
961 | u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r |
962 | d = (pm[0]<<16)|pm[1];\r |
963 | goto end;\r |
964 | }\r |
965 | \r |
966 | // regs\r |
967 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
968 | a &= 0x1fe;\r |
969 | rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r |
970 | if (a >= 0x50 && a < 0x68)\r |
971 | d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r |
972 | else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r |
c459aefd |
973 | rdprintf("ret = %08x", d);\r |
cc68a136 |
974 | goto end;\r |
975 | }\r |
976 | \r |
d0d47c5b |
977 | // word RAM (2M area)\r |
978 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
979 | dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);\r |
980 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
981 | // TODO (decode)\r |
982 | dprintf("(decode)");\r |
983 | } else {\r |
984 | // allow access in any mode, like Gens does\r |
985 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r |
986 | }\r |
ab0607f7 |
987 | dprintf("ret = %08x", d);\r |
d0d47c5b |
988 | goto end;\r |
989 | }\r |
990 | \r |
991 | // word RAM (1M area)\r |
992 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
ab0607f7 |
993 | dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPc);\r |
bf098bc5 |
994 | a=((a&0x1fffe)<<1);\r |
995 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
ab0607f7 |
996 | d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r |
997 | d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r |
998 | dprintf("ret = %08x", d);\r |
999 | goto end;\r |
1000 | }\r |
1001 | \r |
4f265db7 |
1002 | // PCM\r |
1003 | if ((a&0xff8000)==0xff0000) {\r |
1004 | dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPc);\r |
1005 | a &= 0x7fff;\r |
1006 | if (a >= 0x2000) {\r |
1007 | a >>= 1;\r |
1008 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r |
1009 | d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r |
1010 | } else if (a >= 0x20) {\r |
1011 | a &= 0x1e;\r |
1012 | if (a & 2) {\r |
1013 | a >>= 2;\r |
1014 | d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r |
1015 | d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r |
1016 | } else {\r |
1017 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
1018 | d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r |
1019 | }\r |
1020 | }\r |
1021 | dprintf("ret = %08x", d);\r |
1022 | goto end;\r |
1023 | }\r |
1024 | \r |
ab0607f7 |
1025 | // bram\r |
1026 | if ((a&0xff0000)==0xfe0000) {\r |
1027 | dprintf("s68k_bram r32: [%06x] @%06x", a, SekPc);\r |
1028 | a = (a>>1)&0x1fff;\r |
1029 | d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r |
1030 | d|= Pico_mcd->bram[a++] << 24;\r |
1031 | d|= Pico_mcd->bram[a++];\r |
1032 | d|= Pico_mcd->bram[a++] << 8;\r |
1033 | dprintf("ret = %08x", d);\r |
d0d47c5b |
1034 | goto end;\r |
1035 | }\r |
1036 | \r |
cc68a136 |
1037 | dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
1038 | \r |
1039 | end:\r |
1040 | \r |
1041 | #ifdef __debug_io2\r |
1042 | dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
1043 | #endif\r |
1044 | return d;\r |
1045 | }\r |
1046 | \r |
ab0607f7 |
1047 | \r |
cc68a136 |
1048 | // -----------------------------------------------------------------\r |
1049 | \r |
1050 | void PicoWriteS68k8(u32 a,u8 d)\r |
1051 | {\r |
1052 | #ifdef __debug_io2\r |
1053 | dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r |
1054 | #endif\r |
1055 | \r |
1056 | a&=0xffffff;\r |
1057 | \r |
1058 | // prg RAM\r |
1059 | if (a < 0x80000) {\r |
1060 | u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r |
1061 | *pm=d;\r |
1062 | return;\r |
1063 | }\r |
1064 | \r |
1065 | // regs\r |
1066 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
1067 | a &= 0x1ff;\r |
1068 | rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r |
1069 | if (a >= 0x50 && a < 0x68)\r |
1070 | gfx_cd_write(a&~1, (d<<8)|d);\r |
1071 | else s68k_reg_write8(a,d);\r |
cc68a136 |
1072 | return;\r |
1073 | }\r |
1074 | \r |
d0d47c5b |
1075 | // word RAM (2M area)\r |
1076 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
1077 | dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);\r |
1078 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
1079 | // TODO (decode)\r |
1080 | dprintf("(decode)");\r |
1081 | } else {\r |
1082 | // allow access in any mode, like Gens does\r |
bf098bc5 |
1083 | *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r |
d0d47c5b |
1084 | }\r |
1085 | return;\r |
1086 | }\r |
1087 | \r |
1088 | // word RAM (1M area)\r |
1089 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
1090 | if (d)\r |
1091 | dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);\r |
bf098bc5 |
1092 | a=((a&0x1fffe)<<1)|(a&1);\r |
1093 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
1094 | *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r |
d0d47c5b |
1095 | return;\r |
1096 | }\r |
1097 | \r |
4f265db7 |
1098 | // PCM\r |
1099 | if ((a&0xff8000)==0xff0000) {\r |
1100 | a &= 0x7fff;\r |
1101 | if (a >= 0x2000)\r |
1102 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
1103 | else if (a < 0x12)\r |
1104 | pcm_write(a>>1, d);\r |
1105 | return;\r |
1106 | }\r |
1107 | \r |
ab0607f7 |
1108 | // bram\r |
1109 | if ((a&0xff0000)==0xfe0000) {\r |
1110 | Pico_mcd->bram[(a>>1)&0x1fff] = d;\r |
1111 | SRam.changed = 1;\r |
1112 | return;\r |
1113 | }\r |
1114 | \r |
cc68a136 |
1115 | dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r |
1116 | }\r |
1117 | \r |
ab0607f7 |
1118 | \r |
cc68a136 |
1119 | void PicoWriteS68k16(u32 a,u16 d)\r |
1120 | {\r |
1121 | #ifdef __debug_io2\r |
1122 | dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
1123 | #endif\r |
1124 | \r |
1125 | a&=0xfffffe;\r |
1126 | \r |
1127 | // prg RAM\r |
1128 | if (a < 0x80000) {\r |
1129 | *(u16 *)(Pico_mcd->prg_ram+a)=d;\r |
1130 | return;\r |
1131 | }\r |
1132 | \r |
1133 | // regs\r |
1134 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
1135 | a &= 0x1fe;\r |
1136 | rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r |
1137 | if (a >= 0x50 && a < 0x68)\r |
1138 | gfx_cd_write(a, d);\r |
1139 | else {\r |
1140 | s68k_reg_write8(a, d>>8);\r |
1141 | s68k_reg_write8(a+1,d&0xff);\r |
1142 | }\r |
cc68a136 |
1143 | return;\r |
1144 | }\r |
1145 | \r |
d0d47c5b |
1146 | // word RAM (2M area)\r |
1147 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
1148 | dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);\r |
1149 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
1150 | // TODO (decode)\r |
1151 | dprintf("(decode)");\r |
1152 | } else {\r |
1153 | // allow access in any mode, like Gens does\r |
1154 | *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r |
1155 | }\r |
1156 | return;\r |
1157 | }\r |
1158 | \r |
1159 | // word RAM (1M area)\r |
1160 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
1161 | if (d)\r |
1162 | dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);\r |
bf098bc5 |
1163 | a=((a&0x1fffe)<<1);\r |
1164 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
1165 | *(u16 *)(Pico_mcd->word_ram+a)=d;\r |
d0d47c5b |
1166 | return;\r |
1167 | }\r |
1168 | \r |
4f265db7 |
1169 | // PCM\r |
1170 | if ((a&0xff8000)==0xff0000) {\r |
1171 | a &= 0x7fff;\r |
1172 | if (a >= 0x2000)\r |
1173 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
1174 | else if (a < 0x12)\r |
1175 | pcm_write(a>>1, d & 0xff);\r |
1176 | return;\r |
1177 | }\r |
1178 | \r |
ab0607f7 |
1179 | // bram\r |
1180 | if ((a&0xff0000)==0xfe0000) {\r |
1181 | dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPc);\r |
1182 | a = (a>>1)&0x1fff;\r |
1183 | Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r |
1184 | Pico_mcd->bram[a++] = d >> 8;\r |
1185 | SRam.changed = 1;\r |
1186 | return;\r |
1187 | }\r |
1188 | \r |
cc68a136 |
1189 | dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
1190 | }\r |
1191 | \r |
ab0607f7 |
1192 | \r |
cc68a136 |
1193 | void PicoWriteS68k32(u32 a,u32 d)\r |
1194 | {\r |
1195 | #ifdef __debug_io2\r |
1196 | dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
1197 | #endif\r |
1198 | \r |
1199 | a&=0xfffffe;\r |
1200 | \r |
1201 | // prg RAM\r |
1202 | if (a < 0x80000) {\r |
1203 | u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r |
1204 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
1205 | return;\r |
1206 | }\r |
1207 | \r |
1208 | // regs\r |
1209 | if ((a&0xfffe00) == 0xff8000) {\r |
cb4a513a |
1210 | a &= 0x1fe;\r |
1211 | rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r |
1212 | if (a >= 0x50 && a < 0x68) {\r |
1213 | gfx_cd_write(a, d>>16);\r |
1214 | gfx_cd_write(a+2, d&0xffff);\r |
1215 | } else {\r |
1216 | s68k_reg_write8(a, d>>24);\r |
1217 | s68k_reg_write8(a+1,(d>>16)&0xff);\r |
1218 | s68k_reg_write8(a+2,(d>>8) &0xff);\r |
1219 | s68k_reg_write8(a+3, d &0xff);\r |
1220 | }\r |
cc68a136 |
1221 | return;\r |
1222 | }\r |
1223 | \r |
d0d47c5b |
1224 | // word RAM (2M area)\r |
1225 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
1226 | dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);\r |
1227 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
1228 | // TODO (decode)\r |
1229 | dprintf("(decode)");\r |
1230 | } else {\r |
1231 | // allow access in any mode, like Gens does\r |
1232 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
1233 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
1234 | }\r |
1235 | return;\r |
1236 | }\r |
1237 | \r |
1238 | // word RAM (1M area)\r |
1239 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
1240 | if (d)\r |
1241 | dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);\r |
bf098bc5 |
1242 | a=((a&0x1fffe)<<1);\r |
1243 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
ab0607f7 |
1244 | *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r |
1245 | *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r |
d0d47c5b |
1246 | return;\r |
1247 | }\r |
ab0607f7 |
1248 | \r |
4f265db7 |
1249 | // PCM\r |
1250 | if ((a&0xff8000)==0xff0000) {\r |
1251 | a &= 0x7fff;\r |
1252 | if (a >= 0x2000) {\r |
1253 | a >>= 1;\r |
1254 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r |
1255 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r |
1256 | } else if (a < 0x12) {\r |
1257 | a >>= 1;\r |
1258 | pcm_write(a, (d>>16) & 0xff);\r |
1259 | pcm_write(a+1, d & 0xff);\r |
1260 | }\r |
1261 | return;\r |
1262 | }\r |
1263 | \r |
ab0607f7 |
1264 | // bram\r |
1265 | if ((a&0xff0000)==0xfe0000) {\r |
1266 | dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPc);\r |
1267 | a = (a>>1)&0x1fff;\r |
1268 | Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r |
1269 | Pico_mcd->bram[a++] = d >> 24;\r |
1270 | Pico_mcd->bram[a++] = d;\r |
1271 | Pico_mcd->bram[a++] = d >> 8;\r |
1272 | SRam.changed = 1;\r |
1273 | return;\r |
1274 | }\r |
1275 | \r |
cc68a136 |
1276 | dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
1277 | }\r |
1278 | \r |
1279 | \r |
1280 | \r |
1281 | // -----------------------------------------------------------------\r |
1282 | \r |
b837b69b |
1283 | \r |
1284 | #if defined(EMU_C68K)\r |
1285 | static __inline int PicoMemBaseM68k(u32 pc)\r |
1286 | {\r |
1287 | int membase=0;\r |
1288 | \r |
1289 | if (pc < 0x20000)\r |
1290 | {\r |
1291 | membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r |
1292 | }\r |
1293 | else if ((pc&0xe00000)==0xe00000)\r |
1294 | {\r |
1295 | membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r |
1296 | }\r |
1297 | else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r |
1298 | {\r |
1299 | membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r |
1300 | }\r |
1301 | else\r |
1302 | {\r |
1303 | // Error - Program Counter is invalid\r |
1304 | dprintf("m68k: unhandled jump to %06x", pc);\r |
1305 | membase=(int)Pico.rom;\r |
1306 | }\r |
1307 | \r |
1308 | return membase;\r |
1309 | }\r |
1310 | \r |
1311 | \r |
1312 | static u32 PicoCheckPcM68k(u32 pc)\r |
1313 | {\r |
1314 | pc-=PicoCpu.membase; // Get real pc\r |
1315 | pc&=0xfffffe;\r |
1316 | \r |
1317 | PicoCpu.membase=PicoMemBaseM68k(pc);\r |
1318 | \r |
1319 | return PicoCpu.membase+pc;\r |
1320 | }\r |
1321 | \r |
1322 | \r |
1323 | static __inline int PicoMemBaseS68k(u32 pc)\r |
1324 | {\r |
1325 | int membase;\r |
1326 | \r |
1327 | membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r |
1328 | if (pc >= 0x80000)\r |
1329 | {\r |
1330 | // Error - Program Counter is invalid\r |
1331 | dprintf("s68k: unhandled jump to %06x", pc);\r |
1332 | }\r |
1333 | \r |
1334 | return membase;\r |
1335 | }\r |
1336 | \r |
1337 | \r |
1338 | static u32 PicoCheckPcS68k(u32 pc)\r |
1339 | {\r |
1340 | pc-=PicoCpuS68k.membase; // Get real pc\r |
1341 | pc&=0xfffffe;\r |
1342 | \r |
1343 | PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r |
1344 | \r |
1345 | return PicoCpuS68k.membase+pc;\r |
1346 | }\r |
1347 | #endif\r |
1348 | \r |
1349 | \r |
1350 | void PicoMemSetupCD()\r |
1351 | {\r |
1352 | dprintf("PicoMemSetupCD()");\r |
1353 | #ifdef EMU_C68K\r |
1354 | // Setup m68k memory callbacks:\r |
1355 | PicoCpu.checkpc=PicoCheckPcM68k;\r |
1356 | PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r |
1357 | PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r |
1358 | PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r |
1359 | PicoCpu.write8 =PicoWriteM68k8;\r |
1360 | PicoCpu.write16=PicoWriteM68k16;\r |
1361 | PicoCpu.write32=PicoWriteM68k32;\r |
1362 | // s68k\r |
1363 | PicoCpuS68k.checkpc=PicoCheckPcS68k;\r |
1364 | PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r |
1365 | PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r |
1366 | PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r |
1367 | PicoCpuS68k.write8 =PicoWriteS68k8;\r |
1368 | PicoCpuS68k.write16=PicoWriteS68k16;\r |
1369 | PicoCpuS68k.write32=PicoWriteS68k32;\r |
1370 | #endif\r |
1371 | }\r |
1372 | \r |
1373 | \r |
cc68a136 |
1374 | #ifdef EMU_M68K\r |
1375 | unsigned char PicoReadCD8w (unsigned int a) {\r |
1376 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r |
1377 | }\r |
1378 | unsigned short PicoReadCD16w(unsigned int a) {\r |
1379 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r |
1380 | }\r |
1381 | unsigned int PicoReadCD32w(unsigned int a) {\r |
1382 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r |
1383 | }\r |
1384 | void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
1385 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r |
1386 | }\r |
1387 | void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
1388 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r |
1389 | }\r |
1390 | void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
1391 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r |
1392 | }\r |
1393 | \r |
1394 | // these are allowed to access RAM\r |
1395 | unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r |
1396 | a&=0xffffff;\r |
1397 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
1398 | if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r |
b837b69b |
1399 | dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r |
cc68a136 |
1400 | } else {\r |
b837b69b |
1401 | if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r |
cc68a136 |
1402 | if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r |
b837b69b |
1403 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
1404 | return Pico_mcd->word_ram[(a^1)&0x3fffe];\r |
1405 | dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r |
cc68a136 |
1406 | }\r |
1407 | return 0;//(u8) lastread_d;\r |
1408 | }\r |
1409 | unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r |
1410 | a&=0xffffff;\r |
1411 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
1412 | if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r |
b837b69b |
1413 | dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r |
cc68a136 |
1414 | } else {\r |
b837b69b |
1415 | if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r |
cc68a136 |
1416 | if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r |
b837b69b |
1417 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
1418 | return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
1419 | dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r |
cc68a136 |
1420 | }\r |
b837b69b |
1421 | return 0;\r |
cc68a136 |
1422 | }\r |
1423 | unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r |
1424 | a&=0xffffff;\r |
1425 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
1426 | if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r |
b837b69b |
1427 | dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r |
cc68a136 |
1428 | } else {\r |
b837b69b |
1429 | if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r |
cc68a136 |
1430 | if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r |
b837b69b |
1431 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
1432 | { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r |
1433 | dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r |
cc68a136 |
1434 | }\r |
b837b69b |
1435 | return 0;\r |
cc68a136 |
1436 | }\r |
1437 | #endif // EMU_M68K\r |
1438 | \r |