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buffering, PCM DMA, memcpy12bswap
[picodrive.git] / Pico / cd / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
b837b69b 4// (c) Copyright 2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9// A68K no longer supported here\r
10\r
11//#define __debug_io\r
12\r
13#include "../PicoInt.h"\r
14\r
15#include "../sound/sound.h"\r
16#include "../sound/ym2612.h"\r
17#include "../sound/sn76496.h"\r
18\r
cb4a513a 19#include "gfx_cd.h"\r
4f265db7 20#include "pcm.h"\r
cb4a513a 21\r
fa1e5e29 22#include "cell_map.c"\r
23\r
cc68a136 24typedef unsigned char u8;\r
25typedef unsigned short u16;\r
26typedef unsigned int u32;\r
27\r
28//#define __debug_io\r
29//#define __debug_io2\r
d1df8786 30//#define rdprintf dprintf\r
31#define rdprintf(...)\r
68cba51e 32//#define wrdprintf dprintf\r
913ef4b7 33#define wrdprintf(...)\r
cc68a136 34\r
35// -----------------------------------------------------------------\r
36\r
cc68a136 37\r
cb4a513a 38static u32 m68k_reg_read16(u32 a)\r
cc68a136 39{\r
40 u32 d=0;\r
41 a &= 0x3e;\r
672ad671 42 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 43\r
44 switch (a) {\r
672ad671 45 case 0:\r
c459aefd 46 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 47 goto end;\r
cc68a136 48 case 2:\r
672ad671 49 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
1cd356a3 50 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
cc68a136 51 goto end;\r
c459aefd 52 case 4:\r
53 d = Pico_mcd->s68k_regs[4]<<8;\r
54 goto end;\r
55 case 6:\r
913ef4b7 56 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 57 goto end;\r
cc68a136 58 case 8:\r
cc68a136 59 d = Read_CDC_Host(0);\r
60 goto end;\r
c459aefd 61 case 0xA:\r
fa1e5e29 62 dprintf("m68k FIXME: reserved read");\r
c459aefd 63 goto end;\r
cc68a136 64 case 0xC:\r
d1df8786 65 dprintf("m68k stopwatch timer read");\r
1cd356a3 66 d = Pico_mcd->m.timer_stopwatch >> 16;\r
67 goto end;\r
cc68a136 68 }\r
69\r
cc68a136 70 if (a < 0x30) {\r
71 // comm flag/cmd/status (0xE-0x2F)\r
72 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
73 goto end;\r
74 }\r
75\r
fa1e5e29 76 dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 77\r
78end:\r
79\r
672ad671 80 // dprintf("ret = %04x", d);\r
cc68a136 81 return d;\r
82}\r
83\r
cb4a513a 84static void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 85{\r
86 a &= 0x3f;\r
672ad671 87 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 88\r
89 switch (a) {\r
90 case 0:\r
672ad671 91 d &= 1;\r
cc68a136 92 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 93 return;\r
cc68a136 94 case 1:\r
672ad671 95 d &= 3;\r
51a902ae 96 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 97 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
98 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 99 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 100 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
51a902ae 101 Pico_mcd->m.state_flags&=~1;\r
672ad671 102 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 103 }\r
c459aefd 104 Pico_mcd->m.busreq = d;\r
105 return;\r
672ad671 106 case 2:\r
107 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
108 return;\r
cc68a136 109 case 3:\r
bf098bc5 110 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 111 d &= 0xc2;\r
112 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
113 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
114 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
115 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
116 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
117 d |= Pico_mcd->s68k_regs[3]&0x1d;\r
d0d47c5b 118 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
672ad671 119 Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
120 return;\r
c459aefd 121 case 6:\r
d1df8786 122 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 123 return;\r
124 case 7:\r
d1df8786 125 Pico_mcd->bios[0x72] = d;\r
913ef4b7 126 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 127 return;\r
cc68a136 128 case 0xe:\r
672ad671 129 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 130 Pico_mcd->s68k_regs[0xe] = d;\r
c459aefd 131 return;\r
672ad671 132 }\r
133\r
134 if ((a&0xf0) == 0x10) {\r
cc68a136 135 Pico_mcd->s68k_regs[a] = d;\r
672ad671 136 return;\r
cc68a136 137 }\r
138\r
fa1e5e29 139 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 140}\r
141\r
142\r
913ef4b7 143#define READ_FONT_DATA(basemask) \\r
144{ \\r
145 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
146 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
147 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
148 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
149 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
150 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
151}\r
152\r
cc68a136 153\r
cb4a513a 154static u32 s68k_reg_read16(u32 a)\r
cc68a136 155{\r
156 u32 d=0;\r
cc68a136 157\r
672ad671 158 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 159\r
160 switch (a) {\r
161 case 0:\r
cb4a513a 162 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
c459aefd 163 goto end;\r
672ad671 164 case 2:\r
165 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
bf098bc5 166 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
672ad671 167 goto end;\r
cc68a136 168 case 6:\r
169 d = CDC_Read_Reg();\r
170 goto end;\r
171 case 8:\r
cb4a513a 172 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 173 goto end;\r
174 case 0xC:\r
d1df8786 175 dprintf("s68k stopwatch timer read");\r
4f265db7 176 d = Pico_mcd->m.timer_stopwatch >> 16;\r
177 goto end;\r
d1df8786 178 case 0x30:\r
179 dprintf("s68k int3 timer read");\r
cc68a136 180 break;\r
181 case 0x34: // fader\r
182 d = 0; // no busy bit\r
183 goto end;\r
913ef4b7 184 case 0x50: // font data (check: Lunar 2, Silpheed)\r
185 READ_FONT_DATA(0x00100000);\r
186 goto end;\r
187 case 0x52:\r
188 READ_FONT_DATA(0x00010000);\r
189 goto end;\r
190 case 0x54:\r
191 READ_FONT_DATA(0x10000000);\r
192 goto end;\r
193 case 0x56:\r
194 READ_FONT_DATA(0x01000000);\r
195 goto end;\r
cc68a136 196 }\r
197\r
198 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
199\r
200end:\r
201\r
672ad671 202 // dprintf("ret = %04x", d);\r
cc68a136 203\r
204 return d;\r
205}\r
206\r
cb4a513a 207static void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 208{\r
672ad671 209 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 210\r
211 // TODO: review against Gens\r
212 switch (a) {\r
672ad671 213 case 2:\r
214 return; // only m68k can change WP\r
fa1e5e29 215 case 3: {\r
216 int dold = Pico_mcd->s68k_regs[3];\r
bf098bc5 217 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 218 d &= 0x1d;\r
d0d47c5b 219 if (d&4) {\r
fa1e5e29 220 d |= dold&0xc2;\r
221 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
222 if (!(dold & 4)) {\r
223 dprintf("wram mode 2M->1M");\r
224 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
225 }\r
d0d47c5b 226 } else {\r
227 d |= Pico_mcd->s68k_regs[3]&0xc3;\r
228 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
fa1e5e29 229 if (dold & 4) {\r
230 dprintf("wram mode 1M->2M");\r
231 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
232 }\r
d0d47c5b 233 }\r
672ad671 234 break;\r
fa1e5e29 235 }\r
cc68a136 236 case 4:\r
237 dprintf("s68k CDC dest: %x", d&7);\r
238 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
239 return;\r
240 case 5:\r
c459aefd 241 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 242 break;\r
243 case 7:\r
244 CDC_Write_Reg(d);\r
245 return;\r
246 case 0xa:\r
247 dprintf("s68k set CDC dma addr");\r
248 break;\r
d1df8786 249 case 0xc:\r
4f265db7 250 case 0xd:\r
d1df8786 251 dprintf("s68k set stopwatch timer");\r
4f265db7 252 Pico_mcd->m.timer_stopwatch = 0;\r
253 return;\r
1cd356a3 254 case 0xe:\r
255 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
256 Pico_mcd->m.timer_stopwatch = 0;\r
257 return;\r
d1df8786 258 case 0x31:\r
4f265db7 259 dprintf("s68k set int3 timer: %02x", d);\r
260 Pico_mcd->m.timer_int3 = d << 16;\r
d1df8786 261 break;\r
cc68a136 262 case 0x33: // IRQ mask\r
263 dprintf("s68k irq mask: %02x", d);\r
264 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
265 CDD_Export_Status();\r
cc68a136 266 }\r
267 break;\r
268 case 0x34: // fader\r
269 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
270 return;\r
672ad671 271 case 0x36:\r
272 return; // d/m bit is unsetable\r
273 case 0x37: {\r
274 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
275 Pico_mcd->s68k_regs[0x37] = d&7;\r
276 if ((d&4) && !(d_old&4)) {\r
cc68a136 277 CDD_Export_Status();\r
cc68a136 278 }\r
672ad671 279 return;\r
280 }\r
cc68a136 281 case 0x4b:\r
282 Pico_mcd->s68k_regs[a] = (u8) d;\r
283 CDD_Import_Command();\r
284 return;\r
285 }\r
286\r
1cd356a3 287 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 288 {\r
fa1e5e29 289 dprintf("s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 290 return;\r
291 }\r
292\r
293 Pico_mcd->s68k_regs[a] = (u8) d;\r
294}\r
295\r
296\r
297\r
fa1e5e29 298static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 299{\r
300 u32 d=0;\r
301\r
672ad671 302 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 303 d=m68k_reg_read16(a);\r
672ad671 304 goto end;\r
305 }\r
cc68a136 306\r
fa1e5e29 307 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 308\r
309end:\r
310 return d;\r
311}\r
312\r
cc68a136 313\r
fa1e5e29 314static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 315{\r
cb4a513a 316 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 317\r
fa1e5e29 318 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 319}\r
320\r
cc68a136 321\r
fa1e5e29 322#undef _ASM_MEMORY_C\r
323#include "../MemoryCmn.c"\r
324\r
cc68a136 325\r
326// -----------------------------------------------------------------\r
327// Read Rom and read Ram\r
328\r
329u8 PicoReadM68k8(u32 a)\r
330{\r
331 u32 d=0;\r
332\r
333 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
334\r
335 a&=0xffffff;\r
336\r
337 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
338\r
339 // prg RAM\r
340 if ((a&0xfe0000)==0x020000) {\r
672ad671 341 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 342 d = *(prg_bank+((a^1)&0x1ffff));\r
343 goto end;\r
344 }\r
345\r
b837b69b 346#if 0\r
347 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
348 {\r
349 int i;\r
350 FILE *ff;\r
351 unsigned short *ram = (unsigned short *) Pico.ram;\r
352 // unswap and dump RAM\r
353 for (i = 0; i < 0x10000/2; i++)\r
354 ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
355 ff = fopen("ram.bin", "wb");\r
356 fwrite(ram, 1, 0x10000, ff);\r
357 fclose(ff);\r
358 exit(0);\r
359 }\r
360#endif\r
361\r
d0d47c5b 362 // word RAM\r
363 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 364 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
d0d47c5b 365 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 366 int bank = Pico_mcd->s68k_regs[3]&1;\r
367 if (a >= 0x220000)\r
368 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
369 else a &= 0x1ffff;\r
370 d = Pico_mcd->word_ram1M[bank][a^1];\r
d0d47c5b 371 } else {\r
372 // allow access in any mode, like Gens does\r
fa1e5e29 373 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 374 }\r
913ef4b7 375 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 376 goto end;\r
377 }\r
378\r
cc68a136 379 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
380\r
c459aefd 381 if ((a&0xffffc0)==0xa12000)\r
382 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 383\r
cc68a136 384 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
385\r
c459aefd 386 if ((a&0xffffc0)==0xa12000)\r
387 rdprintf("ret = %02x", (u8)d);\r
672ad671 388\r
cc68a136 389 end:\r
390\r
391#ifdef __debug_io\r
392 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
393#endif\r
394 return (u8)d;\r
395}\r
396\r
ab0607f7 397\r
cc68a136 398u16 PicoReadM68k16(u32 a)\r
399{\r
400 u16 d=0;\r
401\r
402 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
403\r
404 a&=0xfffffe;\r
405\r
406 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
407\r
408 // prg RAM\r
409 if ((a&0xfe0000)==0x020000) {\r
672ad671 410 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 411 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
412 goto end;\r
413 }\r
414\r
d0d47c5b 415 // word RAM\r
416 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 417 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
d0d47c5b 418 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 419 int bank = Pico_mcd->s68k_regs[3]&1;\r
420 if (a >= 0x220000)\r
421 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
422 else a &= 0x1fffe;\r
423 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
0a051f55 424//d = 0xaaaa;\r
d0d47c5b 425 } else {\r
426 // allow access in any mode, like Gens does\r
fa1e5e29 427 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 428 }\r
913ef4b7 429 wrdprintf("ret = %04x", d);\r
d0d47c5b 430 goto end;\r
431 }\r
432\r
c459aefd 433 if ((a&0xffffc0)==0xa12000)\r
434 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 435\r
cc68a136 436 d = (u16)OtherRead16(a, 16);\r
437\r
c459aefd 438 if ((a&0xffffc0)==0xa12000)\r
439 rdprintf("ret = %04x", d);\r
672ad671 440\r
cc68a136 441 end:\r
442\r
443#ifdef __debug_io\r
444 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
445#endif\r
446 return d;\r
447}\r
448\r
ab0607f7 449\r
cc68a136 450u32 PicoReadM68k32(u32 a)\r
451{\r
452 u32 d=0;\r
453\r
454 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
455\r
456 a&=0xfffffe;\r
457\r
458 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
459\r
460 // prg RAM\r
461 if ((a&0xfe0000)==0x020000) {\r
672ad671 462 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 463 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
464 d = (pm[0]<<16)|pm[1];\r
465 goto end;\r
466 }\r
467\r
d0d47c5b 468 // word RAM\r
469 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 470 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
d0d47c5b 471 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 472 int bank = Pico_mcd->s68k_regs[3]&1;\r
473 if (a >= 0x220000) { // cell arranged\r
474 u32 a1, a2;\r
475 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
476 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
477 else a2 = a1 + 2;\r
478 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
479 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 480 } else {\r
fa1e5e29 481 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
bf098bc5 482 }\r
d0d47c5b 483 } else {\r
484 // allow access in any mode, like Gens does\r
fa1e5e29 485 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 486 }\r
913ef4b7 487 wrdprintf("ret = %08x", d);\r
d0d47c5b 488 goto end;\r
489 }\r
490\r
c459aefd 491 if ((a&0xffffc0)==0xa12000)\r
492 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 493\r
cc68a136 494 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
495\r
c459aefd 496 if ((a&0xffffc0)==0xa12000)\r
497 rdprintf("ret = %08x", d);\r
672ad671 498\r
cc68a136 499 end:\r
500#ifdef __debug_io\r
501 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
502#endif\r
503 return d;\r
504}\r
505\r
ab0607f7 506\r
cc68a136 507// -----------------------------------------------------------------\r
508// Write Ram\r
509\r
510void PicoWriteM68k8(u32 a,u8 d)\r
511{\r
512#ifdef __debug_io\r
513 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
514#endif\r
515 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
516 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
517\r
518\r
ab0607f7 519 if ((a&0xe00000)==0xe00000) { // Ram\r
520 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
521 return;\r
522 }\r
cc68a136 523\r
524 a&=0xffffff;\r
525\r
526 // prg RAM\r
527 if ((a&0xfe0000)==0x020000) {\r
672ad671 528 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 529 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 530 return;\r
531 }\r
532\r
d0d47c5b 533 // word RAM\r
534 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 535 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 536 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 537 int bank = Pico_mcd->s68k_regs[3]&1;\r
538 if (a >= 0x220000)\r
539 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
540 else a &= 0x1ffff;\r
541 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 542 } else {\r
543 // allow access in any mode, like Gens does\r
fa1e5e29 544 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 545 }\r
546 return;\r
547 }\r
548\r
c459aefd 549 if ((a&0xffffc0)==0xa12000)\r
550 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
672ad671 551\r
cc68a136 552 OtherWrite8(a,d,8);\r
553}\r
554\r
ab0607f7 555\r
cc68a136 556void PicoWriteM68k16(u32 a,u16 d)\r
557{\r
558#ifdef __debug_io\r
559 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
560#endif\r
cc68a136 561 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
562\r
ab0607f7 563 if ((a&0xe00000)==0xe00000) { // Ram\r
564 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
565 return;\r
566 }\r
cc68a136 567\r
568 a&=0xfffffe;\r
569\r
570 // prg RAM\r
571 if ((a&0xfe0000)==0x020000) {\r
672ad671 572 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 573 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
574 return;\r
575 }\r
576\r
d0d47c5b 577 // word RAM\r
578 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 579 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 580 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 581 int bank = Pico_mcd->s68k_regs[3]&1;\r
582 if (a >= 0x220000)\r
583 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
584 else a &= 0x1fffe;\r
585 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 586 } else {\r
587 // allow access in any mode, like Gens does\r
fa1e5e29 588 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 589 }\r
590 return;\r
591 }\r
592\r
c459aefd 593 if ((a&0xffffc0)==0xa12000)\r
594 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
cc68a136 595\r
596 OtherWrite16(a,d);\r
597}\r
598\r
ab0607f7 599\r
cc68a136 600void PicoWriteM68k32(u32 a,u32 d)\r
601{\r
602#ifdef __debug_io\r
603 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
604#endif\r
605\r
606 if ((a&0xe00000)==0xe00000)\r
607 {\r
608 // Ram:\r
609 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
610 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
611 return;\r
612 }\r
613\r
614 a&=0xfffffe;\r
615\r
616 // prg RAM\r
617 if ((a&0xfe0000)==0x020000) {\r
672ad671 618 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 619 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
620 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
621 return;\r
622 }\r
623\r
672ad671 624 // word RAM\r
d0d47c5b 625 if ((a&0xfc0000)==0x200000) {\r
626 if (d != 0) // don't log clears\r
913ef4b7 627 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 628 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 629 int bank = Pico_mcd->s68k_regs[3]&1;\r
630 if (a >= 0x220000) { // cell arranged\r
631 u32 a1, a2;\r
632 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
633 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
634 else a2 = a1 + 2;\r
635 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
636 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 637 } else {\r
fa1e5e29 638 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
639 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 640 }\r
d0d47c5b 641 } else {\r
642 // allow access in any mode, like Gens does\r
fa1e5e29 643 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 644 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
645 }\r
672ad671 646 return;\r
d0d47c5b 647 }\r
672ad671 648\r
c459aefd 649 if ((a&0xffffc0)==0xa12000)\r
650 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
cc68a136 651\r
652 OtherWrite16(a, (u16)(d>>16));\r
653 OtherWrite16(a+2,(u16)d);\r
654}\r
655\r
656\r
657// -----------------------------------------------------------------\r
658\r
659\r
660u8 PicoReadS68k8(u32 a)\r
661{\r
662 u32 d=0;\r
663\r
664 a&=0xffffff;\r
665\r
666 // prg RAM\r
667 if (a < 0x80000) {\r
668 d = *(Pico_mcd->prg_ram+(a^1));\r
669 goto end;\r
670 }\r
671\r
672 // regs\r
673 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 674 a &= 0x1ff;\r
675 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 676 if (a >= 0x58 && a < 0x68)\r
cb4a513a 677 d = gfx_cd_read(a&~1);\r
678 else d = s68k_reg_read16(a&~1);\r
679 if ((a&1)==0) d>>=8;\r
c459aefd 680 rdprintf("ret = %02x", (u8)d);\r
cc68a136 681 goto end;\r
682 }\r
683\r
d0d47c5b 684 // word RAM (2M area)\r
685 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 686 // test: batman returns\r
913ef4b7 687 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 688 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
689 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
690 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
691 if (a&1) d &= 0x0f;\r
692 else d >>= 4;\r
693 dprintf("FIXME: decode");\r
d0d47c5b 694 } else {\r
695 // allow access in any mode, like Gens does\r
fa1e5e29 696 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 697 }\r
913ef4b7 698 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 699 goto end;\r
700 }\r
701\r
702 // word RAM (1M area)\r
68cba51e 703 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 704 int bank;\r
913ef4b7 705 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 706// if (!(Pico_mcd->s68k_regs[3]&4))\r
707// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 708 bank = !(Pico_mcd->s68k_regs[3]&1);\r
709 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 710 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 711 goto end;\r
712 }\r
713\r
4f265db7 714 // PCM\r
715 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 716 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 717 a &= 0x7fff;\r
718 if (a >= 0x2000)\r
719 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
720 else if (a >= 0x20) {\r
721 a &= 0x1e;\r
722 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
723 if (a & 2) d >>= 8;\r
724 }\r
725 dprintf("ret = %02x", (u8)d);\r
726 goto end;\r
727 }\r
728\r
ab0607f7 729 // bram\r
730 if ((a&0xff0000)==0xfe0000) {\r
731 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
732 goto end;\r
733 }\r
734\r
cc68a136 735 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
736\r
737 end:\r
738\r
739#ifdef __debug_io2\r
740 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
741#endif\r
742 return (u8)d;\r
743}\r
744\r
ab0607f7 745\r
cc68a136 746u16 PicoReadS68k16(u32 a)\r
747{\r
4f265db7 748 u32 d=0;\r
cc68a136 749\r
750 a&=0xfffffe;\r
751\r
752 // prg RAM\r
753 if (a < 0x80000) {\r
754 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
755 goto end;\r
756 }\r
757\r
758 // regs\r
759 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 760 a &= 0x1fe;\r
761 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 762 if (a >= 0x58 && a < 0x68)\r
cb4a513a 763 d = gfx_cd_read(a);\r
764 else d = s68k_reg_read16(a);\r
c459aefd 765 rdprintf("ret = %04x", d);\r
cc68a136 766 goto end;\r
767 }\r
768\r
d0d47c5b 769 // word RAM (2M area)\r
770 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 771 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 772 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
773 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
774 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
775 d |= d << 4; d &= ~0xf0;\r
776 dprintf("FIXME: decode");\r
d0d47c5b 777 } else {\r
778 // allow access in any mode, like Gens does\r
fa1e5e29 779 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 780 }\r
913ef4b7 781 wrdprintf("ret = %04x", d);\r
d0d47c5b 782 goto end;\r
783 }\r
784\r
785 // word RAM (1M area)\r
68cba51e 786 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 787 int bank;\r
913ef4b7 788 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 789// if (!(Pico_mcd->s68k_regs[3]&4))\r
790// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 791 bank = !(Pico_mcd->s68k_regs[3]&1);\r
792 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 793 wrdprintf("ret = %04x", d);\r
ab0607f7 794 goto end;\r
795 }\r
796\r
797 // bram\r
798 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 799 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 800 a = (a>>1)&0x1fff;\r
4f265db7 801 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
ab0607f7 802 d|= Pico_mcd->bram[a++] << 8;\r
803 dprintf("ret = %04x", d);\r
d0d47c5b 804 goto end;\r
805 }\r
806\r
4f265db7 807 // PCM\r
808 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 809 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 810 a &= 0x7fff;\r
811 if (a >= 0x2000)\r
812 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
813 else if (a >= 0x20) {\r
814 a &= 0x1e;\r
815 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
816 if (a & 2) d >>= 8;\r
817 }\r
818 dprintf("ret = %04x", d);\r
819 goto end;\r
820 }\r
821\r
cc68a136 822 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
823\r
824 end:\r
825\r
826#ifdef __debug_io2\r
827 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
828#endif\r
829 return d;\r
830}\r
831\r
ab0607f7 832\r
cc68a136 833u32 PicoReadS68k32(u32 a)\r
834{\r
835 u32 d=0;\r
836\r
837 a&=0xfffffe;\r
838\r
839 // prg RAM\r
840 if (a < 0x80000) {\r
841 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
842 d = (pm[0]<<16)|pm[1];\r
843 goto end;\r
844 }\r
845\r
846 // regs\r
847 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 848 a &= 0x1fe;\r
849 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 850 if (a >= 0x58 && a < 0x68)\r
cb4a513a 851 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
852 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 853 rdprintf("ret = %08x", d);\r
cc68a136 854 goto end;\r
855 }\r
856\r
d0d47c5b 857 // word RAM (2M area)\r
858 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 859 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 860 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
861 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
862 a >>= 1;\r
863 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
864 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
865 d |= d << 4; d &= 0x0f0f0f0f;\r
866 dprintf("FIXME: decode");\r
d0d47c5b 867 } else {\r
868 // allow access in any mode, like Gens does\r
fa1e5e29 869 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 870 }\r
913ef4b7 871 wrdprintf("ret = %08x", d);\r
d0d47c5b 872 goto end;\r
873 }\r
874\r
875 // word RAM (1M area)\r
68cba51e 876 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 877 int bank;\r
913ef4b7 878 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 879// if (!(Pico_mcd->s68k_regs[3]&4))\r
880// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 881 bank = !(Pico_mcd->s68k_regs[3]&1);\r
882 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 883 wrdprintf("ret = %08x", d);\r
ab0607f7 884 goto end;\r
885 }\r
886\r
4f265db7 887 // PCM\r
888 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 889 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 890 a &= 0x7fff;\r
891 if (a >= 0x2000) {\r
892 a >>= 1;\r
893 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
894 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
895 } else if (a >= 0x20) {\r
896 a &= 0x1e;\r
897 if (a & 2) {\r
898 a >>= 2;\r
899 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
900 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
901 } else {\r
902 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
903 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
904 }\r
905 }\r
906 dprintf("ret = %08x", d);\r
907 goto end;\r
908 }\r
909\r
ab0607f7 910 // bram\r
911 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 912 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 913 a = (a>>1)&0x1fff;\r
914 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
915 d|= Pico_mcd->bram[a++] << 24;\r
916 d|= Pico_mcd->bram[a++];\r
917 d|= Pico_mcd->bram[a++] << 8;\r
918 dprintf("ret = %08x", d);\r
d0d47c5b 919 goto end;\r
920 }\r
921\r
cc68a136 922 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
923\r
924 end:\r
925\r
926#ifdef __debug_io2\r
927 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
928#endif\r
929 return d;\r
930}\r
931\r
ab0607f7 932\r
0a051f55 933/* check: jaguar xj 220 (draws entire world using decode) */\r
934static void decode_write8(u32 a, u8 d, int r3)\r
935{\r
936 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
937 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
938\r
939 //if ((a & 0x3ffff) < 0x28000) return;\r
940 //return;\r
941\r
942 r3 &= 0x18;\r
943 d &= 0x0f;\r
944 if (!(a&1)) d <<= 4;\r
945\r
946 //dprintf("FIXME: decode, r3 = %02x", r3);\r
947\r
948 if (r3 == 8) {\r
949 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
950 } else if (r3 > 8) {\r
951 if (d) goto do_it;\r
952 } else {\r
953 goto do_it;\r
954 }\r
955\r
956 return;\r
957do_it:\r
958 *pd = d | (*pd & oldmask);\r
959}\r
960\r
961\r
962static void decode_write16(u32 a, u16 d, int r3)\r
963{\r
964 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
965\r
966 //if ((a & 0x3ffff) < 0x28000) return;\r
967\r
968 r3 &= 0x18;\r
969 d &= 0x0f0f;\r
970 d |= d >> 4;\r
971\r
972 if (r3 == 8) {\r
973 u8 dold = *pd;\r
974 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
975 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
976 *pd = dold;\r
977 } else if (r3 > 8) {\r
978 u8 dold = *pd;\r
979 if (!(d & 0xf0)) d |= dold & 0xf0;\r
980 if (!(d & 0x0f)) d |= dold & 0x0f;\r
981 *pd = d;\r
982 } else {\r
983 *pd = d;\r
984 }\r
985\r
986 //dprintf("FIXME: decode");\r
987}\r
988\r
989\r
cc68a136 990// -----------------------------------------------------------------\r
991\r
992void PicoWriteS68k8(u32 a,u8 d)\r
993{\r
994#ifdef __debug_io2\r
995 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
996#endif\r
997\r
998 a&=0xffffff;\r
999\r
1000 // prg RAM\r
1001 if (a < 0x80000) {\r
1002 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
1003 *pm=d;\r
1004 return;\r
1005 }\r
1006\r
1007 // regs\r
1008 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1009 a &= 0x1ff;\r
1010 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1011 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1012 gfx_cd_write(a&~1, (d<<8)|d);\r
1013 else s68k_reg_write8(a,d);\r
cc68a136 1014 return;\r
1015 }\r
1016\r
d0d47c5b 1017 // word RAM (2M area)\r
1018 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1019 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1020 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1021 if (r3 & 4) { // 1M decode mode?\r
1022 decode_write8(a, d, r3);\r
d0d47c5b 1023 } else {\r
1024 // allow access in any mode, like Gens does\r
fa1e5e29 1025 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1026 }\r
1027 return;\r
1028 }\r
1029\r
1030 // word RAM (1M area)\r
68cba51e 1031 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1032 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1033 int bank;\r
d0d47c5b 1034 if (d)\r
913ef4b7 1035 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1036// if (!(Pico_mcd->s68k_regs[3]&4))\r
1037// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1038 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1039 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1040 return;\r
1041 }\r
1042\r
4f265db7 1043 // PCM\r
1044 if ((a&0xff8000)==0xff0000) {\r
1045 a &= 0x7fff;\r
1046 if (a >= 0x2000)\r
1047 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1048 else if (a < 0x12)\r
1049 pcm_write(a>>1, d);\r
1050 return;\r
1051 }\r
1052\r
ab0607f7 1053 // bram\r
1054 if ((a&0xff0000)==0xfe0000) {\r
1055 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1056 SRam.changed = 1;\r
1057 return;\r
1058 }\r
1059\r
cc68a136 1060 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1061}\r
1062\r
ab0607f7 1063\r
cc68a136 1064void PicoWriteS68k16(u32 a,u16 d)\r
1065{\r
1066#ifdef __debug_io2\r
1067 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1068#endif\r
1069\r
1070 a&=0xfffffe;\r
1071\r
1072 // prg RAM\r
1073 if (a < 0x80000) {\r
1074 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1075 return;\r
1076 }\r
1077\r
1078 // regs\r
1079 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1080 a &= 0x1fe;\r
1081 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1082 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1083 gfx_cd_write(a, d);\r
1084 else {\r
1cd356a3 1085 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1086 Pico_mcd->s68k_regs[0xf] = d;\r
1087 return;\r
1088 }\r
cb4a513a 1089 s68k_reg_write8(a, d>>8);\r
1090 s68k_reg_write8(a+1,d&0xff);\r
1091 }\r
cc68a136 1092 return;\r
1093 }\r
1094\r
d0d47c5b 1095 // word RAM (2M area)\r
1096 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1097 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1098 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1099 if (r3 & 4) { // 1M decode mode?\r
1100 decode_write16(a, d, r3);\r
d0d47c5b 1101 } else {\r
1102 // allow access in any mode, like Gens does\r
fa1e5e29 1103 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1104 }\r
1105 return;\r
1106 }\r
1107\r
1108 // word RAM (1M area)\r
68cba51e 1109 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1110 int bank;\r
d0d47c5b 1111 if (d)\r
913ef4b7 1112 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1113// if (!(Pico_mcd->s68k_regs[3]&4))\r
1114// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1115 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1116 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1117 return;\r
1118 }\r
1119\r
4f265db7 1120 // PCM\r
1121 if ((a&0xff8000)==0xff0000) {\r
1122 a &= 0x7fff;\r
1123 if (a >= 0x2000)\r
1124 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1125 else if (a < 0x12)\r
1126 pcm_write(a>>1, d & 0xff);\r
1127 return;\r
1128 }\r
1129\r
ab0607f7 1130 // bram\r
1131 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1132 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1133 a = (a>>1)&0x1fff;\r
1134 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1135 Pico_mcd->bram[a++] = d >> 8;\r
1136 SRam.changed = 1;\r
1137 return;\r
1138 }\r
1139\r
cc68a136 1140 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1141}\r
1142\r
ab0607f7 1143\r
cc68a136 1144void PicoWriteS68k32(u32 a,u32 d)\r
1145{\r
1146#ifdef __debug_io2\r
1147 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1148#endif\r
1149\r
1150 a&=0xfffffe;\r
1151\r
1152 // prg RAM\r
1153 if (a < 0x80000) {\r
1154 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1155 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1156 return;\r
1157 }\r
1158\r
1159 // regs\r
1160 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1161 a &= 0x1fe;\r
1162 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1163 if (a >= 0x58 && a < 0x68) {\r
cb4a513a 1164 gfx_cd_write(a, d>>16);\r
1165 gfx_cd_write(a+2, d&0xffff);\r
1166 } else {\r
1167 s68k_reg_write8(a, d>>24);\r
1168 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1169 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1170 s68k_reg_write8(a+3, d &0xff);\r
1171 }\r
cc68a136 1172 return;\r
1173 }\r
1174\r
d0d47c5b 1175 // word RAM (2M area)\r
1176 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1177 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1178 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1179 if (r3 & 4) { // 1M decode mode?\r
1180 decode_write16(a , d >> 16, r3);\r
1181 decode_write16(a+2, d , r3);\r
d0d47c5b 1182 } else {\r
1183 // allow access in any mode, like Gens does\r
fa1e5e29 1184 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1185 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1186 }\r
1187 return;\r
1188 }\r
1189\r
1190 // word RAM (1M area)\r
68cba51e 1191 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1192 int bank;\r
1193 u16 *pm;\r
d0d47c5b 1194 if (d)\r
913ef4b7 1195 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1196// if (!(Pico_mcd->s68k_regs[3]&4))\r
1197// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1198 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1199 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1200 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1201 return;\r
1202 }\r
ab0607f7 1203\r
4f265db7 1204 // PCM\r
1205 if ((a&0xff8000)==0xff0000) {\r
1206 a &= 0x7fff;\r
1207 if (a >= 0x2000) {\r
1208 a >>= 1;\r
1209 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1210 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1211 } else if (a < 0x12) {\r
1212 a >>= 1;\r
1213 pcm_write(a, (d>>16) & 0xff);\r
1214 pcm_write(a+1, d & 0xff);\r
1215 }\r
1216 return;\r
1217 }\r
1218\r
ab0607f7 1219 // bram\r
1220 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1221 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1222 a = (a>>1)&0x1fff;\r
1223 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1224 Pico_mcd->bram[a++] = d >> 24;\r
1225 Pico_mcd->bram[a++] = d;\r
1226 Pico_mcd->bram[a++] = d >> 8;\r
1227 SRam.changed = 1;\r
1228 return;\r
1229 }\r
1230\r
cc68a136 1231 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1232}\r
1233\r
1234\r
1235\r
1236// -----------------------------------------------------------------\r
1237\r
b837b69b 1238\r
1239#if defined(EMU_C68K)\r
1240static __inline int PicoMemBaseM68k(u32 pc)\r
1241{\r
fa1e5e29 1242 if ((pc&0xe00000)==0xe00000)\r
1243 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1244\r
1245 if (pc < 0x20000)\r
fa1e5e29 1246 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1247\r
1248 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1249 {\r
fa1e5e29 1250 if (!(Pico_mcd->s68k_regs[3]&4))\r
1251 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1252 if (pc < 0x220000) {\r
1253 int bank = (Pico_mcd->s68k_regs[3]&1);\r
1254 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1255 }\r
b837b69b 1256 }\r
1257\r
fa1e5e29 1258 // Error - Program Counter is invalid\r
1259 dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
1260\r
1261 return (int)Pico_mcd->bios;\r
b837b69b 1262}\r
1263\r
1264\r
1265static u32 PicoCheckPcM68k(u32 pc)\r
1266{\r
1267 pc-=PicoCpu.membase; // Get real pc\r
1268 pc&=0xfffffe;\r
1269\r
1270 PicoCpu.membase=PicoMemBaseM68k(pc);\r
1271\r
1272 return PicoCpu.membase+pc;\r
1273}\r
1274\r
1275\r
1276static __inline int PicoMemBaseS68k(u32 pc)\r
1277{\r
fa1e5e29 1278 if (pc < 0x80000) // PRG RAM\r
1279 return (int)Pico_mcd->prg_ram;\r
b837b69b 1280\r
fa1e5e29 1281 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1282 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1283\r
1284 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
1285 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1286 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1287 }\r
1288\r
fa1e5e29 1289 // Error - Program Counter is invalid\r
1290 dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
1291\r
1292 return (int)Pico_mcd->prg_ram;\r
b837b69b 1293}\r
1294\r
1295\r
1296static u32 PicoCheckPcS68k(u32 pc)\r
1297{\r
1298 pc-=PicoCpuS68k.membase; // Get real pc\r
1299 pc&=0xfffffe;\r
1300\r
1301 PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
1302\r
1303 return PicoCpuS68k.membase+pc;\r
1304}\r
1305#endif\r
1306\r
1307\r
1308void PicoMemSetupCD()\r
1309{\r
1310 dprintf("PicoMemSetupCD()");\r
1311#ifdef EMU_C68K\r
1312 // Setup m68k memory callbacks:\r
1313 PicoCpu.checkpc=PicoCheckPcM68k;\r
1314 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
1315 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
1316 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
1317 PicoCpu.write8 =PicoWriteM68k8;\r
1318 PicoCpu.write16=PicoWriteM68k16;\r
1319 PicoCpu.write32=PicoWriteM68k32;\r
1320 // s68k\r
1321 PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
1322 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
1323 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
1324 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
1325 PicoCpuS68k.write8 =PicoWriteS68k8;\r
1326 PicoCpuS68k.write16=PicoWriteS68k16;\r
1327 PicoCpuS68k.write32=PicoWriteS68k32;\r
1328#endif\r
1329}\r
1330\r
1331\r
cc68a136 1332#ifdef EMU_M68K\r
1333unsigned char PicoReadCD8w (unsigned int a) {\r
1334 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1335}\r
1336unsigned short PicoReadCD16w(unsigned int a) {\r
1337 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1338}\r
1339unsigned int PicoReadCD32w(unsigned int a) {\r
1340 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1341}\r
1342void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1343 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1344}\r
1345void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1346 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1347}\r
1348void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1349 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1350}\r
1351\r
1352// these are allowed to access RAM\r
1353unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
1354 a&=0xffffff;\r
1355 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1356 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1357 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1358 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1359 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1360 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1361 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1362 }\r
1363 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1364 } else {\r
cc68a136 1365 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1366 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1367 if((a&0xfc0000)==0x200000) { // word RAM\r
1368 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1369 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1370 else if (a < 0x220000) {\r
1371 int bank = Pico_mcd->s68k_regs[3]&1;\r
1372 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1373 }\r
1374 }\r
1375 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1376 }\r
1377 return 0;//(u8) lastread_d;\r
1378}\r
1379unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
1380 a&=0xffffff;\r
1381 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1382 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1383 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1384 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1385 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1386 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1387 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1388 }\r
1389 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1390 } else {\r
cc68a136 1391 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1392 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1393 if((a&0xfc0000)==0x200000) { // word RAM\r
1394 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1395 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1396 else if (a < 0x220000) {\r
1397 int bank = Pico_mcd->s68k_regs[3]&1;\r
1398 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1399 }\r
1400 }\r
1401 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1402 }\r
b837b69b 1403 return 0;\r
cc68a136 1404}\r
1405unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
fa1e5e29 1406 u16 *pm;\r
cc68a136 1407 a&=0xffffff;\r
1408 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1409 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1410 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1411 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1412 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1413 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1414 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1415 return (pm[0]<<16)|pm[1];\r
1416 }\r
1417 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1418 } else {\r
cc68a136 1419 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1420 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1421 if((a&0xfc0000)==0x200000) { // word RAM\r
1422 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1423 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1424 else if (a < 0x220000) {\r
1425 int bank = Pico_mcd->s68k_regs[3]&1;\r
1426 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1427 return (pm[0]<<16)|pm[1];\r
1428 }\r
1429 }\r
1430 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1431 }\r
b837b69b 1432 return 0;\r
cc68a136 1433}\r
1434#endif // EMU_M68K\r
1435\r
fast MegaDrive/MegaCD/32X emulator