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[picodrive.git] / Pico / cd / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
b837b69b 4// (c) Copyright 2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9// A68K no longer supported here\r
10\r
11//#define __debug_io\r
12\r
13#include "../PicoInt.h"\r
14\r
15#include "../sound/sound.h"\r
16#include "../sound/ym2612.h"\r
17#include "../sound/sn76496.h"\r
18\r
cb4a513a 19#include "gfx_cd.h"\r
4f265db7 20#include "pcm.h"\r
cb4a513a 21\r
fa1e5e29 22#include "cell_map.c"\r
23\r
cc68a136 24typedef unsigned char u8;\r
25typedef unsigned short u16;\r
26typedef unsigned int u32;\r
27\r
28//#define __debug_io\r
29//#define __debug_io2\r
66fdc0f0 30\r
d1df8786 31//#define rdprintf dprintf\r
32#define rdprintf(...)\r
68cba51e 33//#define wrdprintf dprintf\r
913ef4b7 34#define wrdprintf(...)\r
cc68a136 35\r
36// -----------------------------------------------------------------\r
37\r
cc68a136 38\r
cb4a513a 39static u32 m68k_reg_read16(u32 a)\r
cc68a136 40{\r
41 u32 d=0;\r
42 a &= 0x3e;\r
672ad671 43 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 44\r
45 switch (a) {\r
672ad671 46 case 0:\r
c459aefd 47 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 48 goto end;\r
cc68a136 49 case 2:\r
672ad671 50 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
1cd356a3 51 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
cc68a136 52 goto end;\r
c459aefd 53 case 4:\r
54 d = Pico_mcd->s68k_regs[4]<<8;\r
55 goto end;\r
56 case 6:\r
913ef4b7 57 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 58 goto end;\r
cc68a136 59 case 8:\r
cc68a136 60 d = Read_CDC_Host(0);\r
61 goto end;\r
c459aefd 62 case 0xA:\r
fa1e5e29 63 dprintf("m68k FIXME: reserved read");\r
c459aefd 64 goto end;\r
cc68a136 65 case 0xC:\r
d1df8786 66 dprintf("m68k stopwatch timer read");\r
1cd356a3 67 d = Pico_mcd->m.timer_stopwatch >> 16;\r
68 goto end;\r
cc68a136 69 }\r
70\r
cc68a136 71 if (a < 0x30) {\r
72 // comm flag/cmd/status (0xE-0x2F)\r
73 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
74 goto end;\r
75 }\r
76\r
fa1e5e29 77 dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 78\r
79end:\r
80\r
672ad671 81 // dprintf("ret = %04x", d);\r
cc68a136 82 return d;\r
83}\r
84\r
cb4a513a 85static void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 86{\r
87 a &= 0x3f;\r
672ad671 88 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 89\r
90 switch (a) {\r
91 case 0:\r
672ad671 92 d &= 1;\r
cc68a136 93 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 94 return;\r
cc68a136 95 case 1:\r
672ad671 96 d &= 3;\r
51a902ae 97 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 98 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
99 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 100 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 101 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
51a902ae 102 Pico_mcd->m.state_flags&=~1;\r
672ad671 103 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 104 }\r
c459aefd 105 Pico_mcd->m.busreq = d;\r
106 return;\r
672ad671 107 case 2:\r
108 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
109 return;\r
66fdc0f0 110 case 3: {\r
111 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
bf098bc5 112 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 113 d &= 0xc2;\r
66fdc0f0 114 if ((dold>>6) != ((d>>6)&3))\r
672ad671 115 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
116 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
117 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
118 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 119 if (dold & 4) {\r
120 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
121 } else {\r
122 //dold &= ~2; // ??\r
123 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
124 }\r
125 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
126\r
127/*\r
128 d |= Pico_mcd->s68k_regs[3]&0x1d;\r
129 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
130 Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
131*/\r
672ad671 132 return;\r
66fdc0f0 133 }\r
c459aefd 134 case 6:\r
d1df8786 135 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 136 return;\r
137 case 7:\r
d1df8786 138 Pico_mcd->bios[0x72] = d;\r
913ef4b7 139 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 140 return;\r
cc68a136 141 case 0xe:\r
672ad671 142 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 143 Pico_mcd->s68k_regs[0xe] = d;\r
c459aefd 144 return;\r
672ad671 145 }\r
146\r
147 if ((a&0xf0) == 0x10) {\r
cc68a136 148 Pico_mcd->s68k_regs[a] = d;\r
672ad671 149 return;\r
cc68a136 150 }\r
151\r
fa1e5e29 152 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 153}\r
154\r
155\r
913ef4b7 156#define READ_FONT_DATA(basemask) \\r
157{ \\r
158 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
159 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
160 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
161 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
162 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
163 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
164}\r
165\r
cc68a136 166\r
cb4a513a 167static u32 s68k_reg_read16(u32 a)\r
cc68a136 168{\r
169 u32 d=0;\r
cc68a136 170\r
672ad671 171 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 172\r
173 switch (a) {\r
174 case 0:\r
cb4a513a 175 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
c459aefd 176 goto end;\r
672ad671 177 case 2:\r
178 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
bf098bc5 179 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
672ad671 180 goto end;\r
cc68a136 181 case 6:\r
182 d = CDC_Read_Reg();\r
183 goto end;\r
184 case 8:\r
cb4a513a 185 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 186 goto end;\r
187 case 0xC:\r
d1df8786 188 dprintf("s68k stopwatch timer read");\r
4f265db7 189 d = Pico_mcd->m.timer_stopwatch >> 16;\r
190 goto end;\r
d1df8786 191 case 0x30:\r
192 dprintf("s68k int3 timer read");\r
cc68a136 193 break;\r
194 case 0x34: // fader\r
195 d = 0; // no busy bit\r
196 goto end;\r
913ef4b7 197 case 0x50: // font data (check: Lunar 2, Silpheed)\r
198 READ_FONT_DATA(0x00100000);\r
199 goto end;\r
200 case 0x52:\r
201 READ_FONT_DATA(0x00010000);\r
202 goto end;\r
203 case 0x54:\r
204 READ_FONT_DATA(0x10000000);\r
205 goto end;\r
206 case 0x56:\r
207 READ_FONT_DATA(0x01000000);\r
208 goto end;\r
cc68a136 209 }\r
210\r
211 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
212\r
213end:\r
214\r
672ad671 215 // dprintf("ret = %04x", d);\r
cc68a136 216\r
217 return d;\r
218}\r
219\r
cb4a513a 220static void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 221{\r
672ad671 222 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 223\r
224 // TODO: review against Gens\r
225 switch (a) {\r
672ad671 226 case 2:\r
227 return; // only m68k can change WP\r
fa1e5e29 228 case 3: {\r
229 int dold = Pico_mcd->s68k_regs[3];\r
bf098bc5 230 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 231 d &= 0x1d;\r
d0d47c5b 232 if (d&4) {\r
fa1e5e29 233 d |= dold&0xc2;\r
234 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
235 if (!(dold & 4)) {\r
236 dprintf("wram mode 2M->1M");\r
237 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
238 }\r
d0d47c5b 239 } else {\r
240 d |= Pico_mcd->s68k_regs[3]&0xc3;\r
241 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
fa1e5e29 242 if (dold & 4) {\r
243 dprintf("wram mode 1M->2M");\r
244 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
245 }\r
d0d47c5b 246 }\r
672ad671 247 break;\r
fa1e5e29 248 }\r
cc68a136 249 case 4:\r
250 dprintf("s68k CDC dest: %x", d&7);\r
251 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
252 return;\r
253 case 5:\r
c459aefd 254 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 255 break;\r
256 case 7:\r
257 CDC_Write_Reg(d);\r
258 return;\r
259 case 0xa:\r
260 dprintf("s68k set CDC dma addr");\r
261 break;\r
d1df8786 262 case 0xc:\r
4f265db7 263 case 0xd:\r
d1df8786 264 dprintf("s68k set stopwatch timer");\r
4f265db7 265 Pico_mcd->m.timer_stopwatch = 0;\r
266 return;\r
1cd356a3 267 case 0xe:\r
268 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
269 Pico_mcd->m.timer_stopwatch = 0;\r
270 return;\r
d1df8786 271 case 0x31:\r
4f265db7 272 dprintf("s68k set int3 timer: %02x", d);\r
273 Pico_mcd->m.timer_int3 = d << 16;\r
d1df8786 274 break;\r
cc68a136 275 case 0x33: // IRQ mask\r
276 dprintf("s68k irq mask: %02x", d);\r
277 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
278 CDD_Export_Status();\r
cc68a136 279 }\r
280 break;\r
281 case 0x34: // fader\r
282 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
283 return;\r
672ad671 284 case 0x36:\r
285 return; // d/m bit is unsetable\r
286 case 0x37: {\r
287 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
288 Pico_mcd->s68k_regs[0x37] = d&7;\r
289 if ((d&4) && !(d_old&4)) {\r
cc68a136 290 CDD_Export_Status();\r
cc68a136 291 }\r
672ad671 292 return;\r
293 }\r
cc68a136 294 case 0x4b:\r
295 Pico_mcd->s68k_regs[a] = (u8) d;\r
296 CDD_Import_Command();\r
297 return;\r
298 }\r
299\r
1cd356a3 300 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 301 {\r
fa1e5e29 302 dprintf("s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 303 return;\r
304 }\r
305\r
306 Pico_mcd->s68k_regs[a] = (u8) d;\r
307}\r
308\r
309\r
310\r
fa1e5e29 311static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 312{\r
313 u32 d=0;\r
314\r
672ad671 315 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 316 d=m68k_reg_read16(a);\r
672ad671 317 goto end;\r
318 }\r
cc68a136 319\r
fa1e5e29 320 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 321\r
322end:\r
323 return d;\r
324}\r
325\r
cc68a136 326\r
fa1e5e29 327static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 328{\r
cb4a513a 329 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 330\r
fa1e5e29 331 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 332}\r
333\r
cc68a136 334\r
fa1e5e29 335#undef _ASM_MEMORY_C\r
336#include "../MemoryCmn.c"\r
337\r
cc68a136 338\r
339// -----------------------------------------------------------------\r
340// Read Rom and read Ram\r
341\r
342u8 PicoReadM68k8(u32 a)\r
343{\r
344 u32 d=0;\r
345\r
346 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
347\r
348 a&=0xffffff;\r
349\r
350 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
351\r
352 // prg RAM\r
353 if ((a&0xfe0000)==0x020000) {\r
672ad671 354 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 355 d = *(prg_bank+((a^1)&0x1ffff));\r
356 goto end;\r
357 }\r
358\r
b837b69b 359#if 0\r
360 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
361 {\r
362 int i;\r
363 FILE *ff;\r
364 unsigned short *ram = (unsigned short *) Pico.ram;\r
365 // unswap and dump RAM\r
366 for (i = 0; i < 0x10000/2; i++)\r
367 ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
368 ff = fopen("ram.bin", "wb");\r
369 fwrite(ram, 1, 0x10000, ff);\r
370 fclose(ff);\r
371 exit(0);\r
372 }\r
373#endif\r
374\r
d0d47c5b 375 // word RAM\r
376 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 377 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
d0d47c5b 378 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 379 int bank = Pico_mcd->s68k_regs[3]&1;\r
380 if (a >= 0x220000)\r
381 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
382 else a &= 0x1ffff;\r
383 d = Pico_mcd->word_ram1M[bank][a^1];\r
d0d47c5b 384 } else {\r
385 // allow access in any mode, like Gens does\r
fa1e5e29 386 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 387 }\r
913ef4b7 388 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 389 goto end;\r
390 }\r
391\r
cc68a136 392 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
393\r
c459aefd 394 if ((a&0xffffc0)==0xa12000)\r
395 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 396\r
cc68a136 397 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
398\r
c459aefd 399 if ((a&0xffffc0)==0xa12000)\r
400 rdprintf("ret = %02x", (u8)d);\r
672ad671 401\r
cc68a136 402 end:\r
403\r
404#ifdef __debug_io\r
405 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
406#endif\r
407 return (u8)d;\r
408}\r
409\r
ab0607f7 410\r
cc68a136 411u16 PicoReadM68k16(u32 a)\r
412{\r
413 u16 d=0;\r
414\r
415 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
416\r
417 a&=0xfffffe;\r
418\r
419 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
420\r
421 // prg RAM\r
422 if ((a&0xfe0000)==0x020000) {\r
672ad671 423 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 424 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
425 goto end;\r
426 }\r
427\r
d0d47c5b 428 // word RAM\r
429 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 430 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
d0d47c5b 431 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 432 int bank = Pico_mcd->s68k_regs[3]&1;\r
433 if (a >= 0x220000)\r
434 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
435 else a &= 0x1fffe;\r
436 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
d0d47c5b 437 } else {\r
438 // allow access in any mode, like Gens does\r
fa1e5e29 439 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 440 }\r
913ef4b7 441 wrdprintf("ret = %04x", d);\r
d0d47c5b 442 goto end;\r
443 }\r
444\r
c459aefd 445 if ((a&0xffffc0)==0xa12000)\r
446 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 447\r
cc68a136 448 d = (u16)OtherRead16(a, 16);\r
449\r
c459aefd 450 if ((a&0xffffc0)==0xa12000)\r
451 rdprintf("ret = %04x", d);\r
672ad671 452\r
cc68a136 453 end:\r
454\r
455#ifdef __debug_io\r
456 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
457#endif\r
458 return d;\r
459}\r
460\r
ab0607f7 461\r
cc68a136 462u32 PicoReadM68k32(u32 a)\r
463{\r
464 u32 d=0;\r
465\r
466 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
467\r
468 a&=0xfffffe;\r
469\r
470 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
471\r
472 // prg RAM\r
473 if ((a&0xfe0000)==0x020000) {\r
672ad671 474 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 475 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
476 d = (pm[0]<<16)|pm[1];\r
477 goto end;\r
478 }\r
479\r
d0d47c5b 480 // word RAM\r
481 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 482 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
d0d47c5b 483 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 484 int bank = Pico_mcd->s68k_regs[3]&1;\r
485 if (a >= 0x220000) { // cell arranged\r
486 u32 a1, a2;\r
487 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
488 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
489 else a2 = a1 + 2;\r
490 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
491 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 492 } else {\r
fa1e5e29 493 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
bf098bc5 494 }\r
d0d47c5b 495 } else {\r
496 // allow access in any mode, like Gens does\r
fa1e5e29 497 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 498 }\r
913ef4b7 499 wrdprintf("ret = %08x", d);\r
d0d47c5b 500 goto end;\r
501 }\r
502\r
c459aefd 503 if ((a&0xffffc0)==0xa12000)\r
504 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 505\r
cc68a136 506 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
507\r
c459aefd 508 if ((a&0xffffc0)==0xa12000)\r
509 rdprintf("ret = %08x", d);\r
672ad671 510\r
cc68a136 511 end:\r
512#ifdef __debug_io\r
513 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
514#endif\r
515 return d;\r
516}\r
517\r
ab0607f7 518\r
cc68a136 519// -----------------------------------------------------------------\r
520// Write Ram\r
521\r
522void PicoWriteM68k8(u32 a,u8 d)\r
523{\r
524#ifdef __debug_io\r
525 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
526#endif\r
527 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
528 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
529\r
530\r
ab0607f7 531 if ((a&0xe00000)==0xe00000) { // Ram\r
532 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
533 return;\r
534 }\r
cc68a136 535\r
536 a&=0xffffff;\r
537\r
538 // prg RAM\r
539 if ((a&0xfe0000)==0x020000) {\r
672ad671 540 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 541 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 542 return;\r
543 }\r
544\r
d0d47c5b 545 // word RAM\r
546 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 547 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 548 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 549 int bank = Pico_mcd->s68k_regs[3]&1;\r
550 if (a >= 0x220000)\r
551 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
552 else a &= 0x1ffff;\r
553 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 554 } else {\r
555 // allow access in any mode, like Gens does\r
fa1e5e29 556 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 557 }\r
558 return;\r
559 }\r
560\r
c459aefd 561 if ((a&0xffffc0)==0xa12000)\r
562 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
672ad671 563\r
cc68a136 564 OtherWrite8(a,d,8);\r
565}\r
566\r
ab0607f7 567\r
cc68a136 568void PicoWriteM68k16(u32 a,u16 d)\r
569{\r
570#ifdef __debug_io\r
571 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
572#endif\r
cc68a136 573 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
574\r
ab0607f7 575 if ((a&0xe00000)==0xe00000) { // Ram\r
576 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
577 return;\r
578 }\r
cc68a136 579\r
580 a&=0xfffffe;\r
581\r
582 // prg RAM\r
583 if ((a&0xfe0000)==0x020000) {\r
672ad671 584 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 585 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
586 return;\r
587 }\r
588\r
d0d47c5b 589 // word RAM\r
590 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 591 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 592 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 593 int bank = Pico_mcd->s68k_regs[3]&1;\r
594 if (a >= 0x220000)\r
595 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
596 else a &= 0x1fffe;\r
597 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 598 } else {\r
599 // allow access in any mode, like Gens does\r
fa1e5e29 600 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 601 }\r
602 return;\r
603 }\r
604\r
c459aefd 605 if ((a&0xffffc0)==0xa12000)\r
606 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
cc68a136 607\r
608 OtherWrite16(a,d);\r
609}\r
610\r
ab0607f7 611\r
cc68a136 612void PicoWriteM68k32(u32 a,u32 d)\r
613{\r
614#ifdef __debug_io\r
615 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
616#endif\r
617\r
618 if ((a&0xe00000)==0xe00000)\r
619 {\r
620 // Ram:\r
621 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
622 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
623 return;\r
624 }\r
625\r
626 a&=0xfffffe;\r
627\r
628 // prg RAM\r
629 if ((a&0xfe0000)==0x020000) {\r
672ad671 630 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 631 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
632 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
633 return;\r
634 }\r
635\r
672ad671 636 // word RAM\r
d0d47c5b 637 if ((a&0xfc0000)==0x200000) {\r
638 if (d != 0) // don't log clears\r
913ef4b7 639 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 640 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 641 int bank = Pico_mcd->s68k_regs[3]&1;\r
642 if (a >= 0x220000) { // cell arranged\r
643 u32 a1, a2;\r
644 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
645 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
646 else a2 = a1 + 2;\r
647 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
648 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 649 } else {\r
fa1e5e29 650 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
651 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 652 }\r
d0d47c5b 653 } else {\r
654 // allow access in any mode, like Gens does\r
fa1e5e29 655 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 656 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
657 }\r
672ad671 658 return;\r
d0d47c5b 659 }\r
672ad671 660\r
c459aefd 661 if ((a&0xffffc0)==0xa12000)\r
662 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
cc68a136 663\r
664 OtherWrite16(a, (u16)(d>>16));\r
665 OtherWrite16(a+2,(u16)d);\r
666}\r
667\r
668\r
669// -----------------------------------------------------------------\r
670\r
671\r
672u8 PicoReadS68k8(u32 a)\r
673{\r
674 u32 d=0;\r
675\r
676 a&=0xffffff;\r
677\r
678 // prg RAM\r
679 if (a < 0x80000) {\r
680 d = *(Pico_mcd->prg_ram+(a^1));\r
681 goto end;\r
682 }\r
683\r
684 // regs\r
685 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 686 a &= 0x1ff;\r
687 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 688 if (a >= 0x58 && a < 0x68)\r
cb4a513a 689 d = gfx_cd_read(a&~1);\r
690 else d = s68k_reg_read16(a&~1);\r
691 if ((a&1)==0) d>>=8;\r
c459aefd 692 rdprintf("ret = %02x", (u8)d);\r
cc68a136 693 goto end;\r
694 }\r
695\r
d0d47c5b 696 // word RAM (2M area)\r
697 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 698 // test: batman returns\r
913ef4b7 699 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 700 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
701 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
702 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
703 if (a&1) d &= 0x0f;\r
704 else d >>= 4;\r
705 dprintf("FIXME: decode");\r
d0d47c5b 706 } else {\r
707 // allow access in any mode, like Gens does\r
fa1e5e29 708 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 709 }\r
913ef4b7 710 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 711 goto end;\r
712 }\r
713\r
714 // word RAM (1M area)\r
68cba51e 715 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 716 int bank;\r
913ef4b7 717 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 718// if (!(Pico_mcd->s68k_regs[3]&4))\r
719// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 720 bank = !(Pico_mcd->s68k_regs[3]&1);\r
721 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 722 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 723 goto end;\r
724 }\r
725\r
4f265db7 726 // PCM\r
727 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 728 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 729 a &= 0x7fff;\r
730 if (a >= 0x2000)\r
731 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
732 else if (a >= 0x20) {\r
733 a &= 0x1e;\r
734 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
735 if (a & 2) d >>= 8;\r
736 }\r
737 dprintf("ret = %02x", (u8)d);\r
738 goto end;\r
739 }\r
740\r
ab0607f7 741 // bram\r
742 if ((a&0xff0000)==0xfe0000) {\r
743 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
744 goto end;\r
745 }\r
746\r
cc68a136 747 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
748\r
749 end:\r
750\r
751#ifdef __debug_io2\r
752 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
753#endif\r
754 return (u8)d;\r
755}\r
756\r
ab0607f7 757\r
cc68a136 758u16 PicoReadS68k16(u32 a)\r
759{\r
4f265db7 760 u32 d=0;\r
cc68a136 761\r
762 a&=0xfffffe;\r
763\r
764 // prg RAM\r
765 if (a < 0x80000) {\r
766 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
767 goto end;\r
768 }\r
769\r
770 // regs\r
771 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 772 a &= 0x1fe;\r
773 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 774 if (a >= 0x58 && a < 0x68)\r
cb4a513a 775 d = gfx_cd_read(a);\r
776 else d = s68k_reg_read16(a);\r
c459aefd 777 rdprintf("ret = %04x", d);\r
cc68a136 778 goto end;\r
779 }\r
780\r
d0d47c5b 781 // word RAM (2M area)\r
782 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 783 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 784 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
785 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
786 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
787 d |= d << 4; d &= ~0xf0;\r
788 dprintf("FIXME: decode");\r
d0d47c5b 789 } else {\r
790 // allow access in any mode, like Gens does\r
fa1e5e29 791 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 792 }\r
913ef4b7 793 wrdprintf("ret = %04x", d);\r
d0d47c5b 794 goto end;\r
795 }\r
796\r
797 // word RAM (1M area)\r
68cba51e 798 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 799 int bank;\r
913ef4b7 800 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 801// if (!(Pico_mcd->s68k_regs[3]&4))\r
802// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 803 bank = !(Pico_mcd->s68k_regs[3]&1);\r
804 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 805 wrdprintf("ret = %04x", d);\r
ab0607f7 806 goto end;\r
807 }\r
808\r
809 // bram\r
810 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 811 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 812 a = (a>>1)&0x1fff;\r
4f265db7 813 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
ab0607f7 814 d|= Pico_mcd->bram[a++] << 8;\r
815 dprintf("ret = %04x", d);\r
d0d47c5b 816 goto end;\r
817 }\r
818\r
4f265db7 819 // PCM\r
820 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 821 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 822 a &= 0x7fff;\r
823 if (a >= 0x2000)\r
824 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
825 else if (a >= 0x20) {\r
826 a &= 0x1e;\r
827 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
828 if (a & 2) d >>= 8;\r
829 }\r
830 dprintf("ret = %04x", d);\r
831 goto end;\r
832 }\r
833\r
cc68a136 834 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
835\r
836 end:\r
837\r
838#ifdef __debug_io2\r
839 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
840#endif\r
841 return d;\r
842}\r
843\r
ab0607f7 844\r
cc68a136 845u32 PicoReadS68k32(u32 a)\r
846{\r
847 u32 d=0;\r
848\r
849 a&=0xfffffe;\r
850\r
851 // prg RAM\r
852 if (a < 0x80000) {\r
853 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
854 d = (pm[0]<<16)|pm[1];\r
855 goto end;\r
856 }\r
857\r
858 // regs\r
859 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 860 a &= 0x1fe;\r
861 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 862 if (a >= 0x58 && a < 0x68)\r
cb4a513a 863 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
864 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 865 rdprintf("ret = %08x", d);\r
cc68a136 866 goto end;\r
867 }\r
868\r
d0d47c5b 869 // word RAM (2M area)\r
870 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 871 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 872 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
873 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
874 a >>= 1;\r
875 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
876 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
877 d |= d << 4; d &= 0x0f0f0f0f;\r
878 dprintf("FIXME: decode");\r
d0d47c5b 879 } else {\r
880 // allow access in any mode, like Gens does\r
fa1e5e29 881 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 882 }\r
913ef4b7 883 wrdprintf("ret = %08x", d);\r
d0d47c5b 884 goto end;\r
885 }\r
886\r
887 // word RAM (1M area)\r
68cba51e 888 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 889 int bank;\r
913ef4b7 890 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 891// if (!(Pico_mcd->s68k_regs[3]&4))\r
892// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 893 bank = !(Pico_mcd->s68k_regs[3]&1);\r
894 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 895 wrdprintf("ret = %08x", d);\r
ab0607f7 896 goto end;\r
897 }\r
898\r
4f265db7 899 // PCM\r
900 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 901 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 902 a &= 0x7fff;\r
903 if (a >= 0x2000) {\r
904 a >>= 1;\r
905 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
906 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
907 } else if (a >= 0x20) {\r
908 a &= 0x1e;\r
909 if (a & 2) {\r
910 a >>= 2;\r
911 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
912 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
913 } else {\r
914 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
915 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
916 }\r
917 }\r
918 dprintf("ret = %08x", d);\r
919 goto end;\r
920 }\r
921\r
ab0607f7 922 // bram\r
923 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 924 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 925 a = (a>>1)&0x1fff;\r
926 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
927 d|= Pico_mcd->bram[a++] << 24;\r
928 d|= Pico_mcd->bram[a++];\r
929 d|= Pico_mcd->bram[a++] << 8;\r
930 dprintf("ret = %08x", d);\r
d0d47c5b 931 goto end;\r
932 }\r
933\r
cc68a136 934 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
935\r
936 end:\r
937\r
938#ifdef __debug_io2\r
939 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
940#endif\r
941 return d;\r
942}\r
943\r
ab0607f7 944\r
0a051f55 945/* check: jaguar xj 220 (draws entire world using decode) */\r
946static void decode_write8(u32 a, u8 d, int r3)\r
947{\r
948 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
949 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
950\r
0a051f55 951 r3 &= 0x18;\r
952 d &= 0x0f;\r
953 if (!(a&1)) d <<= 4;\r
954\r
955 //dprintf("FIXME: decode, r3 = %02x", r3);\r
956\r
957 if (r3 == 8) {\r
958 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
959 } else if (r3 > 8) {\r
960 if (d) goto do_it;\r
961 } else {\r
962 goto do_it;\r
963 }\r
964\r
965 return;\r
966do_it:\r
967 *pd = d | (*pd & oldmask);\r
968}\r
969\r
970\r
971static void decode_write16(u32 a, u16 d, int r3)\r
972{\r
973 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
974\r
975 //if ((a & 0x3ffff) < 0x28000) return;\r
976\r
977 r3 &= 0x18;\r
978 d &= 0x0f0f;\r
979 d |= d >> 4;\r
980\r
981 if (r3 == 8) {\r
982 u8 dold = *pd;\r
983 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
984 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
985 *pd = dold;\r
986 } else if (r3 > 8) {\r
987 u8 dold = *pd;\r
988 if (!(d & 0xf0)) d |= dold & 0xf0;\r
989 if (!(d & 0x0f)) d |= dold & 0x0f;\r
990 *pd = d;\r
991 } else {\r
992 *pd = d;\r
993 }\r
994\r
995 //dprintf("FIXME: decode");\r
996}\r
997\r
998\r
cc68a136 999// -----------------------------------------------------------------\r
1000\r
1001void PicoWriteS68k8(u32 a,u8 d)\r
1002{\r
1003#ifdef __debug_io2\r
1004 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1005#endif\r
1006\r
1007 a&=0xffffff;\r
1008\r
1009 // prg RAM\r
1010 if (a < 0x80000) {\r
1011 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
1012 *pm=d;\r
1013 return;\r
1014 }\r
1015\r
1016 // regs\r
1017 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1018 a &= 0x1ff;\r
1019 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1020 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1021 gfx_cd_write(a&~1, (d<<8)|d);\r
1022 else s68k_reg_write8(a,d);\r
cc68a136 1023 return;\r
1024 }\r
1025\r
d0d47c5b 1026 // word RAM (2M area)\r
1027 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1028 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1029 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1030 if (r3 & 4) { // 1M decode mode?\r
1031 decode_write8(a, d, r3);\r
d0d47c5b 1032 } else {\r
1033 // allow access in any mode, like Gens does\r
fa1e5e29 1034 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1035 }\r
1036 return;\r
1037 }\r
1038\r
1039 // word RAM (1M area)\r
68cba51e 1040 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1041 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1042 int bank;\r
d0d47c5b 1043 if (d)\r
913ef4b7 1044 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1045// if (!(Pico_mcd->s68k_regs[3]&4))\r
1046// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1047 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1048 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1049 return;\r
1050 }\r
1051\r
4f265db7 1052 // PCM\r
1053 if ((a&0xff8000)==0xff0000) {\r
1054 a &= 0x7fff;\r
1055 if (a >= 0x2000)\r
1056 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1057 else if (a < 0x12)\r
1058 pcm_write(a>>1, d);\r
1059 return;\r
1060 }\r
1061\r
ab0607f7 1062 // bram\r
1063 if ((a&0xff0000)==0xfe0000) {\r
1064 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1065 SRam.changed = 1;\r
1066 return;\r
1067 }\r
1068\r
cc68a136 1069 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1070}\r
1071\r
ab0607f7 1072\r
cc68a136 1073void PicoWriteS68k16(u32 a,u16 d)\r
1074{\r
1075#ifdef __debug_io2\r
1076 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1077#endif\r
1078\r
1079 a&=0xfffffe;\r
1080\r
1081 // prg RAM\r
1082 if (a < 0x80000) {\r
1083 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1084 return;\r
1085 }\r
1086\r
1087 // regs\r
1088 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1089 a &= 0x1fe;\r
1090 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1091 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1092 gfx_cd_write(a, d);\r
1093 else {\r
1cd356a3 1094 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1095 Pico_mcd->s68k_regs[0xf] = d;\r
1096 return;\r
1097 }\r
cb4a513a 1098 s68k_reg_write8(a, d>>8);\r
1099 s68k_reg_write8(a+1,d&0xff);\r
1100 }\r
cc68a136 1101 return;\r
1102 }\r
1103\r
d0d47c5b 1104 // word RAM (2M area)\r
1105 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1106 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1107 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1108 if (r3 & 4) { // 1M decode mode?\r
1109 decode_write16(a, d, r3);\r
d0d47c5b 1110 } else {\r
1111 // allow access in any mode, like Gens does\r
fa1e5e29 1112 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1113 }\r
1114 return;\r
1115 }\r
1116\r
1117 // word RAM (1M area)\r
68cba51e 1118 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1119 int bank;\r
d0d47c5b 1120 if (d)\r
913ef4b7 1121 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1122// if (!(Pico_mcd->s68k_regs[3]&4))\r
1123// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1124 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1125 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1126 return;\r
1127 }\r
1128\r
4f265db7 1129 // PCM\r
1130 if ((a&0xff8000)==0xff0000) {\r
1131 a &= 0x7fff;\r
1132 if (a >= 0x2000)\r
1133 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1134 else if (a < 0x12)\r
1135 pcm_write(a>>1, d & 0xff);\r
1136 return;\r
1137 }\r
1138\r
ab0607f7 1139 // bram\r
1140 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1141 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1142 a = (a>>1)&0x1fff;\r
1143 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1144 Pico_mcd->bram[a++] = d >> 8;\r
1145 SRam.changed = 1;\r
1146 return;\r
1147 }\r
1148\r
cc68a136 1149 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1150}\r
1151\r
ab0607f7 1152\r
cc68a136 1153void PicoWriteS68k32(u32 a,u32 d)\r
1154{\r
1155#ifdef __debug_io2\r
1156 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1157#endif\r
1158\r
1159 a&=0xfffffe;\r
1160\r
1161 // prg RAM\r
1162 if (a < 0x80000) {\r
1163 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1164 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1165 return;\r
1166 }\r
1167\r
1168 // regs\r
1169 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1170 a &= 0x1fe;\r
1171 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1172 if (a >= 0x58 && a < 0x68) {\r
cb4a513a 1173 gfx_cd_write(a, d>>16);\r
1174 gfx_cd_write(a+2, d&0xffff);\r
1175 } else {\r
1176 s68k_reg_write8(a, d>>24);\r
1177 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1178 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1179 s68k_reg_write8(a+3, d &0xff);\r
1180 }\r
cc68a136 1181 return;\r
1182 }\r
1183\r
d0d47c5b 1184 // word RAM (2M area)\r
1185 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1186 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1187 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1188 if (r3 & 4) { // 1M decode mode?\r
1189 decode_write16(a , d >> 16, r3);\r
1190 decode_write16(a+2, d , r3);\r
d0d47c5b 1191 } else {\r
1192 // allow access in any mode, like Gens does\r
fa1e5e29 1193 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1194 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1195 }\r
1196 return;\r
1197 }\r
1198\r
1199 // word RAM (1M area)\r
68cba51e 1200 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1201 int bank;\r
1202 u16 *pm;\r
d0d47c5b 1203 if (d)\r
913ef4b7 1204 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1205// if (!(Pico_mcd->s68k_regs[3]&4))\r
1206// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1207 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1208 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1209 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1210 return;\r
1211 }\r
ab0607f7 1212\r
4f265db7 1213 // PCM\r
1214 if ((a&0xff8000)==0xff0000) {\r
1215 a &= 0x7fff;\r
1216 if (a >= 0x2000) {\r
1217 a >>= 1;\r
1218 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1219 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1220 } else if (a < 0x12) {\r
1221 a >>= 1;\r
1222 pcm_write(a, (d>>16) & 0xff);\r
1223 pcm_write(a+1, d & 0xff);\r
1224 }\r
1225 return;\r
1226 }\r
1227\r
ab0607f7 1228 // bram\r
1229 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1230 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1231 a = (a>>1)&0x1fff;\r
1232 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1233 Pico_mcd->bram[a++] = d >> 24;\r
1234 Pico_mcd->bram[a++] = d;\r
1235 Pico_mcd->bram[a++] = d >> 8;\r
1236 SRam.changed = 1;\r
1237 return;\r
1238 }\r
1239\r
cc68a136 1240 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1241}\r
1242\r
1243\r
1244\r
1245// -----------------------------------------------------------------\r
1246\r
b837b69b 1247\r
1248#if defined(EMU_C68K)\r
1249static __inline int PicoMemBaseM68k(u32 pc)\r
1250{\r
fa1e5e29 1251 if ((pc&0xe00000)==0xe00000)\r
1252 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1253\r
1254 if (pc < 0x20000)\r
fa1e5e29 1255 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1256\r
1257 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1258 {\r
fa1e5e29 1259 if (!(Pico_mcd->s68k_regs[3]&4))\r
1260 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1261 if (pc < 0x220000) {\r
1262 int bank = (Pico_mcd->s68k_regs[3]&1);\r
1263 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1264 }\r
b837b69b 1265 }\r
1266\r
fa1e5e29 1267 // Error - Program Counter is invalid\r
1268 dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
1269\r
1270 return (int)Pico_mcd->bios;\r
b837b69b 1271}\r
1272\r
1273\r
1274static u32 PicoCheckPcM68k(u32 pc)\r
1275{\r
1276 pc-=PicoCpu.membase; // Get real pc\r
1277 pc&=0xfffffe;\r
1278\r
1279 PicoCpu.membase=PicoMemBaseM68k(pc);\r
1280\r
1281 return PicoCpu.membase+pc;\r
1282}\r
1283\r
1284\r
1285static __inline int PicoMemBaseS68k(u32 pc)\r
1286{\r
fa1e5e29 1287 if (pc < 0x80000) // PRG RAM\r
1288 return (int)Pico_mcd->prg_ram;\r
b837b69b 1289\r
fa1e5e29 1290 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1291 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1292\r
1293 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
1294 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1295 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1296 }\r
1297\r
fa1e5e29 1298 // Error - Program Counter is invalid\r
1299 dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
1300\r
1301 return (int)Pico_mcd->prg_ram;\r
b837b69b 1302}\r
1303\r
1304\r
1305static u32 PicoCheckPcS68k(u32 pc)\r
1306{\r
1307 pc-=PicoCpuS68k.membase; // Get real pc\r
1308 pc&=0xfffffe;\r
1309\r
1310 PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
1311\r
1312 return PicoCpuS68k.membase+pc;\r
1313}\r
1314#endif\r
1315\r
1316\r
1317void PicoMemSetupCD()\r
1318{\r
1319 dprintf("PicoMemSetupCD()");\r
1320#ifdef EMU_C68K\r
1321 // Setup m68k memory callbacks:\r
1322 PicoCpu.checkpc=PicoCheckPcM68k;\r
1323 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
1324 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
1325 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
1326 PicoCpu.write8 =PicoWriteM68k8;\r
1327 PicoCpu.write16=PicoWriteM68k16;\r
1328 PicoCpu.write32=PicoWriteM68k32;\r
1329 // s68k\r
1330 PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
1331 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
1332 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
1333 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
1334 PicoCpuS68k.write8 =PicoWriteS68k8;\r
1335 PicoCpuS68k.write16=PicoWriteS68k16;\r
1336 PicoCpuS68k.write32=PicoWriteS68k32;\r
1337#endif\r
1338}\r
1339\r
1340\r
cc68a136 1341#ifdef EMU_M68K\r
1342unsigned char PicoReadCD8w (unsigned int a) {\r
1343 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1344}\r
1345unsigned short PicoReadCD16w(unsigned int a) {\r
1346 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1347}\r
1348unsigned int PicoReadCD32w(unsigned int a) {\r
1349 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1350}\r
1351void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1352 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1353}\r
1354void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1355 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1356}\r
1357void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1358 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1359}\r
1360\r
1361// these are allowed to access RAM\r
1362unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
1363 a&=0xffffff;\r
1364 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1365 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1366 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1367 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1368 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1369 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1370 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1371 }\r
1372 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1373 } else {\r
cc68a136 1374 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1375 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1376 if((a&0xfc0000)==0x200000) { // word RAM\r
1377 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1378 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1379 else if (a < 0x220000) {\r
1380 int bank = Pico_mcd->s68k_regs[3]&1;\r
1381 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1382 }\r
1383 }\r
1384 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1385 }\r
1386 return 0;//(u8) lastread_d;\r
1387}\r
1388unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
1389 a&=0xffffff;\r
1390 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1391 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1392 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1393 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1394 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1395 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1396 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1397 }\r
1398 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1399 } else {\r
cc68a136 1400 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1401 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1402 if((a&0xfc0000)==0x200000) { // word RAM\r
1403 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1404 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1405 else if (a < 0x220000) {\r
1406 int bank = Pico_mcd->s68k_regs[3]&1;\r
1407 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1408 }\r
1409 }\r
1410 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1411 }\r
b837b69b 1412 return 0;\r
cc68a136 1413}\r
1414unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
fa1e5e29 1415 u16 *pm;\r
cc68a136 1416 a&=0xffffff;\r
1417 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1418 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1419 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1420 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1421 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1422 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1423 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1424 return (pm[0]<<16)|pm[1];\r
1425 }\r
1426 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1427 } else {\r
cc68a136 1428 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1429 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1430 if((a&0xfc0000)==0x200000) { // word RAM\r
1431 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1432 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1433 else if (a < 0x220000) {\r
1434 int bank = Pico_mcd->s68k_regs[3]&1;\r
1435 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1436 return (pm[0]<<16)|pm[1];\r
1437 }\r
1438 }\r
1439 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1440 }\r
b837b69b 1441 return 0;\r
cc68a136 1442}\r
1443#endif // EMU_M68K\r
1444\r
fast MegaDrive/MegaCD/32X emulator