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SekRunPS Cyclone integration
[picodrive.git] / Pico / cd / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
b837b69b 4// (c) Copyright 2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9// A68K no longer supported here\r
10\r
11//#define __debug_io\r
12\r
13#include "../PicoInt.h"\r
14\r
15#include "../sound/sound.h"\r
16#include "../sound/ym2612.h"\r
17#include "../sound/sn76496.h"\r
18\r
cb4a513a 19#include "gfx_cd.h"\r
4f265db7 20#include "pcm.h"\r
cb4a513a 21\r
fa1e5e29 22#include "cell_map.c"\r
23\r
cc68a136 24typedef unsigned char u8;\r
25typedef unsigned short u16;\r
26typedef unsigned int u32;\r
27\r
28//#define __debug_io\r
29//#define __debug_io2\r
d1df8786 30//#define rdprintf dprintf\r
31#define rdprintf(...)\r
68cba51e 32//#define wrdprintf dprintf\r
913ef4b7 33#define wrdprintf(...)\r
cc68a136 34\r
35// -----------------------------------------------------------------\r
36\r
cc68a136 37\r
cb4a513a 38static u32 m68k_reg_read16(u32 a)\r
cc68a136 39{\r
40 u32 d=0;\r
41 a &= 0x3e;\r
672ad671 42 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 43\r
44 switch (a) {\r
672ad671 45 case 0:\r
c459aefd 46 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 47 goto end;\r
cc68a136 48 case 2:\r
672ad671 49 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
1cd356a3 50 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
cc68a136 51 goto end;\r
c459aefd 52 case 4:\r
53 d = Pico_mcd->s68k_regs[4]<<8;\r
54 goto end;\r
55 case 6:\r
913ef4b7 56 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 57 goto end;\r
cc68a136 58 case 8:\r
cc68a136 59 d = Read_CDC_Host(0);\r
60 goto end;\r
c459aefd 61 case 0xA:\r
fa1e5e29 62 dprintf("m68k FIXME: reserved read");\r
c459aefd 63 goto end;\r
cc68a136 64 case 0xC:\r
d1df8786 65 dprintf("m68k stopwatch timer read");\r
1cd356a3 66 d = Pico_mcd->m.timer_stopwatch >> 16;\r
67 goto end;\r
cc68a136 68 }\r
69\r
cc68a136 70 if (a < 0x30) {\r
71 // comm flag/cmd/status (0xE-0x2F)\r
72 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
73 goto end;\r
74 }\r
75\r
fa1e5e29 76 dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 77\r
78end:\r
79\r
672ad671 80 // dprintf("ret = %04x", d);\r
cc68a136 81 return d;\r
82}\r
83\r
cb4a513a 84static void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 85{\r
86 a &= 0x3f;\r
672ad671 87 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 88\r
89 switch (a) {\r
90 case 0:\r
672ad671 91 d &= 1;\r
cc68a136 92 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 93 return;\r
cc68a136 94 case 1:\r
672ad671 95 d &= 3;\r
51a902ae 96 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 97 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
98 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 99 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 100 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
51a902ae 101 Pico_mcd->m.state_flags&=~1;\r
672ad671 102 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 103 }\r
c459aefd 104 Pico_mcd->m.busreq = d;\r
105 return;\r
672ad671 106 case 2:\r
107 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
108 return;\r
cc68a136 109 case 3:\r
bf098bc5 110 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 111 d &= 0xc2;\r
112 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
113 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
114 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
115 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
116 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
117 d |= Pico_mcd->s68k_regs[3]&0x1d;\r
d0d47c5b 118 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
672ad671 119 Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
120 return;\r
c459aefd 121 case 6:\r
d1df8786 122 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 123 return;\r
124 case 7:\r
d1df8786 125 Pico_mcd->bios[0x72] = d;\r
913ef4b7 126 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 127 return;\r
cc68a136 128 case 0xe:\r
672ad671 129 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 130 Pico_mcd->s68k_regs[0xe] = d;\r
c459aefd 131 return;\r
672ad671 132 }\r
133\r
134 if ((a&0xf0) == 0x10) {\r
cc68a136 135 Pico_mcd->s68k_regs[a] = d;\r
672ad671 136 return;\r
cc68a136 137 }\r
138\r
fa1e5e29 139 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 140}\r
141\r
142\r
913ef4b7 143#define READ_FONT_DATA(basemask) \\r
144{ \\r
145 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
146 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
147 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
148 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
149 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
150 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
151}\r
152\r
cc68a136 153\r
cb4a513a 154static u32 s68k_reg_read16(u32 a)\r
cc68a136 155{\r
156 u32 d=0;\r
cc68a136 157\r
672ad671 158 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 159\r
160 switch (a) {\r
161 case 0:\r
cb4a513a 162 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
c459aefd 163 goto end;\r
672ad671 164 case 2:\r
165 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
bf098bc5 166 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
672ad671 167 goto end;\r
cc68a136 168 case 6:\r
169 d = CDC_Read_Reg();\r
170 goto end;\r
171 case 8:\r
cb4a513a 172 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 173 goto end;\r
174 case 0xC:\r
d1df8786 175 dprintf("s68k stopwatch timer read");\r
4f265db7 176 d = Pico_mcd->m.timer_stopwatch >> 16;\r
177 goto end;\r
d1df8786 178 case 0x30:\r
179 dprintf("s68k int3 timer read");\r
cc68a136 180 break;\r
181 case 0x34: // fader\r
182 d = 0; // no busy bit\r
183 goto end;\r
913ef4b7 184 case 0x50: // font data (check: Lunar 2, Silpheed)\r
185 READ_FONT_DATA(0x00100000);\r
186 goto end;\r
187 case 0x52:\r
188 READ_FONT_DATA(0x00010000);\r
189 goto end;\r
190 case 0x54:\r
191 READ_FONT_DATA(0x10000000);\r
192 goto end;\r
193 case 0x56:\r
194 READ_FONT_DATA(0x01000000);\r
195 goto end;\r
cc68a136 196 }\r
197\r
198 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
199\r
200end:\r
201\r
672ad671 202 // dprintf("ret = %04x", d);\r
cc68a136 203\r
204 return d;\r
205}\r
206\r
cb4a513a 207static void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 208{\r
672ad671 209 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 210\r
211 // TODO: review against Gens\r
212 switch (a) {\r
672ad671 213 case 2:\r
214 return; // only m68k can change WP\r
fa1e5e29 215 case 3: {\r
216 int dold = Pico_mcd->s68k_regs[3];\r
bf098bc5 217 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 218 d &= 0x1d;\r
d0d47c5b 219 if (d&4) {\r
fa1e5e29 220 d |= dold&0xc2;\r
221 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
222 if (!(dold & 4)) {\r
223 dprintf("wram mode 2M->1M");\r
224 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
225 }\r
d0d47c5b 226 } else {\r
227 d |= Pico_mcd->s68k_regs[3]&0xc3;\r
228 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
fa1e5e29 229 if (dold & 4) {\r
230 dprintf("wram mode 1M->2M");\r
231 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
232 }\r
d0d47c5b 233 }\r
672ad671 234 break;\r
fa1e5e29 235 }\r
cc68a136 236 case 4:\r
237 dprintf("s68k CDC dest: %x", d&7);\r
238 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
239 return;\r
240 case 5:\r
c459aefd 241 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 242 break;\r
243 case 7:\r
244 CDC_Write_Reg(d);\r
245 return;\r
246 case 0xa:\r
247 dprintf("s68k set CDC dma addr");\r
248 break;\r
d1df8786 249 case 0xc:\r
4f265db7 250 case 0xd:\r
d1df8786 251 dprintf("s68k set stopwatch timer");\r
4f265db7 252 Pico_mcd->m.timer_stopwatch = 0;\r
253 return;\r
1cd356a3 254 case 0xe:\r
255 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
256 Pico_mcd->m.timer_stopwatch = 0;\r
257 return;\r
d1df8786 258 case 0x31:\r
4f265db7 259 dprintf("s68k set int3 timer: %02x", d);\r
260 Pico_mcd->m.timer_int3 = d << 16;\r
d1df8786 261 break;\r
cc68a136 262 case 0x33: // IRQ mask\r
263 dprintf("s68k irq mask: %02x", d);\r
264 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
265 CDD_Export_Status();\r
cc68a136 266 }\r
267 break;\r
268 case 0x34: // fader\r
269 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
270 return;\r
672ad671 271 case 0x36:\r
272 return; // d/m bit is unsetable\r
273 case 0x37: {\r
274 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
275 Pico_mcd->s68k_regs[0x37] = d&7;\r
276 if ((d&4) && !(d_old&4)) {\r
cc68a136 277 CDD_Export_Status();\r
cc68a136 278 }\r
672ad671 279 return;\r
280 }\r
cc68a136 281 case 0x4b:\r
282 Pico_mcd->s68k_regs[a] = (u8) d;\r
283 CDD_Import_Command();\r
284 return;\r
285 }\r
286\r
1cd356a3 287 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 288 {\r
fa1e5e29 289 dprintf("s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 290 return;\r
291 }\r
292\r
293 Pico_mcd->s68k_regs[a] = (u8) d;\r
294}\r
295\r
296\r
297\r
fa1e5e29 298static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 299{\r
300 u32 d=0;\r
301\r
672ad671 302 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 303 d=m68k_reg_read16(a);\r
672ad671 304 goto end;\r
305 }\r
cc68a136 306\r
fa1e5e29 307 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 308\r
309end:\r
310 return d;\r
311}\r
312\r
cc68a136 313\r
fa1e5e29 314static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 315{\r
cb4a513a 316 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 317\r
fa1e5e29 318 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 319}\r
320\r
cc68a136 321\r
fa1e5e29 322#undef _ASM_MEMORY_C\r
323#include "../MemoryCmn.c"\r
324\r
cc68a136 325\r
326// -----------------------------------------------------------------\r
327// Read Rom and read Ram\r
328\r
329u8 PicoReadM68k8(u32 a)\r
330{\r
331 u32 d=0;\r
332\r
333 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
334\r
335 a&=0xffffff;\r
336\r
337 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
338\r
339 // prg RAM\r
340 if ((a&0xfe0000)==0x020000) {\r
672ad671 341 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 342 d = *(prg_bank+((a^1)&0x1ffff));\r
343 goto end;\r
344 }\r
345\r
b837b69b 346#if 0\r
347 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
348 {\r
349 int i;\r
350 FILE *ff;\r
351 unsigned short *ram = (unsigned short *) Pico.ram;\r
352 // unswap and dump RAM\r
353 for (i = 0; i < 0x10000/2; i++)\r
354 ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
355 ff = fopen("ram.bin", "wb");\r
356 fwrite(ram, 1, 0x10000, ff);\r
357 fclose(ff);\r
358 exit(0);\r
359 }\r
360#endif\r
361\r
d0d47c5b 362 // word RAM\r
363 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 364 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
d0d47c5b 365 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 366 int bank = Pico_mcd->s68k_regs[3]&1;\r
367 if (a >= 0x220000)\r
368 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
369 else a &= 0x1ffff;\r
370 d = Pico_mcd->word_ram1M[bank][a^1];\r
d0d47c5b 371 } else {\r
372 // allow access in any mode, like Gens does\r
fa1e5e29 373 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 374 }\r
913ef4b7 375 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 376 goto end;\r
377 }\r
378\r
cc68a136 379 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
380\r
c459aefd 381 if ((a&0xffffc0)==0xa12000)\r
382 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 383\r
cc68a136 384 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
385\r
c459aefd 386 if ((a&0xffffc0)==0xa12000)\r
387 rdprintf("ret = %02x", (u8)d);\r
672ad671 388\r
cc68a136 389 end:\r
390\r
391#ifdef __debug_io\r
392 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
393#endif\r
394 return (u8)d;\r
395}\r
396\r
ab0607f7 397\r
cc68a136 398u16 PicoReadM68k16(u32 a)\r
399{\r
400 u16 d=0;\r
401\r
402 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
403\r
404 a&=0xfffffe;\r
405\r
406 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
407\r
408 // prg RAM\r
409 if ((a&0xfe0000)==0x020000) {\r
672ad671 410 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 411 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
412 goto end;\r
413 }\r
414\r
d0d47c5b 415 // word RAM\r
416 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 417 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
d0d47c5b 418 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 419 int bank = Pico_mcd->s68k_regs[3]&1;\r
420 if (a >= 0x220000)\r
421 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
422 else a &= 0x1fffe;\r
423 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
d0d47c5b 424 } else {\r
425 // allow access in any mode, like Gens does\r
fa1e5e29 426 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 427 }\r
913ef4b7 428 wrdprintf("ret = %04x", d);\r
d0d47c5b 429 goto end;\r
430 }\r
431\r
c459aefd 432 if ((a&0xffffc0)==0xa12000)\r
433 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 434\r
cc68a136 435 d = (u16)OtherRead16(a, 16);\r
436\r
c459aefd 437 if ((a&0xffffc0)==0xa12000)\r
438 rdprintf("ret = %04x", d);\r
672ad671 439\r
cc68a136 440 end:\r
441\r
442#ifdef __debug_io\r
443 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
444#endif\r
445 return d;\r
446}\r
447\r
ab0607f7 448\r
cc68a136 449u32 PicoReadM68k32(u32 a)\r
450{\r
451 u32 d=0;\r
452\r
453 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
454\r
455 a&=0xfffffe;\r
456\r
457 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
458\r
459 // prg RAM\r
460 if ((a&0xfe0000)==0x020000) {\r
672ad671 461 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 462 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
463 d = (pm[0]<<16)|pm[1];\r
464 goto end;\r
465 }\r
466\r
d0d47c5b 467 // word RAM\r
468 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 469 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
d0d47c5b 470 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 471 int bank = Pico_mcd->s68k_regs[3]&1;\r
472 if (a >= 0x220000) { // cell arranged\r
473 u32 a1, a2;\r
474 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
475 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
476 else a2 = a1 + 2;\r
477 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
478 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 479 } else {\r
fa1e5e29 480 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
bf098bc5 481 }\r
d0d47c5b 482 } else {\r
483 // allow access in any mode, like Gens does\r
fa1e5e29 484 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 485 }\r
913ef4b7 486 wrdprintf("ret = %08x", d);\r
d0d47c5b 487 goto end;\r
488 }\r
489\r
c459aefd 490 if ((a&0xffffc0)==0xa12000)\r
491 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 492\r
cc68a136 493 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
494\r
c459aefd 495 if ((a&0xffffc0)==0xa12000)\r
496 rdprintf("ret = %08x", d);\r
672ad671 497\r
cc68a136 498 end:\r
499#ifdef __debug_io\r
500 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
501#endif\r
502 return d;\r
503}\r
504\r
ab0607f7 505\r
cc68a136 506// -----------------------------------------------------------------\r
507// Write Ram\r
508\r
509void PicoWriteM68k8(u32 a,u8 d)\r
510{\r
511#ifdef __debug_io\r
512 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
513#endif\r
514 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
515 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
516\r
517\r
ab0607f7 518 if ((a&0xe00000)==0xe00000) { // Ram\r
519 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
520 return;\r
521 }\r
cc68a136 522\r
523 a&=0xffffff;\r
524\r
525 // prg RAM\r
526 if ((a&0xfe0000)==0x020000) {\r
672ad671 527 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 528 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 529 return;\r
530 }\r
531\r
d0d47c5b 532 // word RAM\r
533 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 534 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 535 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 536 int bank = Pico_mcd->s68k_regs[3]&1;\r
537 if (a >= 0x220000)\r
538 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
539 else a &= 0x1ffff;\r
540 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 541 } else {\r
542 // allow access in any mode, like Gens does\r
fa1e5e29 543 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 544 }\r
545 return;\r
546 }\r
547\r
c459aefd 548 if ((a&0xffffc0)==0xa12000)\r
549 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
672ad671 550\r
cc68a136 551 OtherWrite8(a,d,8);\r
552}\r
553\r
ab0607f7 554\r
cc68a136 555void PicoWriteM68k16(u32 a,u16 d)\r
556{\r
557#ifdef __debug_io\r
558 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
559#endif\r
cc68a136 560 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
561\r
ab0607f7 562 if ((a&0xe00000)==0xe00000) { // Ram\r
563 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
564 return;\r
565 }\r
cc68a136 566\r
567 a&=0xfffffe;\r
568\r
569 // prg RAM\r
570 if ((a&0xfe0000)==0x020000) {\r
672ad671 571 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 572 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
573 return;\r
574 }\r
575\r
d0d47c5b 576 // word RAM\r
577 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 578 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 579 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 580 int bank = Pico_mcd->s68k_regs[3]&1;\r
581 if (a >= 0x220000)\r
582 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
583 else a &= 0x1fffe;\r
584 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 585 } else {\r
586 // allow access in any mode, like Gens does\r
fa1e5e29 587 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 588 }\r
589 return;\r
590 }\r
591\r
c459aefd 592 if ((a&0xffffc0)==0xa12000)\r
593 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
cc68a136 594\r
595 OtherWrite16(a,d);\r
596}\r
597\r
ab0607f7 598\r
cc68a136 599void PicoWriteM68k32(u32 a,u32 d)\r
600{\r
601#ifdef __debug_io\r
602 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
603#endif\r
604\r
605 if ((a&0xe00000)==0xe00000)\r
606 {\r
607 // Ram:\r
608 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
609 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
610 return;\r
611 }\r
612\r
613 a&=0xfffffe;\r
614\r
615 // prg RAM\r
616 if ((a&0xfe0000)==0x020000) {\r
672ad671 617 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 618 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
619 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
620 return;\r
621 }\r
622\r
672ad671 623 // word RAM\r
d0d47c5b 624 if ((a&0xfc0000)==0x200000) {\r
625 if (d != 0) // don't log clears\r
913ef4b7 626 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 627 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 628 int bank = Pico_mcd->s68k_regs[3]&1;\r
629 if (a >= 0x220000) { // cell arranged\r
630 u32 a1, a2;\r
631 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
632 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
633 else a2 = a1 + 2;\r
634 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
635 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 636 } else {\r
fa1e5e29 637 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
638 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 639 }\r
d0d47c5b 640 } else {\r
641 // allow access in any mode, like Gens does\r
fa1e5e29 642 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 643 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
644 }\r
672ad671 645 return;\r
d0d47c5b 646 }\r
672ad671 647\r
c459aefd 648 if ((a&0xffffc0)==0xa12000)\r
649 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
cc68a136 650\r
651 OtherWrite16(a, (u16)(d>>16));\r
652 OtherWrite16(a+2,(u16)d);\r
653}\r
654\r
655\r
656// -----------------------------------------------------------------\r
657\r
658\r
659u8 PicoReadS68k8(u32 a)\r
660{\r
661 u32 d=0;\r
662\r
663 a&=0xffffff;\r
664\r
665 // prg RAM\r
666 if (a < 0x80000) {\r
667 d = *(Pico_mcd->prg_ram+(a^1));\r
668 goto end;\r
669 }\r
670\r
671 // regs\r
672 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 673 a &= 0x1ff;\r
674 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 675 if (a >= 0x58 && a < 0x68)\r
cb4a513a 676 d = gfx_cd_read(a&~1);\r
677 else d = s68k_reg_read16(a&~1);\r
678 if ((a&1)==0) d>>=8;\r
c459aefd 679 rdprintf("ret = %02x", (u8)d);\r
cc68a136 680 goto end;\r
681 }\r
682\r
d0d47c5b 683 // word RAM (2M area)\r
684 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 685 // test: batman returns\r
913ef4b7 686 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 687 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
688 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
689 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
690 if (a&1) d &= 0x0f;\r
691 else d >>= 4;\r
692 dprintf("FIXME: decode");\r
d0d47c5b 693 } else {\r
694 // allow access in any mode, like Gens does\r
fa1e5e29 695 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 696 }\r
913ef4b7 697 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 698 goto end;\r
699 }\r
700\r
701 // word RAM (1M area)\r
68cba51e 702 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 703 int bank;\r
913ef4b7 704 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 705// if (!(Pico_mcd->s68k_regs[3]&4))\r
706// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 707 bank = !(Pico_mcd->s68k_regs[3]&1);\r
708 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 709 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 710 goto end;\r
711 }\r
712\r
4f265db7 713 // PCM\r
714 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 715 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 716 a &= 0x7fff;\r
717 if (a >= 0x2000)\r
718 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
719 else if (a >= 0x20) {\r
720 a &= 0x1e;\r
721 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
722 if (a & 2) d >>= 8;\r
723 }\r
724 dprintf("ret = %02x", (u8)d);\r
725 goto end;\r
726 }\r
727\r
ab0607f7 728 // bram\r
729 if ((a&0xff0000)==0xfe0000) {\r
730 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
731 goto end;\r
732 }\r
733\r
cc68a136 734 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
735\r
736 end:\r
737\r
738#ifdef __debug_io2\r
739 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
740#endif\r
741 return (u8)d;\r
742}\r
743\r
ab0607f7 744\r
cc68a136 745u16 PicoReadS68k16(u32 a)\r
746{\r
4f265db7 747 u32 d=0;\r
cc68a136 748\r
749 a&=0xfffffe;\r
750\r
751 // prg RAM\r
752 if (a < 0x80000) {\r
753 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
754 goto end;\r
755 }\r
756\r
757 // regs\r
758 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 759 a &= 0x1fe;\r
760 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 761 if (a >= 0x58 && a < 0x68)\r
cb4a513a 762 d = gfx_cd_read(a);\r
763 else d = s68k_reg_read16(a);\r
c459aefd 764 rdprintf("ret = %04x", d);\r
cc68a136 765 goto end;\r
766 }\r
767\r
d0d47c5b 768 // word RAM (2M area)\r
769 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 770 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 771 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
772 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
773 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
774 d |= d << 4; d &= ~0xf0;\r
775 dprintf("FIXME: decode");\r
d0d47c5b 776 } else {\r
777 // allow access in any mode, like Gens does\r
fa1e5e29 778 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 779 }\r
913ef4b7 780 wrdprintf("ret = %04x", d);\r
d0d47c5b 781 goto end;\r
782 }\r
783\r
784 // word RAM (1M area)\r
68cba51e 785 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 786 int bank;\r
913ef4b7 787 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 788// if (!(Pico_mcd->s68k_regs[3]&4))\r
789// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 790 bank = !(Pico_mcd->s68k_regs[3]&1);\r
791 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 792 wrdprintf("ret = %04x", d);\r
ab0607f7 793 goto end;\r
794 }\r
795\r
796 // bram\r
797 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 798 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 799 a = (a>>1)&0x1fff;\r
4f265db7 800 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
ab0607f7 801 d|= Pico_mcd->bram[a++] << 8;\r
802 dprintf("ret = %04x", d);\r
d0d47c5b 803 goto end;\r
804 }\r
805\r
4f265db7 806 // PCM\r
807 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 808 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 809 a &= 0x7fff;\r
810 if (a >= 0x2000)\r
811 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
812 else if (a >= 0x20) {\r
813 a &= 0x1e;\r
814 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
815 if (a & 2) d >>= 8;\r
816 }\r
817 dprintf("ret = %04x", d);\r
818 goto end;\r
819 }\r
820\r
cc68a136 821 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
822\r
823 end:\r
824\r
825#ifdef __debug_io2\r
826 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
827#endif\r
828 return d;\r
829}\r
830\r
ab0607f7 831\r
cc68a136 832u32 PicoReadS68k32(u32 a)\r
833{\r
834 u32 d=0;\r
835\r
836 a&=0xfffffe;\r
837\r
838 // prg RAM\r
839 if (a < 0x80000) {\r
840 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
841 d = (pm[0]<<16)|pm[1];\r
842 goto end;\r
843 }\r
844\r
845 // regs\r
846 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 847 a &= 0x1fe;\r
848 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 849 if (a >= 0x58 && a < 0x68)\r
cb4a513a 850 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
851 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 852 rdprintf("ret = %08x", d);\r
cc68a136 853 goto end;\r
854 }\r
855\r
d0d47c5b 856 // word RAM (2M area)\r
857 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 858 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 859 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
860 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
861 a >>= 1;\r
862 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
863 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
864 d |= d << 4; d &= 0x0f0f0f0f;\r
865 dprintf("FIXME: decode");\r
d0d47c5b 866 } else {\r
867 // allow access in any mode, like Gens does\r
fa1e5e29 868 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 869 }\r
913ef4b7 870 wrdprintf("ret = %08x", d);\r
d0d47c5b 871 goto end;\r
872 }\r
873\r
874 // word RAM (1M area)\r
68cba51e 875 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 876 int bank;\r
913ef4b7 877 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 878// if (!(Pico_mcd->s68k_regs[3]&4))\r
879// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 880 bank = !(Pico_mcd->s68k_regs[3]&1);\r
881 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 882 wrdprintf("ret = %08x", d);\r
ab0607f7 883 goto end;\r
884 }\r
885\r
4f265db7 886 // PCM\r
887 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 888 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 889 a &= 0x7fff;\r
890 if (a >= 0x2000) {\r
891 a >>= 1;\r
892 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
893 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
894 } else if (a >= 0x20) {\r
895 a &= 0x1e;\r
896 if (a & 2) {\r
897 a >>= 2;\r
898 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
899 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
900 } else {\r
901 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
902 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
903 }\r
904 }\r
905 dprintf("ret = %08x", d);\r
906 goto end;\r
907 }\r
908\r
ab0607f7 909 // bram\r
910 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 911 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 912 a = (a>>1)&0x1fff;\r
913 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
914 d|= Pico_mcd->bram[a++] << 24;\r
915 d|= Pico_mcd->bram[a++];\r
916 d|= Pico_mcd->bram[a++] << 8;\r
917 dprintf("ret = %08x", d);\r
d0d47c5b 918 goto end;\r
919 }\r
920\r
cc68a136 921 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
922\r
923 end:\r
924\r
925#ifdef __debug_io2\r
926 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
927#endif\r
928 return d;\r
929}\r
930\r
ab0607f7 931\r
0a051f55 932/* check: jaguar xj 220 (draws entire world using decode) */\r
933static void decode_write8(u32 a, u8 d, int r3)\r
934{\r
935 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
936 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
937\r
0a051f55 938 r3 &= 0x18;\r
939 d &= 0x0f;\r
940 if (!(a&1)) d <<= 4;\r
941\r
942 //dprintf("FIXME: decode, r3 = %02x", r3);\r
943\r
944 if (r3 == 8) {\r
945 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
946 } else if (r3 > 8) {\r
947 if (d) goto do_it;\r
948 } else {\r
949 goto do_it;\r
950 }\r
951\r
952 return;\r
953do_it:\r
954 *pd = d | (*pd & oldmask);\r
955}\r
956\r
957\r
958static void decode_write16(u32 a, u16 d, int r3)\r
959{\r
960 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
961\r
962 //if ((a & 0x3ffff) < 0x28000) return;\r
963\r
964 r3 &= 0x18;\r
965 d &= 0x0f0f;\r
966 d |= d >> 4;\r
967\r
968 if (r3 == 8) {\r
969 u8 dold = *pd;\r
970 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
971 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
972 *pd = dold;\r
973 } else if (r3 > 8) {\r
974 u8 dold = *pd;\r
975 if (!(d & 0xf0)) d |= dold & 0xf0;\r
976 if (!(d & 0x0f)) d |= dold & 0x0f;\r
977 *pd = d;\r
978 } else {\r
979 *pd = d;\r
980 }\r
981\r
982 //dprintf("FIXME: decode");\r
983}\r
984\r
985\r
cc68a136 986// -----------------------------------------------------------------\r
987\r
988void PicoWriteS68k8(u32 a,u8 d)\r
989{\r
990#ifdef __debug_io2\r
991 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
992#endif\r
993\r
994 a&=0xffffff;\r
995\r
996 // prg RAM\r
997 if (a < 0x80000) {\r
998 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
999 *pm=d;\r
1000 return;\r
1001 }\r
1002\r
1003 // regs\r
1004 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1005 a &= 0x1ff;\r
1006 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1007 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1008 gfx_cd_write(a&~1, (d<<8)|d);\r
1009 else s68k_reg_write8(a,d);\r
cc68a136 1010 return;\r
1011 }\r
1012\r
d0d47c5b 1013 // word RAM (2M area)\r
1014 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1015 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1016 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1017 if (r3 & 4) { // 1M decode mode?\r
1018 decode_write8(a, d, r3);\r
d0d47c5b 1019 } else {\r
1020 // allow access in any mode, like Gens does\r
fa1e5e29 1021 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1022 }\r
1023 return;\r
1024 }\r
1025\r
1026 // word RAM (1M area)\r
68cba51e 1027 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1028 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1029 int bank;\r
d0d47c5b 1030 if (d)\r
913ef4b7 1031 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1032// if (!(Pico_mcd->s68k_regs[3]&4))\r
1033// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1034 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1035 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1036 return;\r
1037 }\r
1038\r
4f265db7 1039 // PCM\r
1040 if ((a&0xff8000)==0xff0000) {\r
1041 a &= 0x7fff;\r
1042 if (a >= 0x2000)\r
1043 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1044 else if (a < 0x12)\r
1045 pcm_write(a>>1, d);\r
1046 return;\r
1047 }\r
1048\r
ab0607f7 1049 // bram\r
1050 if ((a&0xff0000)==0xfe0000) {\r
1051 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1052 SRam.changed = 1;\r
1053 return;\r
1054 }\r
1055\r
cc68a136 1056 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1057}\r
1058\r
ab0607f7 1059\r
cc68a136 1060void PicoWriteS68k16(u32 a,u16 d)\r
1061{\r
1062#ifdef __debug_io2\r
1063 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1064#endif\r
1065\r
1066 a&=0xfffffe;\r
1067\r
1068 // prg RAM\r
1069 if (a < 0x80000) {\r
1070 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1071 return;\r
1072 }\r
1073\r
1074 // regs\r
1075 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1076 a &= 0x1fe;\r
1077 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1078 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1079 gfx_cd_write(a, d);\r
1080 else {\r
1cd356a3 1081 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1082 Pico_mcd->s68k_regs[0xf] = d;\r
1083 return;\r
1084 }\r
cb4a513a 1085 s68k_reg_write8(a, d>>8);\r
1086 s68k_reg_write8(a+1,d&0xff);\r
1087 }\r
cc68a136 1088 return;\r
1089 }\r
1090\r
d0d47c5b 1091 // word RAM (2M area)\r
1092 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1093 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1094 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1095 if (r3 & 4) { // 1M decode mode?\r
1096 decode_write16(a, d, r3);\r
d0d47c5b 1097 } else {\r
1098 // allow access in any mode, like Gens does\r
fa1e5e29 1099 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1100 }\r
1101 return;\r
1102 }\r
1103\r
1104 // word RAM (1M area)\r
68cba51e 1105 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1106 int bank;\r
d0d47c5b 1107 if (d)\r
913ef4b7 1108 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1109// if (!(Pico_mcd->s68k_regs[3]&4))\r
1110// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1111 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1112 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1113 return;\r
1114 }\r
1115\r
4f265db7 1116 // PCM\r
1117 if ((a&0xff8000)==0xff0000) {\r
1118 a &= 0x7fff;\r
1119 if (a >= 0x2000)\r
1120 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1121 else if (a < 0x12)\r
1122 pcm_write(a>>1, d & 0xff);\r
1123 return;\r
1124 }\r
1125\r
ab0607f7 1126 // bram\r
1127 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1128 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1129 a = (a>>1)&0x1fff;\r
1130 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1131 Pico_mcd->bram[a++] = d >> 8;\r
1132 SRam.changed = 1;\r
1133 return;\r
1134 }\r
1135\r
cc68a136 1136 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1137}\r
1138\r
ab0607f7 1139\r
cc68a136 1140void PicoWriteS68k32(u32 a,u32 d)\r
1141{\r
1142#ifdef __debug_io2\r
1143 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1144#endif\r
1145\r
1146 a&=0xfffffe;\r
1147\r
1148 // prg RAM\r
1149 if (a < 0x80000) {\r
1150 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1151 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1152 return;\r
1153 }\r
1154\r
1155 // regs\r
1156 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1157 a &= 0x1fe;\r
1158 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1159 if (a >= 0x58 && a < 0x68) {\r
cb4a513a 1160 gfx_cd_write(a, d>>16);\r
1161 gfx_cd_write(a+2, d&0xffff);\r
1162 } else {\r
1163 s68k_reg_write8(a, d>>24);\r
1164 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1165 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1166 s68k_reg_write8(a+3, d &0xff);\r
1167 }\r
cc68a136 1168 return;\r
1169 }\r
1170\r
d0d47c5b 1171 // word RAM (2M area)\r
1172 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1173 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1174 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1175 if (r3 & 4) { // 1M decode mode?\r
1176 decode_write16(a , d >> 16, r3);\r
1177 decode_write16(a+2, d , r3);\r
d0d47c5b 1178 } else {\r
1179 // allow access in any mode, like Gens does\r
fa1e5e29 1180 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1181 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1182 }\r
1183 return;\r
1184 }\r
1185\r
1186 // word RAM (1M area)\r
68cba51e 1187 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1188 int bank;\r
1189 u16 *pm;\r
d0d47c5b 1190 if (d)\r
913ef4b7 1191 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1192// if (!(Pico_mcd->s68k_regs[3]&4))\r
1193// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1194 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1195 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1196 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1197 return;\r
1198 }\r
ab0607f7 1199\r
4f265db7 1200 // PCM\r
1201 if ((a&0xff8000)==0xff0000) {\r
1202 a &= 0x7fff;\r
1203 if (a >= 0x2000) {\r
1204 a >>= 1;\r
1205 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1206 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1207 } else if (a < 0x12) {\r
1208 a >>= 1;\r
1209 pcm_write(a, (d>>16) & 0xff);\r
1210 pcm_write(a+1, d & 0xff);\r
1211 }\r
1212 return;\r
1213 }\r
1214\r
ab0607f7 1215 // bram\r
1216 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1217 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1218 a = (a>>1)&0x1fff;\r
1219 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1220 Pico_mcd->bram[a++] = d >> 24;\r
1221 Pico_mcd->bram[a++] = d;\r
1222 Pico_mcd->bram[a++] = d >> 8;\r
1223 SRam.changed = 1;\r
1224 return;\r
1225 }\r
1226\r
cc68a136 1227 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1228}\r
1229\r
1230\r
1231\r
1232// -----------------------------------------------------------------\r
1233\r
b837b69b 1234\r
1235#if defined(EMU_C68K)\r
1236static __inline int PicoMemBaseM68k(u32 pc)\r
1237{\r
fa1e5e29 1238 if ((pc&0xe00000)==0xe00000)\r
1239 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1240\r
1241 if (pc < 0x20000)\r
fa1e5e29 1242 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1243\r
1244 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1245 {\r
fa1e5e29 1246 if (!(Pico_mcd->s68k_regs[3]&4))\r
1247 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1248 if (pc < 0x220000) {\r
1249 int bank = (Pico_mcd->s68k_regs[3]&1);\r
1250 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1251 }\r
b837b69b 1252 }\r
1253\r
fa1e5e29 1254 // Error - Program Counter is invalid\r
1255 dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
1256\r
1257 return (int)Pico_mcd->bios;\r
b837b69b 1258}\r
1259\r
1260\r
1261static u32 PicoCheckPcM68k(u32 pc)\r
1262{\r
1263 pc-=PicoCpu.membase; // Get real pc\r
1264 pc&=0xfffffe;\r
1265\r
1266 PicoCpu.membase=PicoMemBaseM68k(pc);\r
1267\r
1268 return PicoCpu.membase+pc;\r
1269}\r
1270\r
1271\r
1272static __inline int PicoMemBaseS68k(u32 pc)\r
1273{\r
fa1e5e29 1274 if (pc < 0x80000) // PRG RAM\r
1275 return (int)Pico_mcd->prg_ram;\r
b837b69b 1276\r
fa1e5e29 1277 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1278 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1279\r
1280 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
1281 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1282 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1283 }\r
1284\r
fa1e5e29 1285 // Error - Program Counter is invalid\r
1286 dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
1287\r
1288 return (int)Pico_mcd->prg_ram;\r
b837b69b 1289}\r
1290\r
1291\r
1292static u32 PicoCheckPcS68k(u32 pc)\r
1293{\r
1294 pc-=PicoCpuS68k.membase; // Get real pc\r
1295 pc&=0xfffffe;\r
1296\r
1297 PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
1298\r
1299 return PicoCpuS68k.membase+pc;\r
1300}\r
1301#endif\r
1302\r
1303\r
1304void PicoMemSetupCD()\r
1305{\r
1306 dprintf("PicoMemSetupCD()");\r
1307#ifdef EMU_C68K\r
1308 // Setup m68k memory callbacks:\r
1309 PicoCpu.checkpc=PicoCheckPcM68k;\r
1310 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
1311 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
1312 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
1313 PicoCpu.write8 =PicoWriteM68k8;\r
1314 PicoCpu.write16=PicoWriteM68k16;\r
1315 PicoCpu.write32=PicoWriteM68k32;\r
1316 // s68k\r
1317 PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
1318 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
1319 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
1320 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
1321 PicoCpuS68k.write8 =PicoWriteS68k8;\r
1322 PicoCpuS68k.write16=PicoWriteS68k16;\r
1323 PicoCpuS68k.write32=PicoWriteS68k32;\r
1324#endif\r
1325}\r
1326\r
1327\r
cc68a136 1328#ifdef EMU_M68K\r
1329unsigned char PicoReadCD8w (unsigned int a) {\r
1330 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1331}\r
1332unsigned short PicoReadCD16w(unsigned int a) {\r
1333 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1334}\r
1335unsigned int PicoReadCD32w(unsigned int a) {\r
1336 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1337}\r
1338void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1339 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1340}\r
1341void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1342 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1343}\r
1344void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1345 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1346}\r
1347\r
1348// these are allowed to access RAM\r
1349unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
1350 a&=0xffffff;\r
1351 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1352 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1353 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1354 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1355 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1356 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1357 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1358 }\r
1359 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1360 } else {\r
cc68a136 1361 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1362 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1363 if((a&0xfc0000)==0x200000) { // word RAM\r
1364 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1365 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1366 else if (a < 0x220000) {\r
1367 int bank = Pico_mcd->s68k_regs[3]&1;\r
1368 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1369 }\r
1370 }\r
1371 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1372 }\r
1373 return 0;//(u8) lastread_d;\r
1374}\r
1375unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
1376 a&=0xffffff;\r
1377 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1378 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1379 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1380 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1381 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1382 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1383 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1384 }\r
1385 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1386 } else {\r
cc68a136 1387 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1388 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1389 if((a&0xfc0000)==0x200000) { // word RAM\r
1390 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1391 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1392 else if (a < 0x220000) {\r
1393 int bank = Pico_mcd->s68k_regs[3]&1;\r
1394 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1395 }\r
1396 }\r
1397 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1398 }\r
b837b69b 1399 return 0;\r
cc68a136 1400}\r
1401unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
fa1e5e29 1402 u16 *pm;\r
cc68a136 1403 a&=0xffffff;\r
1404 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1405 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1406 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1407 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1408 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1409 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1410 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1411 return (pm[0]<<16)|pm[1];\r
1412 }\r
1413 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1414 } else {\r
cc68a136 1415 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1416 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1417 if((a&0xfc0000)==0x200000) { // word RAM\r
1418 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1419 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1420 else if (a < 0x220000) {\r
1421 int bank = Pico_mcd->s68k_regs[3]&1;\r
1422 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1423 return (pm[0]<<16)|pm[1];\r
1424 }\r
1425 }\r
1426 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1427 }\r
b837b69b 1428 return 0;\r
cc68a136 1429}\r
1430#endif // EMU_M68K\r
1431\r
fast MegaDrive/MegaCD/32X emulator