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[picodrive.git] / Pico / cd / Memory.c
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cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
b837b69b 4// (c) Copyright 2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9// A68K no longer supported here\r
10\r
11//#define __debug_io\r
12\r
13#include "../PicoInt.h"\r
14\r
15#include "../sound/sound.h"\r
16#include "../sound/ym2612.h"\r
17#include "../sound/sn76496.h"\r
18\r
cb4a513a 19#include "gfx_cd.h"\r
20\r
cc68a136 21typedef unsigned char u8;\r
22typedef unsigned short u16;\r
23typedef unsigned int u32;\r
24\r
25//#define __debug_io\r
26//#define __debug_io2\r
d1df8786 27//#define rdprintf dprintf\r
28#define rdprintf(...)\r
cc68a136 29\r
30// -----------------------------------------------------------------\r
31\r
cc68a136 32\r
cb4a513a 33static u32 m68k_reg_read16(u32 a)\r
cc68a136 34{\r
35 u32 d=0;\r
36 a &= 0x3e;\r
672ad671 37 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 38\r
39 switch (a) {\r
672ad671 40 case 0:\r
c459aefd 41 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 42 goto end;\r
cc68a136 43 case 2:\r
672ad671 44 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
bf098bc5 45 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
cc68a136 46 goto end;\r
c459aefd 47 case 4:\r
48 d = Pico_mcd->s68k_regs[4]<<8;\r
49 goto end;\r
50 case 6:\r
51 d = Pico_mcd->m.hint_vector;\r
52 goto end;\r
cc68a136 53 case 8:\r
cc68a136 54 d = Read_CDC_Host(0);\r
55 goto end;\r
c459aefd 56 case 0xA:\r
57 dprintf("m68k reserved read");\r
58 goto end;\r
cc68a136 59 case 0xC:\r
d1df8786 60 dprintf("m68k stopwatch timer read");\r
cc68a136 61 break;\r
62 }\r
63\r
cc68a136 64 if (a < 0x30) {\r
65 // comm flag/cmd/status (0xE-0x2F)\r
66 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
67 goto end;\r
68 }\r
69\r
70 dprintf("m68k_regs invalid read @ %02x", a);\r
71\r
72end:\r
73\r
672ad671 74 // dprintf("ret = %04x", d);\r
cc68a136 75 return d;\r
76}\r
77\r
cb4a513a 78static void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 79{\r
80 a &= 0x3f;\r
672ad671 81 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 82\r
83 switch (a) {\r
84 case 0:\r
672ad671 85 d &= 1;\r
cc68a136 86 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 87 return;\r
cc68a136 88 case 1:\r
672ad671 89 d &= 3;\r
51a902ae 90 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 91 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
92 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 93 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 94 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
51a902ae 95 Pico_mcd->m.state_flags&=~1;\r
672ad671 96 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 97 }\r
c459aefd 98 Pico_mcd->m.busreq = d;\r
99 return;\r
672ad671 100 case 2:\r
101 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
102 return;\r
cc68a136 103 case 3:\r
bf098bc5 104 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 105 d &= 0xc2;\r
106 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
107 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
108 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
109 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
110 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
111 d |= Pico_mcd->s68k_regs[3]&0x1d;\r
d0d47c5b 112 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
672ad671 113 Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
114 return;\r
c459aefd 115 case 6:\r
116 *((char *)&Pico_mcd->m.hint_vector+1) = d;\r
d1df8786 117 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 118 return;\r
119 case 7:\r
120 *(char *)&Pico_mcd->m.hint_vector = d;\r
d1df8786 121 Pico_mcd->bios[0x72] = d;\r
c459aefd 122 return;\r
cc68a136 123 case 0xe:\r
672ad671 124 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 125\r
672ad671 126 //dprintf("s68k @ %06x", SekPcS68k);\r
cc68a136 127\r
128 Pico_mcd->s68k_regs[0xe] = d;\r
c459aefd 129 return;\r
672ad671 130 }\r
131\r
132 if ((a&0xf0) == 0x10) {\r
cc68a136 133 Pico_mcd->s68k_regs[a] = d;\r
672ad671 134 return;\r
cc68a136 135 }\r
136\r
c459aefd 137 dprintf("m68k: invalid write? [%02x] %02x", a, d);\r
cc68a136 138}\r
139\r
140\r
141\r
cb4a513a 142static u32 s68k_reg_read16(u32 a)\r
cc68a136 143{\r
144 u32 d=0;\r
cc68a136 145\r
672ad671 146 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 147\r
148 switch (a) {\r
149 case 0:\r
cb4a513a 150 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
c459aefd 151 goto end;\r
672ad671 152 case 2:\r
153 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
bf098bc5 154 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
672ad671 155 goto end;\r
cc68a136 156 case 6:\r
157 d = CDC_Read_Reg();\r
158 goto end;\r
159 case 8:\r
cb4a513a 160 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 161 goto end;\r
162 case 0xC:\r
d1df8786 163 dprintf("s68k stopwatch timer read");\r
164 break;\r
165 case 0x30:\r
166 dprintf("s68k int3 timer read");\r
cc68a136 167 break;\r
168 case 0x34: // fader\r
169 d = 0; // no busy bit\r
170 goto end;\r
171 }\r
172\r
173 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
174\r
175end:\r
176\r
672ad671 177 // dprintf("ret = %04x", d);\r
cc68a136 178\r
179 return d;\r
180}\r
181\r
cb4a513a 182static void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 183{\r
672ad671 184 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 185\r
186 // TODO: review against Gens\r
187 switch (a) {\r
672ad671 188 case 2:\r
189 return; // only m68k can change WP\r
190 case 3:\r
bf098bc5 191 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 192 d &= 0x1d;\r
d0d47c5b 193 if (d&4) {\r
194 d |= Pico_mcd->s68k_regs[3]&0xc2;\r
195 if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
196 } else {\r
197 d |= Pico_mcd->s68k_regs[3]&0xc3;\r
198 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
199 }\r
672ad671 200 break;\r
cc68a136 201 case 4:\r
202 dprintf("s68k CDC dest: %x", d&7);\r
203 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
204 return;\r
205 case 5:\r
c459aefd 206 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 207 break;\r
208 case 7:\r
209 CDC_Write_Reg(d);\r
210 return;\r
211 case 0xa:\r
212 dprintf("s68k set CDC dma addr");\r
213 break;\r
d1df8786 214 case 0xc:\r
215 dprintf("s68k set stopwatch timer");\r
216 break;\r
217 case 0x31:\r
218 dprintf("s68k set int3 timer");\r
219 break;\r
cc68a136 220 case 0x33: // IRQ mask\r
221 dprintf("s68k irq mask: %02x", d);\r
222 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
223 CDD_Export_Status();\r
cc68a136 224 }\r
225 break;\r
226 case 0x34: // fader\r
227 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
228 return;\r
672ad671 229 case 0x36:\r
230 return; // d/m bit is unsetable\r
231 case 0x37: {\r
232 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
233 Pico_mcd->s68k_regs[0x37] = d&7;\r
234 if ((d&4) && !(d_old&4)) {\r
cc68a136 235 CDD_Export_Status();\r
cc68a136 236 }\r
672ad671 237 return;\r
238 }\r
cc68a136 239 case 0x4b:\r
240 Pico_mcd->s68k_regs[a] = (u8) d;\r
241 CDD_Import_Command();\r
242 return;\r
243 }\r
244\r
245 if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))\r
246 {\r
247 dprintf("m68k: invalid write @ %02x?", a);\r
248 return;\r
249 }\r
250\r
251 Pico_mcd->s68k_regs[a] = (u8) d;\r
252}\r
253\r
254\r
255\r
256\r
257\r
258static int PadRead(int i)\r
259{\r
260 int pad=0,value=0,TH;\r
261 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
262 TH=Pico.ioports[i+1]&0x40;\r
263\r
264 if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
265 int phase = Pico.m.padTHPhase[i];\r
266\r
267 if(phase == 2 && !TH) {\r
268 value=(pad&0xc0)>>2; // ?0SA 0000\r
269 goto end;\r
270 } else if(phase == 3 && TH) {\r
271 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
272 goto end;\r
273 } else if(phase == 3 && !TH) {\r
274 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
275 goto end;\r
276 }\r
277 }\r
278\r
279 if(TH) value=(pad&0x3f); // ?1CB RLDU\r
280 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
281\r
282 end:\r
283\r
284 // orr the bits, which are set as output\r
285 value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
286\r
287 return value; // will mirror later\r
288}\r
289\r
290static u8 z80Read8(u32 a)\r
291{\r
292 if(Pico.m.z80Run&1) return 0;\r
293\r
294 a&=0x1fff;\r
295\r
296 if(!(PicoOpt&4)) {\r
297 // Z80 disabled, do some faking\r
298 static u8 zerosent = 0;\r
299 if(a == Pico.m.z80_lastaddr) { // probably polling something\r
300 u8 d = Pico.m.z80_fakeval;\r
301 if((d & 0xf) == 0xf && !zerosent) {\r
302 d = 0; zerosent = 1;\r
303 } else {\r
304 Pico.m.z80_fakeval++;\r
305 zerosent = 0;\r
306 }\r
307 return d;\r
308 } else {\r
309 Pico.m.z80_fakeval = 0;\r
310 }\r
311 }\r
312\r
313 Pico.m.z80_lastaddr = (u16) a;\r
314 return Pico.zram[a];\r
315}\r
316\r
317\r
318// for nonstandard reads\r
319static u32 UnusualRead16(u32 a, int realsize)\r
320{\r
321 u32 d=0;\r
322\r
323 dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
324\r
325\r
326 dprintf("ret = %04x", d);\r
327 return d;\r
328}\r
329\r
330static u32 OtherRead16(u32 a, int realsize)\r
331{\r
332 u32 d=0;\r
333\r
334 if ((a&0xff0000)==0xa00000) {\r
335 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
336 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r
337 d=0xffff; goto end;\r
338 }\r
339 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
340 a=(a>>1)&0xf;\r
341 switch(a) {\r
342 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r
343 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
344 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
345 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
346 }\r
347 d|=d<<8;\r
348 goto end;\r
349 }\r
350 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
351 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r
352\r
353 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
354\r
672ad671 355 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 356 d=m68k_reg_read16(a);\r
672ad671 357 goto end;\r
358 }\r
cc68a136 359\r
360 d = UnusualRead16(a, realsize);\r
361\r
362end:\r
363 return d;\r
364}\r
365\r
366//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
367\r
368static void OtherWrite8(u32 a,u32 d,int realsize)\r
369{\r
370 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
371 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
372 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
373 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
374 a=(a>>1)&0xf;\r
375 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
376 if(PicoOpt&0x20) {\r
377 if(a==1) {\r
378 Pico.m.padDelay[0] = 0;\r
379 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
380 }\r
381 else if(a==2) {\r
382 Pico.m.padDelay[1] = 0;\r
383 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
384 }\r
385 }\r
386 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
387 return;\r
388 }\r
389 if (a==0xa11100) {\r
390 extern int z80startCycle, z80stopCycle;\r
391 //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
392 d&=1; d^=1;\r
393 if(!d) {\r
394 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
395 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r
396 z80stopCycle = SekCyclesDone();\r
397 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
398 } else {\r
399 z80startCycle = SekCyclesDone();\r
400 //if(Pico.m.scanline != -1)\r
401 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
402 }\r
403 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r
404 Pico.m.z80Run=(u8)d; return;\r
405 }\r
406 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r
407\r
408 if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
409 {\r
410 Pico.m.z80_bank68k>>=1;\r
411 Pico.m.z80_bank68k|=(d&1)<<8;\r
412 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
413 return;\r
414 }\r
415\r
416 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
417\r
cb4a513a 418 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 419\r
420 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
421}\r
422\r
423static void OtherWrite16(u32 a,u32 d)\r
424{\r
425 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
426 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
427\r
428 if ((a&0xffffe0)==0xa10000) { // I/O ports\r
429 a=(a>>1)&0xf;\r
430 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
431 if(PicoOpt&0x20) {\r
432 if(a==1) {\r
433 Pico.m.padDelay[0] = 0;\r
434 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
435 }\r
436 else if(a==2) {\r
437 Pico.m.padDelay[1] = 0;\r
438 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
439 }\r
440 }\r
441 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
442 return;\r
443 }\r
444 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
445 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r
446\r
447 OtherWrite8(a, d>>8, 16);\r
448 OtherWrite8(a+1,d&0xff, 16);\r
449}\r
450\r
451// -----------------------------------------------------------------\r
452// Read Rom and read Ram\r
453\r
454u8 PicoReadM68k8(u32 a)\r
455{\r
456 u32 d=0;\r
457\r
458 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
459\r
460 a&=0xffffff;\r
461\r
462 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
463\r
464 // prg RAM\r
465 if ((a&0xfe0000)==0x020000) {\r
672ad671 466 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 467 d = *(prg_bank+((a^1)&0x1ffff));\r
468 goto end;\r
469 }\r
470\r
b837b69b 471#if 0\r
472 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
473 {\r
474 int i;\r
475 FILE *ff;\r
476 unsigned short *ram = (unsigned short *) Pico.ram;\r
477 // unswap and dump RAM\r
478 for (i = 0; i < 0x10000/2; i++)\r
479 ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
480 ff = fopen("ram.bin", "wb");\r
481 fwrite(ram, 1, 0x10000, ff);\r
482 fclose(ff);\r
483 exit(0);\r
484 }\r
485#endif\r
486\r
d0d47c5b 487 // word RAM\r
488 if ((a&0xfc0000)==0x200000) {\r
489 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
490 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 491 if (a >= 0x220000) {\r
492 dprintf("cell");\r
493 } else {\r
494 a=((a&0x1fffe)<<1)|(a&1);\r
495 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
496 d = Pico_mcd->word_ram[a^1];\r
497 }\r
d0d47c5b 498 } else {\r
499 // allow access in any mode, like Gens does\r
500 d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
501 }\r
502 dprintf("ret = %02x", (u8)d);\r
503 goto end;\r
504 }\r
505\r
cc68a136 506 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
507\r
c459aefd 508 if ((a&0xffffc0)==0xa12000)\r
509 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 510\r
cc68a136 511 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
512\r
c459aefd 513 if ((a&0xffffc0)==0xa12000)\r
514 rdprintf("ret = %02x", (u8)d);\r
672ad671 515\r
cc68a136 516 end:\r
517\r
518#ifdef __debug_io\r
519 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
520#endif\r
521 return (u8)d;\r
522}\r
523\r
ab0607f7 524\r
cc68a136 525u16 PicoReadM68k16(u32 a)\r
526{\r
527 u16 d=0;\r
528\r
529 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
530\r
531 a&=0xfffffe;\r
532\r
533 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
534\r
535 // prg RAM\r
536 if ((a&0xfe0000)==0x020000) {\r
672ad671 537 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 538 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
539 goto end;\r
540 }\r
541\r
d0d47c5b 542 // word RAM\r
543 if ((a&0xfc0000)==0x200000) {\r
544 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
545 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 546 if (a >= 0x220000) {\r
547 dprintf("cell");\r
548 } else {\r
549 a=((a&0x1fffe)<<1);\r
550 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
551 d = *(u16 *)(Pico_mcd->word_ram+a);\r
552 }\r
d0d47c5b 553 } else {\r
554 // allow access in any mode, like Gens does\r
555 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
556 }\r
557 dprintf("ret = %04x", d);\r
558 goto end;\r
559 }\r
560\r
c459aefd 561 if ((a&0xffffc0)==0xa12000)\r
562 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 563\r
cc68a136 564 d = (u16)OtherRead16(a, 16);\r
565\r
c459aefd 566 if ((a&0xffffc0)==0xa12000)\r
567 rdprintf("ret = %04x", d);\r
672ad671 568\r
cc68a136 569 end:\r
570\r
571#ifdef __debug_io\r
572 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
573#endif\r
574 return d;\r
575}\r
576\r
ab0607f7 577\r
cc68a136 578u32 PicoReadM68k32(u32 a)\r
579{\r
580 u32 d=0;\r
581\r
582 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
583\r
584 a&=0xfffffe;\r
585\r
586 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
587\r
588 // prg RAM\r
589 if ((a&0xfe0000)==0x020000) {\r
672ad671 590 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 591 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
592 d = (pm[0]<<16)|pm[1];\r
593 goto end;\r
594 }\r
595\r
d0d47c5b 596 // word RAM\r
597 if ((a&0xfc0000)==0x200000) {\r
598 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
599 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 600 if (a >= 0x220000) {\r
601 dprintf("cell");\r
602 } else {\r
bf098bc5 603 a=((a&0x1fffe)<<1);\r
604 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
ab0607f7 605 d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
606 d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
bf098bc5 607 }\r
d0d47c5b 608 } else {\r
609 // allow access in any mode, like Gens does\r
610 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
611 }\r
612 dprintf("ret = %08x", d);\r
613 goto end;\r
614 }\r
615\r
c459aefd 616 if ((a&0xffffc0)==0xa12000)\r
617 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 618\r
cc68a136 619 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
620\r
c459aefd 621 if ((a&0xffffc0)==0xa12000)\r
622 rdprintf("ret = %08x", d);\r
672ad671 623\r
cc68a136 624 end:\r
625#ifdef __debug_io\r
626 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
627#endif\r
628 return d;\r
629}\r
630\r
ab0607f7 631\r
cc68a136 632// -----------------------------------------------------------------\r
633// Write Ram\r
634\r
635void PicoWriteM68k8(u32 a,u8 d)\r
636{\r
637#ifdef __debug_io\r
638 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
639#endif\r
640 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
641 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
642\r
643\r
ab0607f7 644 if ((a&0xe00000)==0xe00000) { // Ram\r
645 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
646 return;\r
647 }\r
cc68a136 648\r
649 a&=0xffffff;\r
650\r
651 // prg RAM\r
652 if ((a&0xfe0000)==0x020000) {\r
672ad671 653 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 654 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 655 return;\r
656 }\r
657\r
d0d47c5b 658 // word RAM\r
659 if ((a&0xfc0000)==0x200000) {\r
660 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
661 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 662 if (a >= 0x220000) {\r
663 dprintf("cell");\r
664 } else {\r
665 a=((a&0x1fffe)<<1)|(a&1);\r
666 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
667 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
668 }\r
d0d47c5b 669 } else {\r
670 // allow access in any mode, like Gens does\r
bf098bc5 671 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
d0d47c5b 672 }\r
673 return;\r
674 }\r
675\r
c459aefd 676 if ((a&0xffffc0)==0xa12000)\r
677 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
672ad671 678\r
cc68a136 679 OtherWrite8(a,d,8);\r
680}\r
681\r
ab0607f7 682\r
cc68a136 683void PicoWriteM68k16(u32 a,u16 d)\r
684{\r
685#ifdef __debug_io\r
686 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
687#endif\r
cc68a136 688 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
689\r
ab0607f7 690 if ((a&0xe00000)==0xe00000) { // Ram\r
691 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
692 return;\r
693 }\r
cc68a136 694\r
695 a&=0xfffffe;\r
696\r
697 // prg RAM\r
698 if ((a&0xfe0000)==0x020000) {\r
672ad671 699 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 700 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
701 return;\r
702 }\r
703\r
d0d47c5b 704 // word RAM\r
705 if ((a&0xfc0000)==0x200000) {\r
706 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
707 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 708 if (a >= 0x220000) {\r
709 dprintf("cell");\r
710 } else {\r
711 a=((a&0x1fffe)<<1);\r
712 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
713 *(u16 *)(Pico_mcd->word_ram+a)=d;\r
714 }\r
d0d47c5b 715 } else {\r
716 // allow access in any mode, like Gens does\r
717 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
718 }\r
719 return;\r
720 }\r
721\r
c459aefd 722 if ((a&0xffffc0)==0xa12000)\r
723 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
cc68a136 724\r
725 OtherWrite16(a,d);\r
726}\r
727\r
ab0607f7 728\r
cc68a136 729void PicoWriteM68k32(u32 a,u32 d)\r
730{\r
731#ifdef __debug_io\r
732 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
733#endif\r
734\r
735 if ((a&0xe00000)==0xe00000)\r
736 {\r
737 // Ram:\r
738 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
739 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
740 return;\r
741 }\r
742\r
743 a&=0xfffffe;\r
744\r
745 // prg RAM\r
746 if ((a&0xfe0000)==0x020000) {\r
672ad671 747 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 748 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
749 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
750 return;\r
751 }\r
752\r
672ad671 753 // word RAM\r
d0d47c5b 754 if ((a&0xfc0000)==0x200000) {\r
755 if (d != 0) // don't log clears\r
756 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
757 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
bf098bc5 758 if (a >= 0x220000) {\r
759 dprintf("cell");\r
760 } else {\r
bf098bc5 761 a=((a&0x1fffe)<<1);\r
762 if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
ab0607f7 763 *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
764 *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
bf098bc5 765 }\r
d0d47c5b 766 } else {\r
767 // allow access in any mode, like Gens does\r
768 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
769 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
770 }\r
672ad671 771 return;\r
d0d47c5b 772 }\r
672ad671 773\r
c459aefd 774 if ((a&0xffffc0)==0xa12000)\r
775 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
cc68a136 776\r
777 OtherWrite16(a, (u16)(d>>16));\r
778 OtherWrite16(a+2,(u16)d);\r
779}\r
780\r
781\r
782// -----------------------------------------------------------------\r
783\r
784\r
785u8 PicoReadS68k8(u32 a)\r
786{\r
787 u32 d=0;\r
788\r
789 a&=0xffffff;\r
790\r
791 // prg RAM\r
792 if (a < 0x80000) {\r
793 d = *(Pico_mcd->prg_ram+(a^1));\r
794 goto end;\r
795 }\r
796\r
797 // regs\r
798 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 799 a &= 0x1ff;\r
800 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
801 if (a >= 0x50 && a < 0x68)\r
802 d = gfx_cd_read(a&~1);\r
803 else d = s68k_reg_read16(a&~1);\r
804 if ((a&1)==0) d>>=8;\r
c459aefd 805 rdprintf("ret = %02x", (u8)d);\r
cc68a136 806 goto end;\r
807 }\r
808\r
d0d47c5b 809 // word RAM (2M area)\r
810 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
811 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);\r
812 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
813 // TODO (decode)\r
814 dprintf("(decode)");\r
815 } else {\r
816 // allow access in any mode, like Gens does\r
817 d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
818 }\r
819 dprintf("ret = %02x", (u8)d);\r
820 goto end;\r
821 }\r
822\r
823 // word RAM (1M area)\r
824 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
825 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);\r
bf098bc5 826 a=((a&0x1fffe)<<1)|(a&1);\r
827 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
828 d = Pico_mcd->word_ram[a^1];\r
829 dprintf("ret = %02x", (u8)d);\r
d0d47c5b 830 goto end;\r
831 }\r
832\r
ab0607f7 833 // bram\r
834 if ((a&0xff0000)==0xfe0000) {\r
835 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
836 goto end;\r
837 }\r
838\r
cc68a136 839 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
840\r
841 end:\r
842\r
843#ifdef __debug_io2\r
844 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
845#endif\r
846 return (u8)d;\r
847}\r
848\r
ab0607f7 849\r
cc68a136 850u16 PicoReadS68k16(u32 a)\r
851{\r
852 u16 d=0;\r
853\r
854 a&=0xfffffe;\r
855\r
856 // prg RAM\r
857 if (a < 0x80000) {\r
858 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
859 goto end;\r
860 }\r
861\r
862 // regs\r
863 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 864 a &= 0x1fe;\r
865 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
866 if (a >= 0x50 && a < 0x68)\r
867 d = gfx_cd_read(a);\r
868 else d = s68k_reg_read16(a);\r
c459aefd 869 rdprintf("ret = %04x", d);\r
cc68a136 870 goto end;\r
871 }\r
872\r
d0d47c5b 873 // word RAM (2M area)\r
874 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
875 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);\r
876 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
877 // TODO (decode)\r
878 dprintf("(decode)");\r
879 } else {\r
880 // allow access in any mode, like Gens does\r
881 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
882 }\r
ab0607f7 883 dprintf("ret = %04x", d);\r
d0d47c5b 884 goto end;\r
885 }\r
886\r
887 // word RAM (1M area)\r
888 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
889 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);\r
bf098bc5 890 a=((a&0x1fffe)<<1);\r
891 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
892 d = *(u16 *)(Pico_mcd->word_ram+a);\r
ab0607f7 893 dprintf("ret = %04x", d);\r
894 goto end;\r
895 }\r
896\r
897 // bram\r
898 if ((a&0xff0000)==0xfe0000) {\r
899 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPc);\r
900 a = (a>>1)&0x1fff;\r
901 d = Pico_mcd->bram[a++]; // Gens does little endian here, an so do we..\r
902 d|= Pico_mcd->bram[a++] << 8;\r
903 dprintf("ret = %04x", d);\r
d0d47c5b 904 goto end;\r
905 }\r
906\r
cc68a136 907 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
908\r
909 end:\r
910\r
911#ifdef __debug_io2\r
912 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
913#endif\r
914 return d;\r
915}\r
916\r
ab0607f7 917\r
cc68a136 918u32 PicoReadS68k32(u32 a)\r
919{\r
920 u32 d=0;\r
921\r
922 a&=0xfffffe;\r
923\r
924 // prg RAM\r
925 if (a < 0x80000) {\r
926 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
927 d = (pm[0]<<16)|pm[1];\r
928 goto end;\r
929 }\r
930\r
931 // regs\r
932 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 933 a &= 0x1fe;\r
934 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
935 if (a >= 0x50 && a < 0x68)\r
936 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
937 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 938 rdprintf("ret = %08x", d);\r
cc68a136 939 goto end;\r
940 }\r
941\r
d0d47c5b 942 // word RAM (2M area)\r
943 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
944 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);\r
945 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
946 // TODO (decode)\r
947 dprintf("(decode)");\r
948 } else {\r
949 // allow access in any mode, like Gens does\r
950 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
951 }\r
ab0607f7 952 dprintf("ret = %08x", d);\r
d0d47c5b 953 goto end;\r
954 }\r
955\r
956 // word RAM (1M area)\r
957 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
ab0607f7 958 dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPc);\r
bf098bc5 959 a=((a&0x1fffe)<<1);\r
960 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
ab0607f7 961 d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
962 d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
963 dprintf("ret = %08x", d);\r
964 goto end;\r
965 }\r
966\r
967 // bram\r
968 if ((a&0xff0000)==0xfe0000) {\r
969 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPc);\r
970 a = (a>>1)&0x1fff;\r
971 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
972 d|= Pico_mcd->bram[a++] << 24;\r
973 d|= Pico_mcd->bram[a++];\r
974 d|= Pico_mcd->bram[a++] << 8;\r
975 dprintf("ret = %08x", d);\r
d0d47c5b 976 goto end;\r
977 }\r
978\r
cc68a136 979 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
980\r
981 end:\r
982\r
983#ifdef __debug_io2\r
984 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
985#endif\r
986 return d;\r
987}\r
988\r
ab0607f7 989\r
cc68a136 990// -----------------------------------------------------------------\r
991\r
992void PicoWriteS68k8(u32 a,u8 d)\r
993{\r
994#ifdef __debug_io2\r
995 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
996#endif\r
997\r
998 a&=0xffffff;\r
999\r
1000 // prg RAM\r
1001 if (a < 0x80000) {\r
1002 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
1003 *pm=d;\r
1004 return;\r
1005 }\r
1006\r
672ad671 1007 if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack\r
1008 return;\r
1009\r
cc68a136 1010 // regs\r
1011 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1012 a &= 0x1ff;\r
1013 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
1014 if (a >= 0x50 && a < 0x68)\r
1015 gfx_cd_write(a&~1, (d<<8)|d);\r
1016 else s68k_reg_write8(a,d);\r
cc68a136 1017 return;\r
1018 }\r
1019\r
d0d47c5b 1020 // word RAM (2M area)\r
1021 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1022 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);\r
1023 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
1024 // TODO (decode)\r
1025 dprintf("(decode)");\r
1026 } else {\r
1027 // allow access in any mode, like Gens does\r
bf098bc5 1028 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
d0d47c5b 1029 }\r
1030 return;\r
1031 }\r
1032\r
1033 // word RAM (1M area)\r
1034 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1035 if (d)\r
1036 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);\r
bf098bc5 1037 a=((a&0x1fffe)<<1)|(a&1);\r
1038 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
1039 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
d0d47c5b 1040 return;\r
1041 }\r
1042\r
ab0607f7 1043 // bram\r
1044 if ((a&0xff0000)==0xfe0000) {\r
1045 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1046 SRam.changed = 1;\r
1047 return;\r
1048 }\r
1049\r
cc68a136 1050 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1051}\r
1052\r
ab0607f7 1053\r
cc68a136 1054void PicoWriteS68k16(u32 a,u16 d)\r
1055{\r
1056#ifdef __debug_io2\r
1057 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1058#endif\r
1059\r
1060 a&=0xfffffe;\r
1061\r
1062 // prg RAM\r
1063 if (a < 0x80000) {\r
1064 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1065 return;\r
1066 }\r
1067\r
1068 // regs\r
1069 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1070 a &= 0x1fe;\r
1071 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
1072 if (a >= 0x50 && a < 0x68)\r
1073 gfx_cd_write(a, d);\r
1074 else {\r
1075 s68k_reg_write8(a, d>>8);\r
1076 s68k_reg_write8(a+1,d&0xff);\r
1077 }\r
cc68a136 1078 return;\r
1079 }\r
1080\r
d0d47c5b 1081 // word RAM (2M area)\r
1082 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1083 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);\r
1084 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
1085 // TODO (decode)\r
1086 dprintf("(decode)");\r
1087 } else {\r
1088 // allow access in any mode, like Gens does\r
1089 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
1090 }\r
1091 return;\r
1092 }\r
1093\r
1094 // word RAM (1M area)\r
1095 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1096 if (d)\r
1097 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);\r
bf098bc5 1098 a=((a&0x1fffe)<<1);\r
1099 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
1100 *(u16 *)(Pico_mcd->word_ram+a)=d;\r
d0d47c5b 1101 return;\r
1102 }\r
1103\r
ab0607f7 1104 // bram\r
1105 if ((a&0xff0000)==0xfe0000) {\r
1106 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPc);\r
1107 a = (a>>1)&0x1fff;\r
1108 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1109 Pico_mcd->bram[a++] = d >> 8;\r
1110 SRam.changed = 1;\r
1111 return;\r
1112 }\r
1113\r
cc68a136 1114 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1115}\r
1116\r
ab0607f7 1117\r
cc68a136 1118void PicoWriteS68k32(u32 a,u32 d)\r
1119{\r
1120#ifdef __debug_io2\r
1121 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1122#endif\r
1123\r
1124 a&=0xfffffe;\r
1125\r
1126 // prg RAM\r
1127 if (a < 0x80000) {\r
1128 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1129 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1130 return;\r
1131 }\r
1132\r
1133 // regs\r
1134 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1135 a &= 0x1fe;\r
1136 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
1137 if (a >= 0x50 && a < 0x68) {\r
1138 gfx_cd_write(a, d>>16);\r
1139 gfx_cd_write(a+2, d&0xffff);\r
1140 } else {\r
1141 s68k_reg_write8(a, d>>24);\r
1142 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1143 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1144 s68k_reg_write8(a+3, d &0xff);\r
1145 }\r
cc68a136 1146 return;\r
1147 }\r
1148\r
d0d47c5b 1149 // word RAM (2M area)\r
1150 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1151 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);\r
1152 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
1153 // TODO (decode)\r
1154 dprintf("(decode)");\r
1155 } else {\r
1156 // allow access in any mode, like Gens does\r
1157 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
1158 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1159 }\r
1160 return;\r
1161 }\r
1162\r
1163 // word RAM (1M area)\r
1164 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1165 if (d)\r
1166 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);\r
bf098bc5 1167 a=((a&0x1fffe)<<1);\r
1168 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
ab0607f7 1169 *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
1170 *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
d0d47c5b 1171 return;\r
1172 }\r
ab0607f7 1173\r
1174 // bram\r
1175 if ((a&0xff0000)==0xfe0000) {\r
1176 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPc);\r
1177 a = (a>>1)&0x1fff;\r
1178 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1179 Pico_mcd->bram[a++] = d >> 24;\r
1180 Pico_mcd->bram[a++] = d;\r
1181 Pico_mcd->bram[a++] = d >> 8;\r
1182 SRam.changed = 1;\r
1183 return;\r
1184 }\r
1185\r
cc68a136 1186 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1187}\r
1188\r
1189\r
1190\r
1191// -----------------------------------------------------------------\r
1192\r
b837b69b 1193\r
1194#if defined(EMU_C68K)\r
1195static __inline int PicoMemBaseM68k(u32 pc)\r
1196{\r
1197 int membase=0;\r
1198\r
1199 if (pc < 0x20000)\r
1200 {\r
1201 membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r
1202 }\r
1203 else if ((pc&0xe00000)==0xe00000)\r
1204 {\r
1205 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
1206 }\r
1207 else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r
1208 {\r
1209 membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r
1210 }\r
1211 else\r
1212 {\r
1213 // Error - Program Counter is invalid\r
1214 dprintf("m68k: unhandled jump to %06x", pc);\r
1215 membase=(int)Pico.rom;\r
1216 }\r
1217\r
1218 return membase;\r
1219}\r
1220\r
1221\r
1222static u32 PicoCheckPcM68k(u32 pc)\r
1223{\r
1224 pc-=PicoCpu.membase; // Get real pc\r
1225 pc&=0xfffffe;\r
1226\r
1227 PicoCpu.membase=PicoMemBaseM68k(pc);\r
1228\r
1229 return PicoCpu.membase+pc;\r
1230}\r
1231\r
1232\r
1233static __inline int PicoMemBaseS68k(u32 pc)\r
1234{\r
1235 int membase;\r
1236\r
1237 membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r
1238 if (pc >= 0x80000)\r
1239 {\r
1240 // Error - Program Counter is invalid\r
1241 dprintf("s68k: unhandled jump to %06x", pc);\r
1242 }\r
1243\r
1244 return membase;\r
1245}\r
1246\r
1247\r
1248static u32 PicoCheckPcS68k(u32 pc)\r
1249{\r
1250 pc-=PicoCpuS68k.membase; // Get real pc\r
1251 pc&=0xfffffe;\r
1252\r
1253 PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
1254\r
1255 return PicoCpuS68k.membase+pc;\r
1256}\r
1257#endif\r
1258\r
1259\r
1260void PicoMemSetupCD()\r
1261{\r
1262 dprintf("PicoMemSetupCD()");\r
1263#ifdef EMU_C68K\r
1264 // Setup m68k memory callbacks:\r
1265 PicoCpu.checkpc=PicoCheckPcM68k;\r
1266 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
1267 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
1268 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
1269 PicoCpu.write8 =PicoWriteM68k8;\r
1270 PicoCpu.write16=PicoWriteM68k16;\r
1271 PicoCpu.write32=PicoWriteM68k32;\r
1272 // s68k\r
1273 PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
1274 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
1275 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
1276 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
1277 PicoCpuS68k.write8 =PicoWriteS68k8;\r
1278 PicoCpuS68k.write16=PicoWriteS68k16;\r
1279 PicoCpuS68k.write32=PicoWriteS68k32;\r
1280#endif\r
1281}\r
1282\r
1283\r
cc68a136 1284#ifdef EMU_M68K\r
1285unsigned char PicoReadCD8w (unsigned int a) {\r
1286 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1287}\r
1288unsigned short PicoReadCD16w(unsigned int a) {\r
1289 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1290}\r
1291unsigned int PicoReadCD32w(unsigned int a) {\r
1292 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1293}\r
1294void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1295 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1296}\r
1297void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1298 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1299}\r
1300void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1301 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1302}\r
1303\r
1304// these are allowed to access RAM\r
1305unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
1306 a&=0xffffff;\r
1307 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1308 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
b837b69b 1309 dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r
cc68a136 1310 } else {\r
b837b69b 1311 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
cc68a136 1312 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
b837b69b 1313 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
1314 return Pico_mcd->word_ram[(a^1)&0x3fffe];\r
1315 dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r
cc68a136 1316 }\r
1317 return 0;//(u8) lastread_d;\r
1318}\r
1319unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
1320 a&=0xffffff;\r
1321 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1322 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
b837b69b 1323 dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r
cc68a136 1324 } else {\r
b837b69b 1325 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
cc68a136 1326 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
b837b69b 1327 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
1328 return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
1329 dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r
cc68a136 1330 }\r
b837b69b 1331 return 0;\r
cc68a136 1332}\r
1333unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
1334 a&=0xffffff;\r
1335 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1336 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
b837b69b 1337 dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r
cc68a136 1338 } else {\r
b837b69b 1339 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
cc68a136 1340 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
b837b69b 1341 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
1342 { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1343 dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r
cc68a136 1344 }\r
b837b69b 1345 return 0;\r
cc68a136 1346}\r
1347#endif // EMU_M68K\r
1348\r
fast MegaDrive/MegaCD/32X emulator