notaz.gp2x.de / picodrive.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
updated changelog
[picodrive.git] / Pico / cd / Memory.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
b837b69b 4// (c) Copyright 2007 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9// A68K no longer supported here\r
10\r
11//#define __debug_io\r
12\r
13#include "../PicoInt.h"\r
14\r
15#include "../sound/sound.h"\r
16#include "../sound/ym2612.h"\r
17#include "../sound/sn76496.h"\r
18\r
cb4a513a 19#include "gfx_cd.h"\r
4f265db7 20#include "pcm.h"\r
cb4a513a 21\r
cc68a136 22typedef unsigned char u8;\r
23typedef unsigned short u16;\r
24typedef unsigned int u32;\r
25\r
26//#define __debug_io\r
27//#define __debug_io2\r
66fdc0f0 28\r
d1df8786 29//#define rdprintf dprintf\r
30#define rdprintf(...)\r
68cba51e 31//#define wrdprintf dprintf\r
913ef4b7 32#define wrdprintf(...)\r
cc68a136 33\r
34// -----------------------------------------------------------------\r
35\r
7a1f6e45 36// poller detection\r
7a1f6e45 37#define POLL_LIMIT 16\r
38#define POLL_CYCLES 124\r
39// int m68k_poll_addr, m68k_poll_cnt;\r
40unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 41\r
4ff2d527 42#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 43static u32 m68k_reg_read16(u32 a)\r
cc68a136 44{\r
45 u32 d=0;\r
46 a &= 0x3e;\r
672ad671 47 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 48\r
49 switch (a) {\r
672ad671 50 case 0:\r
c459aefd 51 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 52 goto end;\r
cc68a136 53 case 2:\r
672ad671 54 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
89fa852d 55 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
cc68a136 56 goto end;\r
c459aefd 57 case 4:\r
58 d = Pico_mcd->s68k_regs[4]<<8;\r
59 goto end;\r
60 case 6:\r
913ef4b7 61 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 62 goto end;\r
cc68a136 63 case 8:\r
cc68a136 64 d = Read_CDC_Host(0);\r
65 goto end;\r
c459aefd 66 case 0xA:\r
fa1e5e29 67 dprintf("m68k FIXME: reserved read");\r
c459aefd 68 goto end;\r
cc68a136 69 case 0xC:\r
1cd356a3 70 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 71 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 72 goto end;\r
cc68a136 73 }\r
74\r
cc68a136 75 if (a < 0x30) {\r
76 // comm flag/cmd/status (0xE-0x2F)\r
77 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
78 goto end;\r
79 }\r
80\r
fa1e5e29 81 dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 82\r
83end:\r
84\r
672ad671 85 // dprintf("ret = %04x", d);\r
cc68a136 86 return d;\r
87}\r
4ff2d527 88#endif\r
cc68a136 89\r
4ff2d527 90#ifndef _ASM_CD_MEMORY_C\r
91static\r
92#endif\r
93void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 94{\r
95 a &= 0x3f;\r
672ad671 96 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 97\r
98 switch (a) {\r
99 case 0:\r
672ad671 100 d &= 1;\r
cc68a136 101 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 102 return;\r
cc68a136 103 case 1:\r
672ad671 104 d &= 3;\r
51a902ae 105 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 106 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
107 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 108 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 109 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 110 Pico_mcd->m.state_flags&=~1;\r
111 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 112 }\r
c459aefd 113 Pico_mcd->m.busreq = d;\r
114 return;\r
672ad671 115 case 2:\r
116 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
117 return;\r
66fdc0f0 118 case 3: {\r
119 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
bf098bc5 120 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 121 d &= 0xc2;\r
66fdc0f0 122 if ((dold>>6) != ((d>>6)&3))\r
672ad671 123 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
124 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
125 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
126 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 127 if (dold & 4) {\r
128 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
129 } else {\r
130 //dold &= ~2; // ??\r
89fa852d 131#if 1\r
132 if ((d & 2) && !(dold & 2)) {\r
133 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
134 d &= ~2;\r
135 }\r
136#else\r
66fdc0f0 137 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 138#endif\r
66fdc0f0 139 }\r
140 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 141#ifdef USE_POLL_DETECT\r
142 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
143 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
144 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);\r
145 }\r
146#endif\r
672ad671 147 return;\r
66fdc0f0 148 }\r
c459aefd 149 case 6:\r
d1df8786 150 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 151 return;\r
152 case 7:\r
d1df8786 153 Pico_mcd->bios[0x72] = d;\r
913ef4b7 154 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 155 return;\r
7a1f6e45 156 case 0xf:\r
157 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 158 case 0xe:\r
672ad671 159 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 160 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 161#ifdef USE_POLL_DETECT\r
162 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
163 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
164 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);\r
165 }\r
166#endif\r
c459aefd 167 return;\r
672ad671 168 }\r
169\r
170 if ((a&0xf0) == 0x10) {\r
cc68a136 171 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 172#ifdef USE_POLL_DETECT\r
173 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
174 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
175 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);\r
176 }\r
177#endif\r
672ad671 178 return;\r
cc68a136 179 }\r
180\r
fa1e5e29 181 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 182}\r
183\r
184\r
913ef4b7 185#define READ_FONT_DATA(basemask) \\r
186{ \\r
187 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
188 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
189 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
190 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
191 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
192 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
193}\r
194\r
cc68a136 195\r
4ff2d527 196#ifndef _ASM_CD_MEMORY_C\r
197static\r
198#endif\r
199u32 s68k_reg_read16(u32 a)\r
cc68a136 200{\r
201 u32 d=0;\r
cc68a136 202\r
672ad671 203 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 204\r
205 switch (a) {\r
206 case 0:\r
7a1f6e45 207 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 208 case 2:\r
209 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
4ff2d527 210 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
7a1f6e45 211 goto poll_detect;\r
cc68a136 212 case 6:\r
7a1f6e45 213 return CDC_Read_Reg();\r
cc68a136 214 case 8:\r
7a1f6e45 215 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 216 case 0xC:\r
4f265db7 217 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 218 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 219 return d;\r
d1df8786 220 case 0x30:\r
7a1f6e45 221 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
222 return Pico_mcd->s68k_regs[31];\r
cc68a136 223 case 0x34: // fader\r
7a1f6e45 224 return 0; // no busy bit\r
913ef4b7 225 case 0x50: // font data (check: Lunar 2, Silpheed)\r
226 READ_FONT_DATA(0x00100000);\r
7a1f6e45 227 return d;\r
913ef4b7 228 case 0x52:\r
229 READ_FONT_DATA(0x00010000);\r
7a1f6e45 230 return d;\r
913ef4b7 231 case 0x54:\r
232 READ_FONT_DATA(0x10000000);\r
7a1f6e45 233 return d;\r
913ef4b7 234 case 0x56:\r
235 READ_FONT_DATA(0x01000000);\r
7a1f6e45 236 return d;\r
cc68a136 237 }\r
238\r
239 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
240\r
7a1f6e45 241 if (a >= 0x0e && a < 0x30) goto poll_detect;\r
cc68a136 242\r
7a1f6e45 243 return d;\r
cc68a136 244\r
7a1f6e45 245poll_detect:\r
246#ifdef USE_POLL_DETECT\r
247 // polling detection\r
248 if (a == (s68k_poll_adclk&0xfe)) {\r
249 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
250 if (clkdiff <= POLL_CYCLES) {\r
251 s68k_poll_cnt++;\r
252 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
253 if (s68k_poll_cnt > POLL_LIMIT) {\r
254 SekSetStopS68k(1);\r
255 //printf("%05i:%03i: s68k poll detected @ %06x, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, SekPcS68k, a);\r
256 }\r
257 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
258 return d;\r
259 }\r
260 }\r
261 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
262 s68k_poll_cnt = 0;\r
263\r
264#endif\r
cc68a136 265 return d;\r
266}\r
267\r
4ff2d527 268#ifndef _ASM_CD_MEMORY_C\r
269static\r
270#endif\r
271void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 272{\r
672ad671 273 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 274\r
275 // TODO: review against Gens\r
48e8482f 276 // Warning: d might have upper bits set\r
cc68a136 277 switch (a) {\r
672ad671 278 case 2:\r
279 return; // only m68k can change WP\r
fa1e5e29 280 case 3: {\r
281 int dold = Pico_mcd->s68k_regs[3];\r
89fa852d 282 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
672ad671 283 d &= 0x1d;\r
4ff2d527 284 d |= dold&0xc2;\r
d0d47c5b 285 if (d&4) {\r
4ff2d527 286 if ((d ^ dold) & 5) {\r
287 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
288#ifdef _ASM_CD_MEMORY_C\r
289 PicoMemResetCD(d);\r
290#endif\r
291 }\r
48e8482f 292#ifdef _ASM_CD_MEMORY_C\r
293 if ((d ^ dold) & 0x1d)\r
294 PicoMemResetCDdecode(d);\r
295#endif\r
fa1e5e29 296 if (!(dold & 4)) {\r
297 dprintf("wram mode 2M->1M");\r
298 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 299 }\r
d0d47c5b 300 } else {\r
fa1e5e29 301 if (dold & 4) {\r
302 dprintf("wram mode 1M->2M");\r
4ff2d527 303 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
304 d &= ~3;\r
305 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
306 }\r
fa1e5e29 307 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 308#ifdef _ASM_CD_MEMORY_C\r
309 PicoMemResetCD(d);\r
310#endif\r
311 }\r
312 else\r
313 d |= dold&1;\r
314 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 315 }\r
672ad671 316 break;\r
fa1e5e29 317 }\r
cc68a136 318 case 4:\r
319 dprintf("s68k CDC dest: %x", d&7);\r
320 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
321 return;\r
322 case 5:\r
c459aefd 323 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 324 break;\r
325 case 7:\r
326 CDC_Write_Reg(d);\r
327 return;\r
328 case 0xa:\r
329 dprintf("s68k set CDC dma addr");\r
330 break;\r
d1df8786 331 case 0xc:\r
4f265db7 332 case 0xd:\r
d1df8786 333 dprintf("s68k set stopwatch timer");\r
4f265db7 334 Pico_mcd->m.timer_stopwatch = 0;\r
335 return;\r
1cd356a3 336 case 0xe:\r
7a1f6e45 337 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 338 return;\r
d1df8786 339 case 0x31:\r
4f265db7 340 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 341 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 342 break;\r
cc68a136 343 case 0x33: // IRQ mask\r
344 dprintf("s68k irq mask: %02x", d);\r
345 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
346 CDD_Export_Status();\r
cc68a136 347 }\r
348 break;\r
349 case 0x34: // fader\r
350 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
351 return;\r
672ad671 352 case 0x36:\r
353 return; // d/m bit is unsetable\r
354 case 0x37: {\r
355 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
356 Pico_mcd->s68k_regs[0x37] = d&7;\r
357 if ((d&4) && !(d_old&4)) {\r
cc68a136 358 CDD_Export_Status();\r
cc68a136 359 }\r
672ad671 360 return;\r
361 }\r
cc68a136 362 case 0x4b:\r
363 Pico_mcd->s68k_regs[a] = (u8) d;\r
364 CDD_Import_Command();\r
365 return;\r
366 }\r
367\r
1cd356a3 368 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 369 {\r
fa1e5e29 370 dprintf("s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 371 return;\r
372 }\r
373\r
374 Pico_mcd->s68k_regs[a] = (u8) d;\r
375}\r
376\r
377\r
4ff2d527 378#ifndef _ASM_CD_MEMORY_C\r
fa1e5e29 379static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 380{\r
381 u32 d=0;\r
382\r
672ad671 383 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 384 d=m68k_reg_read16(a);\r
672ad671 385 goto end;\r
386 }\r
cc68a136 387\r
fa1e5e29 388 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 389\r
390end:\r
391 return d;\r
392}\r
393\r
cc68a136 394\r
fa1e5e29 395static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 396{\r
cb4a513a 397 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 398\r
fa1e5e29 399 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 400}\r
401\r
cc68a136 402\r
fa1e5e29 403#undef _ASM_MEMORY_C\r
404#include "../MemoryCmn.c"\r
4ff2d527 405#include "cell_map.c"\r
406#endif // !def _ASM_CD_MEMORY_C\r
cc68a136 407\r
408// -----------------------------------------------------------------\r
409// Read Rom and read Ram\r
410\r
4ff2d527 411//u8 PicoReadM68k8_(u32 a);\r
412#ifdef _ASM_CD_MEMORY_C\r
413u8 PicoReadM68k8(u32 a);\r
414#else\r
415static u8 PicoReadM68k8(u32 a)\r
cc68a136 416{\r
417 u32 d=0;\r
418\r
419 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
420\r
421 a&=0xffffff;\r
422\r
423 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
424\r
425 // prg RAM\r
4ff2d527 426 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 427 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 428 d = *(prg_bank+((a^1)&0x1ffff));\r
429 goto end;\r
430 }\r
431\r
d0d47c5b 432 // word RAM\r
433 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 434 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
d0d47c5b 435 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 436 int bank = Pico_mcd->s68k_regs[3]&1;\r
437 if (a >= 0x220000)\r
438 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
439 else a &= 0x1ffff;\r
440 d = Pico_mcd->word_ram1M[bank][a^1];\r
d0d47c5b 441 } else {\r
442 // allow access in any mode, like Gens does\r
fa1e5e29 443 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 444 }\r
913ef4b7 445 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 446 goto end;\r
447 }\r
448\r
cc68a136 449 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
450\r
c459aefd 451 if ((a&0xffffc0)==0xa12000)\r
452 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 453\r
cc68a136 454 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
455\r
c459aefd 456 if ((a&0xffffc0)==0xa12000)\r
457 rdprintf("ret = %02x", (u8)d);\r
672ad671 458\r
cc68a136 459 end:\r
460\r
461#ifdef __debug_io\r
462 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
463#endif\r
464 return (u8)d;\r
465}\r
4ff2d527 466#endif\r
cc68a136 467\r
ab0607f7 468\r
4ff2d527 469#ifdef _ASM_CD_MEMORY_C\r
470u16 PicoReadM68k16(u32 a);\r
471#else\r
472static u16 PicoReadM68k16(u32 a)\r
cc68a136 473{\r
474 u16 d=0;\r
475\r
476 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
477\r
478 a&=0xfffffe;\r
479\r
480 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
481\r
482 // prg RAM\r
4ff2d527 483 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 484 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 485 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
486 goto end;\r
487 }\r
488\r
d0d47c5b 489 // word RAM\r
490 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 491 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
d0d47c5b 492 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 493 int bank = Pico_mcd->s68k_regs[3]&1;\r
494 if (a >= 0x220000)\r
495 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
496 else a &= 0x1fffe;\r
497 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
d0d47c5b 498 } else {\r
499 // allow access in any mode, like Gens does\r
fa1e5e29 500 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 501 }\r
913ef4b7 502 wrdprintf("ret = %04x", d);\r
d0d47c5b 503 goto end;\r
504 }\r
505\r
c459aefd 506 if ((a&0xffffc0)==0xa12000)\r
507 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 508\r
cc68a136 509 d = (u16)OtherRead16(a, 16);\r
510\r
c459aefd 511 if ((a&0xffffc0)==0xa12000)\r
512 rdprintf("ret = %04x", d);\r
672ad671 513\r
cc68a136 514 end:\r
515\r
516#ifdef __debug_io\r
517 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
518#endif\r
519 return d;\r
520}\r
4ff2d527 521#endif\r
cc68a136 522\r
ab0607f7 523\r
4ff2d527 524#ifdef _ASM_CD_MEMORY_C\r
525u32 PicoReadM68k32(u32 a);\r
526#else\r
527static u32 PicoReadM68k32(u32 a)\r
cc68a136 528{\r
529 u32 d=0;\r
530\r
531 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
532\r
533 a&=0xfffffe;\r
534\r
535 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
536\r
537 // prg RAM\r
4ff2d527 538 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 539 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 540 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
541 d = (pm[0]<<16)|pm[1];\r
542 goto end;\r
543 }\r
544\r
d0d47c5b 545 // word RAM\r
546 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 547 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
d0d47c5b 548 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 549 int bank = Pico_mcd->s68k_regs[3]&1;\r
550 if (a >= 0x220000) { // cell arranged\r
551 u32 a1, a2;\r
552 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 553 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
554 else a2 = a1 + 2;\r
555 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
556 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 557 } else {\r
fa1e5e29 558 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
bf098bc5 559 }\r
d0d47c5b 560 } else {\r
561 // allow access in any mode, like Gens does\r
fa1e5e29 562 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 563 }\r
913ef4b7 564 wrdprintf("ret = %08x", d);\r
d0d47c5b 565 goto end;\r
566 }\r
567\r
c459aefd 568 if ((a&0xffffc0)==0xa12000)\r
569 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
672ad671 570\r
cc68a136 571 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
572\r
c459aefd 573 if ((a&0xffffc0)==0xa12000)\r
574 rdprintf("ret = %08x", d);\r
672ad671 575\r
cc68a136 576 end:\r
577#ifdef __debug_io\r
578 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
579#endif\r
580 return d;\r
581}\r
4ff2d527 582#endif\r
cc68a136 583\r
ab0607f7 584\r
cc68a136 585// -----------------------------------------------------------------\r
586// Write Ram\r
587\r
4ff2d527 588#ifdef _ASM_CD_MEMORY_C\r
589void PicoWriteM68k8(u32 a,u8 d);\r
590#else\r
591static void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 592{\r
593#ifdef __debug_io\r
594 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
595#endif\r
596 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
597 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
598\r
599\r
ab0607f7 600 if ((a&0xe00000)==0xe00000) { // Ram\r
601 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
602 return;\r
603 }\r
cc68a136 604\r
605 a&=0xffffff;\r
606\r
607 // prg RAM\r
4ff2d527 608 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 609 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 610 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 611 return;\r
612 }\r
613\r
d0d47c5b 614 // word RAM\r
615 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 616 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 617 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 618 int bank = Pico_mcd->s68k_regs[3]&1;\r
619 if (a >= 0x220000)\r
620 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
621 else a &= 0x1ffff;\r
622 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 623 } else {\r
624 // allow access in any mode, like Gens does\r
fa1e5e29 625 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 626 }\r
627 return;\r
628 }\r
629\r
c459aefd 630 if ((a&0xffffc0)==0xa12000)\r
631 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
672ad671 632\r
cc68a136 633 OtherWrite8(a,d,8);\r
634}\r
4ff2d527 635#endif\r
cc68a136 636\r
ab0607f7 637\r
4ff2d527 638#ifdef _ASM_CD_MEMORY_C\r
639void PicoWriteM68k16(u32 a,u16 d);\r
640#else\r
641static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 642{\r
643#ifdef __debug_io\r
644 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
645#endif\r
cc68a136 646 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
647\r
ab0607f7 648 if ((a&0xe00000)==0xe00000) { // Ram\r
649 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
650 return;\r
651 }\r
cc68a136 652\r
653 a&=0xfffffe;\r
654\r
655 // prg RAM\r
4ff2d527 656 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 657 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 658 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
659 return;\r
660 }\r
661\r
d0d47c5b 662 // word RAM\r
663 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 664 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 665 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 666 int bank = Pico_mcd->s68k_regs[3]&1;\r
667 if (a >= 0x220000)\r
668 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
669 else a &= 0x1fffe;\r
670 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 671 } else {\r
672 // allow access in any mode, like Gens does\r
fa1e5e29 673 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 674 }\r
675 return;\r
676 }\r
677\r
7a1f6e45 678 // regs\r
679 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 680 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 681 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
682 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
683#ifdef USE_POLL_DETECT\r
684 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
685 SekSetStopS68k(0); s68k_poll_adclk = -1;\r
686 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);\r
687 }\r
688#endif\r
689 return;\r
690 }\r
691 m68k_reg_write8(a, d>>8);\r
692 m68k_reg_write8(a+1,d&0xff);\r
693 return;\r
694 }\r
cc68a136 695\r
696 OtherWrite16(a,d);\r
697}\r
4ff2d527 698#endif\r
cc68a136 699\r
ab0607f7 700\r
4ff2d527 701#ifdef _ASM_CD_MEMORY_C\r
702void PicoWriteM68k32(u32 a,u32 d);\r
703#else\r
704static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 705{\r
706#ifdef __debug_io\r
707 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
708#endif\r
709\r
710 if ((a&0xe00000)==0xe00000)\r
711 {\r
712 // Ram:\r
713 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
714 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
715 return;\r
716 }\r
717\r
718 a&=0xfffffe;\r
719\r
720 // prg RAM\r
4ff2d527 721 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {\r
672ad671 722 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 723 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
724 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
725 return;\r
726 }\r
727\r
672ad671 728 // word RAM\r
d0d47c5b 729 if ((a&0xfc0000)==0x200000) {\r
730 if (d != 0) // don't log clears\r
913ef4b7 731 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 732 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 733 int bank = Pico_mcd->s68k_regs[3]&1;\r
734 if (a >= 0x220000) { // cell arranged\r
735 u32 a1, a2;\r
736 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 737 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
738 else a2 = a1 + 2;\r
739 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
740 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 741 } else {\r
fa1e5e29 742 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
743 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 744 }\r
d0d47c5b 745 } else {\r
746 // allow access in any mode, like Gens does\r
fa1e5e29 747 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 748 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
749 }\r
672ad671 750 return;\r
d0d47c5b 751 }\r
672ad671 752\r
c459aefd 753 if ((a&0xffffc0)==0xa12000)\r
754 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
cc68a136 755\r
756 OtherWrite16(a, (u16)(d>>16));\r
757 OtherWrite16(a+2,(u16)d);\r
758}\r
4ff2d527 759#endif\r
cc68a136 760\r
761\r
762// -----------------------------------------------------------------\r
763\r
4ff2d527 764#ifdef _ASM_CD_MEMORY_C\r
765u8 PicoReadS68k8(u32 a);\r
766#else\r
767static u8 PicoReadS68k8(u32 a)\r
cc68a136 768{\r
769 u32 d=0;\r
770\r
771 a&=0xffffff;\r
772\r
773 // prg RAM\r
774 if (a < 0x80000) {\r
775 d = *(Pico_mcd->prg_ram+(a^1));\r
776 goto end;\r
777 }\r
778\r
779 // regs\r
780 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 781 a &= 0x1ff;\r
782 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 783 if (a >= 0x58 && a < 0x68)\r
cb4a513a 784 d = gfx_cd_read(a&~1);\r
785 else d = s68k_reg_read16(a&~1);\r
786 if ((a&1)==0) d>>=8;\r
c459aefd 787 rdprintf("ret = %02x", (u8)d);\r
cc68a136 788 goto end;\r
789 }\r
790\r
d0d47c5b 791 // word RAM (2M area)\r
792 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 793 // test: batman returns\r
913ef4b7 794 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 795 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
796 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
797 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
798 if (a&1) d &= 0x0f;\r
799 else d >>= 4;\r
800 dprintf("FIXME: decode");\r
d0d47c5b 801 } else {\r
802 // allow access in any mode, like Gens does\r
fa1e5e29 803 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 804 }\r
913ef4b7 805 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 806 goto end;\r
807 }\r
808\r
809 // word RAM (1M area)\r
68cba51e 810 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 811 int bank;\r
913ef4b7 812 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 813// if (!(Pico_mcd->s68k_regs[3]&4))\r
814// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 815 bank = !(Pico_mcd->s68k_regs[3]&1);\r
816 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 817 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 818 goto end;\r
819 }\r
820\r
4f265db7 821 // PCM\r
822 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 823 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 824 a &= 0x7fff;\r
825 if (a >= 0x2000)\r
826 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
827 else if (a >= 0x20) {\r
828 a &= 0x1e;\r
829 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
830 if (a & 2) d >>= 8;\r
831 }\r
832 dprintf("ret = %02x", (u8)d);\r
833 goto end;\r
834 }\r
835\r
ab0607f7 836 // bram\r
837 if ((a&0xff0000)==0xfe0000) {\r
838 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
839 goto end;\r
840 }\r
841\r
cc68a136 842 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
843\r
844 end:\r
845\r
846#ifdef __debug_io2\r
847 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
848#endif\r
849 return (u8)d;\r
850}\r
4ff2d527 851#endif\r
cc68a136 852\r
ab0607f7 853\r
4ff2d527 854//u16 PicoReadS68k16_(u32 a);\r
855#ifdef _ASM_CD_MEMORY_C\r
856u16 PicoReadS68k16(u32 a);\r
857#else\r
858static u16 PicoReadS68k16(u32 a)\r
cc68a136 859{\r
4f265db7 860 u32 d=0;\r
cc68a136 861\r
862 a&=0xfffffe;\r
863\r
864 // prg RAM\r
865 if (a < 0x80000) {\r
866 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
867 goto end;\r
868 }\r
869\r
870 // regs\r
871 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 872 a &= 0x1fe;\r
873 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 874 if (a >= 0x58 && a < 0x68)\r
cb4a513a 875 d = gfx_cd_read(a);\r
876 else d = s68k_reg_read16(a);\r
c459aefd 877 rdprintf("ret = %04x", d);\r
cc68a136 878 goto end;\r
879 }\r
880\r
d0d47c5b 881 // word RAM (2M area)\r
882 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 883 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 884 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
885 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
886 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
887 d |= d << 4; d &= ~0xf0;\r
888 dprintf("FIXME: decode");\r
d0d47c5b 889 } else {\r
890 // allow access in any mode, like Gens does\r
fa1e5e29 891 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 892 }\r
913ef4b7 893 wrdprintf("ret = %04x", d);\r
d0d47c5b 894 goto end;\r
895 }\r
896\r
897 // word RAM (1M area)\r
68cba51e 898 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 899 int bank;\r
913ef4b7 900 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 901// if (!(Pico_mcd->s68k_regs[3]&4))\r
902// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 903 bank = !(Pico_mcd->s68k_regs[3]&1);\r
904 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 905 wrdprintf("ret = %04x", d);\r
ab0607f7 906 goto end;\r
907 }\r
908\r
909 // bram\r
910 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 911 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 912 a = (a>>1)&0x1fff;\r
4f265db7 913 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 914 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 915 dprintf("ret = %04x", d);\r
d0d47c5b 916 goto end;\r
917 }\r
918\r
4f265db7 919 // PCM\r
920 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 921 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 922 a &= 0x7fff;\r
923 if (a >= 0x2000)\r
924 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
925 else if (a >= 0x20) {\r
926 a &= 0x1e;\r
927 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
928 if (a & 2) d >>= 8;\r
929 }\r
930 dprintf("ret = %04x", d);\r
931 goto end;\r
932 }\r
933\r
cc68a136 934 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
935\r
936 end:\r
937\r
938#ifdef __debug_io2\r
939 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
940#endif\r
941 return d;\r
942}\r
4ff2d527 943#endif\r
cc68a136 944\r
ab0607f7 945\r
4ff2d527 946#ifdef _ASM_CD_MEMORY_C\r
947u32 PicoReadS68k32(u32 a);\r
948#else\r
949static u32 PicoReadS68k32(u32 a)\r
cc68a136 950{\r
951 u32 d=0;\r
952\r
953 a&=0xfffffe;\r
954\r
955 // prg RAM\r
956 if (a < 0x80000) {\r
957 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
958 d = (pm[0]<<16)|pm[1];\r
959 goto end;\r
960 }\r
961\r
962 // regs\r
963 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 964 a &= 0x1fe;\r
965 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 966 if (a >= 0x58 && a < 0x68)\r
cb4a513a 967 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
968 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 969 rdprintf("ret = %08x", d);\r
cc68a136 970 goto end;\r
971 }\r
972\r
d0d47c5b 973 // word RAM (2M area)\r
974 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 975 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 976 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
977 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
978 a >>= 1;\r
979 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
980 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
981 d |= d << 4; d &= 0x0f0f0f0f;\r
982 dprintf("FIXME: decode");\r
d0d47c5b 983 } else {\r
984 // allow access in any mode, like Gens does\r
fa1e5e29 985 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 986 }\r
913ef4b7 987 wrdprintf("ret = %08x", d);\r
d0d47c5b 988 goto end;\r
989 }\r
990\r
991 // word RAM (1M area)\r
68cba51e 992 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 993 int bank;\r
913ef4b7 994 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 995// if (!(Pico_mcd->s68k_regs[3]&4))\r
996// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 997 bank = !(Pico_mcd->s68k_regs[3]&1);\r
998 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 999 wrdprintf("ret = %08x", d);\r
ab0607f7 1000 goto end;\r
1001 }\r
1002\r
4f265db7 1003 // PCM\r
1004 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1005 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1006 a &= 0x7fff;\r
1007 if (a >= 0x2000) {\r
1008 a >>= 1;\r
1009 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1010 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1011 } else if (a >= 0x20) {\r
1012 a &= 0x1e;\r
1013 if (a & 2) {\r
1014 a >>= 2;\r
1015 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1016 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1017 } else {\r
1018 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1019 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1020 }\r
1021 }\r
1022 dprintf("ret = %08x", d);\r
1023 goto end;\r
1024 }\r
1025\r
ab0607f7 1026 // bram\r
1027 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1028 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1029 a = (a>>1)&0x1fff;\r
1030 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1031 d|= Pico_mcd->bram[a++] << 24;\r
1032 d|= Pico_mcd->bram[a++];\r
1033 d|= Pico_mcd->bram[a++] << 8;\r
1034 dprintf("ret = %08x", d);\r
d0d47c5b 1035 goto end;\r
1036 }\r
1037\r
cc68a136 1038 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1039\r
1040 end:\r
1041\r
1042#ifdef __debug_io2\r
1043 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1044#endif\r
1045 return d;\r
1046}\r
4ff2d527 1047#endif\r
cc68a136 1048\r
ab0607f7 1049\r
a4030801 1050#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1051/* check: jaguar xj 220 (draws entire world using decode) */\r
1052static void decode_write8(u32 a, u8 d, int r3)\r
1053{\r
1054 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
1055 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1056\r
0a051f55 1057 r3 &= 0x18;\r
1058 d &= 0x0f;\r
1059 if (!(a&1)) d <<= 4;\r
1060\r
1061 //dprintf("FIXME: decode, r3 = %02x", r3);\r
1062\r
1063 if (r3 == 8) {\r
1064 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1065 } else if (r3 > 8) {\r
1066 if (d) goto do_it;\r
1067 } else {\r
1068 goto do_it;\r
1069 }\r
1070\r
1071 return;\r
1072do_it:\r
1073 *pd = d | (*pd & oldmask);\r
1074}\r
1075\r
1076\r
1077static void decode_write16(u32 a, u16 d, int r3)\r
1078{\r
1079 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);\r
1080\r
1081 //if ((a & 0x3ffff) < 0x28000) return;\r
1082\r
1083 r3 &= 0x18;\r
1084 d &= 0x0f0f;\r
1085 d |= d >> 4;\r
1086\r
1087 if (r3 == 8) {\r
1088 u8 dold = *pd;\r
1089 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1090 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1091 *pd = dold;\r
1092 } else if (r3 > 8) {\r
1093 u8 dold = *pd;\r
1094 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1095 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1096 *pd = d;\r
1097 } else {\r
1098 *pd = d;\r
1099 }\r
1100\r
1101 //dprintf("FIXME: decode");\r
1102}\r
a4030801 1103#endif\r
0a051f55 1104\r
cc68a136 1105// -----------------------------------------------------------------\r
1106\r
48e8482f 1107//void PicoWriteS68k8_(u32 a,u8 d);\r
1108//void PicoWriteS68k8__(u32 a,u8 d);\r
4ff2d527 1109#ifdef _ASM_CD_MEMORY_C\r
1110void PicoWriteS68k8(u32 a,u8 d);\r
1111#else\r
1112static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1113{\r
1114#ifdef __debug_io2\r
1115 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1116#endif\r
1117\r
1118 a&=0xffffff;\r
48e8482f 1119#if 0\r
1120 PicoWriteS68k8_(a, d);\r
1121/* if ((a&0xfc0000)!=0x080000) {\r
1122 PicoWriteS68k8_(a, d);\r
1123 return;\r
1124 }\r
1125 printf("r3: %02x\n", Pico_mcd->s68k_regs[3]);\r
1126 PicoWriteS68k8__(a,d);*/\r
1127 return;\r
1128#endif\r
cc68a136 1129\r
1130 // prg RAM\r
1131 if (a < 0x80000) {\r
1132 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
1133 *pm=d;\r
1134 return;\r
1135 }\r
1136\r
1137 // regs\r
1138 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1139 a &= 0x1ff;\r
1140 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1141 if (a >= 0x58 && a < 0x68)\r
48e8482f 1142 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1143 else s68k_reg_write8(a,d);\r
cc68a136 1144 return;\r
1145 }\r
1146\r
d0d47c5b 1147 // word RAM (2M area)\r
1148 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1149 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1150 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1151 if (r3 & 4) { // 1M decode mode?\r
1152 decode_write8(a, d, r3);\r
d0d47c5b 1153 } else {\r
1154 // allow access in any mode, like Gens does\r
fa1e5e29 1155 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1156 }\r
1157 return;\r
1158 }\r
1159\r
1160 // word RAM (1M area)\r
68cba51e 1161 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1162 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1163 int bank;\r
d0d47c5b 1164 if (d)\r
913ef4b7 1165 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1166// if (!(Pico_mcd->s68k_regs[3]&4))\r
1167// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1168 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1169 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1170 return;\r
1171 }\r
1172\r
4f265db7 1173 // PCM\r
1174 if ((a&0xff8000)==0xff0000) {\r
1175 a &= 0x7fff;\r
1176 if (a >= 0x2000)\r
1177 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1178 else if (a < 0x12)\r
1179 pcm_write(a>>1, d);\r
1180 return;\r
1181 }\r
1182\r
ab0607f7 1183 // bram\r
1184 if ((a&0xff0000)==0xfe0000) {\r
1185 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1186 SRam.changed = 1;\r
1187 return;\r
1188 }\r
1189\r
cc68a136 1190 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1191}\r
4ff2d527 1192#endif\r
cc68a136 1193\r
ab0607f7 1194\r
4ff2d527 1195#ifdef _ASM_CD_MEMORY_C\r
1196void PicoWriteS68k16(u32 a,u16 d);\r
1197#else\r
1198static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1199{\r
1200#ifdef __debug_io2\r
1201 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1202#endif\r
1203\r
1204 a&=0xfffffe;\r
1205\r
1206 // prg RAM\r
1207 if (a < 0x80000) {\r
1208 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1209 return;\r
1210 }\r
1211\r
1212 // regs\r
1213 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1214 a &= 0x1fe;\r
1215 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1216 if (a >= 0x58 && a < 0x68)\r
48e8482f 1217 gfx_cd_write16(a, d);\r
cb4a513a 1218 else {\r
1cd356a3 1219 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1220 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1221 return;\r
1cd356a3 1222 }\r
cb4a513a 1223 s68k_reg_write8(a, d>>8);\r
1224 s68k_reg_write8(a+1,d&0xff);\r
1225 }\r
cc68a136 1226 return;\r
1227 }\r
1228\r
d0d47c5b 1229 // word RAM (2M area)\r
1230 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1231 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1232 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1233 if (r3 & 4) { // 1M decode mode?\r
1234 decode_write16(a, d, r3);\r
d0d47c5b 1235 } else {\r
1236 // allow access in any mode, like Gens does\r
fa1e5e29 1237 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1238 }\r
1239 return;\r
1240 }\r
1241\r
1242 // word RAM (1M area)\r
68cba51e 1243 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1244 int bank;\r
d0d47c5b 1245 if (d)\r
913ef4b7 1246 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1247// if (!(Pico_mcd->s68k_regs[3]&4))\r
1248// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1249 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1250 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1251 return;\r
1252 }\r
1253\r
4f265db7 1254 // PCM\r
1255 if ((a&0xff8000)==0xff0000) {\r
1256 a &= 0x7fff;\r
1257 if (a >= 0x2000)\r
1258 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1259 else if (a < 0x12)\r
1260 pcm_write(a>>1, d & 0xff);\r
1261 return;\r
1262 }\r
1263\r
ab0607f7 1264 // bram\r
1265 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1266 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1267 a = (a>>1)&0x1fff;\r
1268 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1269 Pico_mcd->bram[a++] = d >> 8;\r
1270 SRam.changed = 1;\r
1271 return;\r
1272 }\r
1273\r
cc68a136 1274 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1275}\r
4ff2d527 1276#endif\r
cc68a136 1277\r
ab0607f7 1278\r
4ff2d527 1279#ifdef _ASM_CD_MEMORY_C\r
1280void PicoWriteS68k32(u32 a,u32 d);\r
1281#else\r
1282static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1283{\r
1284#ifdef __debug_io2\r
1285 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1286#endif\r
1287\r
1288 a&=0xfffffe;\r
1289\r
1290 // prg RAM\r
1291 if (a < 0x80000) {\r
1292 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1293 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1294 return;\r
1295 }\r
1296\r
1297 // regs\r
1298 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1299 a &= 0x1fe;\r
1300 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1301 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1302 gfx_cd_write16(a, d>>16);\r
1303 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1304 } else {\r
1305 s68k_reg_write8(a, d>>24);\r
1306 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1307 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1308 s68k_reg_write8(a+3, d &0xff);\r
1309 }\r
cc68a136 1310 return;\r
1311 }\r
1312\r
d0d47c5b 1313 // word RAM (2M area)\r
1314 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1315 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1316 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1317 if (r3 & 4) { // 1M decode mode?\r
1318 decode_write16(a , d >> 16, r3);\r
1319 decode_write16(a+2, d , r3);\r
d0d47c5b 1320 } else {\r
1321 // allow access in any mode, like Gens does\r
fa1e5e29 1322 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1323 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1324 }\r
1325 return;\r
1326 }\r
1327\r
1328 // word RAM (1M area)\r
68cba51e 1329 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1330 int bank;\r
1331 u16 *pm;\r
d0d47c5b 1332 if (d)\r
913ef4b7 1333 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1334// if (!(Pico_mcd->s68k_regs[3]&4))\r
1335// dprintf("s68k_wram1M FIXME: wrong mode");\r
fa1e5e29 1336 bank = !(Pico_mcd->s68k_regs[3]&1);\r
1337 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1338 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1339 return;\r
1340 }\r
ab0607f7 1341\r
4f265db7 1342 // PCM\r
1343 if ((a&0xff8000)==0xff0000) {\r
1344 a &= 0x7fff;\r
1345 if (a >= 0x2000) {\r
1346 a >>= 1;\r
1347 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1348 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1349 } else if (a < 0x12) {\r
1350 a >>= 1;\r
1351 pcm_write(a, (d>>16) & 0xff);\r
1352 pcm_write(a+1, d & 0xff);\r
1353 }\r
1354 return;\r
1355 }\r
1356\r
ab0607f7 1357 // bram\r
1358 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1359 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1360 a = (a>>1)&0x1fff;\r
1361 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1362 Pico_mcd->bram[a++] = d >> 24;\r
1363 Pico_mcd->bram[a++] = d;\r
1364 Pico_mcd->bram[a++] = d >> 8;\r
1365 SRam.changed = 1;\r
1366 return;\r
1367 }\r
1368\r
cc68a136 1369 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1370}\r
4ff2d527 1371#endif\r
cc68a136 1372\r
1373\r
1374// -----------------------------------------------------------------\r
1375\r
b837b69b 1376\r
1377#if defined(EMU_C68K)\r
1378static __inline int PicoMemBaseM68k(u32 pc)\r
1379{\r
fa1e5e29 1380 if ((pc&0xe00000)==0xe00000)\r
1381 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1382\r
1383 if (pc < 0x20000)\r
fa1e5e29 1384 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1385\r
1386 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1387 {\r
fa1e5e29 1388 if (!(Pico_mcd->s68k_regs[3]&4))\r
1389 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1390 if (pc < 0x220000) {\r
1391 int bank = (Pico_mcd->s68k_regs[3]&1);\r
1392 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1393 }\r
b837b69b 1394 }\r
1395\r
fa1e5e29 1396 // Error - Program Counter is invalid\r
1397 dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
1398\r
1399 return (int)Pico_mcd->bios;\r
b837b69b 1400}\r
1401\r
1402\r
1403static u32 PicoCheckPcM68k(u32 pc)\r
1404{\r
1405 pc-=PicoCpu.membase; // Get real pc\r
1406 pc&=0xfffffe;\r
1407\r
1408 PicoCpu.membase=PicoMemBaseM68k(pc);\r
1409\r
1410 return PicoCpu.membase+pc;\r
1411}\r
1412\r
1413\r
1414static __inline int PicoMemBaseS68k(u32 pc)\r
1415{\r
fa1e5e29 1416 if (pc < 0x80000) // PRG RAM\r
1417 return (int)Pico_mcd->prg_ram;\r
b837b69b 1418\r
fa1e5e29 1419 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1420 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1421\r
1422 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
1423 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1424 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1425 }\r
1426\r
fa1e5e29 1427 // Error - Program Counter is invalid\r
1428 dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
1429\r
1430 return (int)Pico_mcd->prg_ram;\r
b837b69b 1431}\r
1432\r
1433\r
1434static u32 PicoCheckPcS68k(u32 pc)\r
1435{\r
1436 pc-=PicoCpuS68k.membase; // Get real pc\r
1437 pc&=0xfffffe;\r
1438\r
1439 PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
1440\r
1441 return PicoCpuS68k.membase+pc;\r
1442}\r
1443#endif\r
1444\r
1445\r
1446void PicoMemSetupCD()\r
1447{\r
1448 dprintf("PicoMemSetupCD()");\r
1449#ifdef EMU_C68K\r
1450 // Setup m68k memory callbacks:\r
1451 PicoCpu.checkpc=PicoCheckPcM68k;\r
1452 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
1453 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
1454 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
1455 PicoCpu.write8 =PicoWriteM68k8;\r
1456 PicoCpu.write16=PicoWriteM68k16;\r
1457 PicoCpu.write32=PicoWriteM68k32;\r
1458 // s68k\r
1459 PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
1460 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
1461 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
1462 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
1463 PicoCpuS68k.write8 =PicoWriteS68k8;\r
1464 PicoCpuS68k.write16=PicoWriteS68k16;\r
1465 PicoCpuS68k.write32=PicoWriteS68k32;\r
1466#endif\r
7a1f6e45 1467 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1468 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1469}\r
1470\r
1471\r
cc68a136 1472#ifdef EMU_M68K\r
1473unsigned char PicoReadCD8w (unsigned int a) {\r
1474 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1475}\r
1476unsigned short PicoReadCD16w(unsigned int a) {\r
1477 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1478}\r
1479unsigned int PicoReadCD32w(unsigned int a) {\r
1480 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1481}\r
1482void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1483 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1484}\r
1485void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1486 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1487}\r
1488void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1489 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1490}\r
1491\r
1492// these are allowed to access RAM\r
1493unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
1494 a&=0xffffff;\r
1495 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1496 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1497 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1498 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1499 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1500 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1501 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1502 }\r
1503 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1504 } else {\r
cc68a136 1505 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1506 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1507 if((a&0xfc0000)==0x200000) { // word RAM\r
1508 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1509 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1510 else if (a < 0x220000) {\r
1511 int bank = Pico_mcd->s68k_regs[3]&1;\r
1512 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1513 }\r
1514 }\r
1515 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1516 }\r
1517 return 0;//(u8) lastread_d;\r
1518}\r
1519unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
1520 a&=0xffffff;\r
1521 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1522 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1523 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1524 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1525 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1526 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1527 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1528 }\r
1529 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1530 } else {\r
cc68a136 1531 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1532 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1533 if((a&0xfc0000)==0x200000) { // word RAM\r
1534 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1535 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1536 else if (a < 0x220000) {\r
1537 int bank = Pico_mcd->s68k_regs[3]&1;\r
1538 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1539 }\r
1540 }\r
1541 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1542 }\r
b837b69b 1543 return 0;\r
cc68a136 1544}\r
1545unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
fa1e5e29 1546 u16 *pm;\r
cc68a136 1547 a&=0xffffff;\r
1548 if(m68ki_cpu_p == &PicoS68kCPU) {\r
1549 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1550 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1551 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1552 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1553 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
1554 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1555 return (pm[0]<<16)|pm[1];\r
1556 }\r
1557 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1558 } else {\r
cc68a136 1559 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1560 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1561 if((a&0xfc0000)==0x200000) { // word RAM\r
1562 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1563 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1564 else if (a < 0x220000) {\r
1565 int bank = Pico_mcd->s68k_regs[3]&1;\r
1566 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1567 return (pm[0]<<16)|pm[1];\r
1568 }\r
1569 }\r
1570 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1571 }\r
b837b69b 1572 return 0;\r
cc68a136 1573}\r
1574#endif // EMU_M68K\r
1575\r
fast MegaDrive/MegaCD/32X emulator