notaz.gp2x.de / picodrive.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
PSP sustend/resume and stuff
[picodrive.git] / Pico / cd / Memory.c
CommitLineData
6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
cc68a136 4\r
cc68a136 5\r
6//#define __debug_io\r
7\r
8#include "../PicoInt.h"\r
9\r
cc68a136 10#include "../sound/ym2612.h"\r
11#include "../sound/sn76496.h"\r
12\r
cb4a513a 13#include "gfx_cd.h"\r
4f265db7 14#include "pcm.h"\r
cb4a513a 15\r
eff55556 16#ifndef UTYPES_DEFINED\r
cc68a136 17typedef unsigned char u8;\r
18typedef unsigned short u16;\r
19typedef unsigned int u32;\r
eff55556 20#define UTYPES_DEFINED\r
21#endif\r
cc68a136 22\r
23//#define __debug_io\r
24//#define __debug_io2\r
66fdc0f0 25\r
b5e5172d 26//#define rdprintf dprintf\r
27#define rdprintf(...)\r
68cba51e 28//#define wrdprintf dprintf\r
913ef4b7 29#define wrdprintf(...)\r
721cd396 30#define plprintf dprintf\r
31//#define plprintf(...)\r
cc68a136 32\r
b5e5172d 33#ifdef EMU_CORE_DEBUG\r
34extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
35extern int lrp_cyc, lwp_cyc;\r
36#undef USE_POLL_DETECT\r
37#endif\r
38\r
cc68a136 39// -----------------------------------------------------------------\r
40\r
7a1f6e45 41// poller detection\r
7a1f6e45 42#define POLL_LIMIT 16\r
43#define POLL_CYCLES 124\r
44// int m68k_poll_addr, m68k_poll_cnt;\r
45unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 46\r
4ff2d527 47#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 48static u32 m68k_reg_read16(u32 a)\r
cc68a136 49{\r
50 u32 d=0;\r
51 a &= 0x3e;\r
672ad671 52 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 53\r
54 switch (a) {\r
672ad671 55 case 0:\r
c459aefd 56 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 57 goto end;\r
cc68a136 58 case 2:\r
672ad671 59 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
c008977e 60 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
61 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
62 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
cc68a136 63 goto end;\r
c459aefd 64 case 4:\r
65 d = Pico_mcd->s68k_regs[4]<<8;\r
66 goto end;\r
67 case 6:\r
913ef4b7 68 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 69 goto end;\r
cc68a136 70 case 8:\r
cc68a136 71 d = Read_CDC_Host(0);\r
72 goto end;\r
c459aefd 73 case 0xA:\r
fa1e5e29 74 dprintf("m68k FIXME: reserved read");\r
c459aefd 75 goto end;\r
cc68a136 76 case 0xC:\r
1cd356a3 77 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 78 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 79 goto end;\r
cc68a136 80 }\r
81\r
cc68a136 82 if (a < 0x30) {\r
83 // comm flag/cmd/status (0xE-0x2F)\r
84 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
85 goto end;\r
86 }\r
87\r
fa1e5e29 88 dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 89\r
90end:\r
91\r
672ad671 92 // dprintf("ret = %04x", d);\r
cc68a136 93 return d;\r
94}\r
4ff2d527 95#endif\r
cc68a136 96\r
4ff2d527 97#ifndef _ASM_CD_MEMORY_C\r
98static\r
99#endif\r
100void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 101{\r
102 a &= 0x3f;\r
672ad671 103 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 104\r
105 switch (a) {\r
106 case 0:\r
672ad671 107 d &= 1;\r
cc68a136 108 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 109 return;\r
cc68a136 110 case 1:\r
672ad671 111 d &= 3;\r
51a902ae 112 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 113 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
114 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 115 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 116 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 117 Pico_mcd->m.state_flags&=~1;\r
118 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 119 }\r
c459aefd 120 Pico_mcd->m.busreq = d;\r
121 return;\r
672ad671 122 case 2:\r
721cd396 123 dprintf("m68k: prg wp=%02x", d);\r
672ad671 124 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
125 return;\r
66fdc0f0 126 case 3: {\r
127 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
c008977e 128 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
672ad671 129 d &= 0xc2;\r
66fdc0f0 130 if ((dold>>6) != ((d>>6)&3))\r
672ad671 131 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
132 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
133 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
134 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 135 if (dold & 4) {\r
136 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
137 } else {\r
138 //dold &= ~2; // ??\r
89fa852d 139#if 1\r
140 if ((d & 2) && !(dold & 2)) {\r
141 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
142 d &= ~2;\r
143 }\r
144#else\r
66fdc0f0 145 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 146#endif\r
66fdc0f0 147 }\r
148 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 149#ifdef USE_POLL_DETECT\r
150 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
151 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
2433f409 152 plprintf("s68k poll release, a=%02x\n", a);\r
7a1f6e45 153 }\r
154#endif\r
672ad671 155 return;\r
66fdc0f0 156 }\r
c459aefd 157 case 6:\r
d1df8786 158 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 159 return;\r
160 case 7:\r
d1df8786 161 Pico_mcd->bios[0x72] = d;\r
913ef4b7 162 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 163 return;\r
7a1f6e45 164 case 0xf:\r
165 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 166 case 0xe:\r
672ad671 167 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 168 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 169#ifdef USE_POLL_DETECT\r
170 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
171 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
2433f409 172 plprintf("s68k poll release, a=%02x\n", a);\r
7a1f6e45 173 }\r
174#endif\r
c459aefd 175 return;\r
672ad671 176 }\r
177\r
178 if ((a&0xf0) == 0x10) {\r
cc68a136 179 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 180#ifdef USE_POLL_DETECT\r
181 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
182 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
2433f409 183 plprintf("s68k poll release, a=%02x\n", a);\r
7a1f6e45 184 }\r
185#endif\r
672ad671 186 return;\r
cc68a136 187 }\r
188\r
fa1e5e29 189 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 190}\r
191\r
2433f409 192#ifndef _ASM_CD_MEMORY_C\r
193static\r
194#endif\r
195u32 s68k_poll_detect(u32 a, u32 d)\r
196{\r
197#ifdef USE_POLL_DETECT\r
198 // polling detection\r
199 if (a == (s68k_poll_adclk&0xff)) {\r
200 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
201 if (clkdiff <= POLL_CYCLES) {\r
202 s68k_poll_cnt++;\r
203 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
204 if (s68k_poll_cnt > POLL_LIMIT) {\r
205 SekSetStopS68k(1);\r
206 plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);\r
207 }\r
208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
209 return d;\r
210 }\r
211 }\r
212 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
213 s68k_poll_cnt = 0;\r
214#endif\r
215 return d;\r
216}\r
cc68a136 217\r
913ef4b7 218#define READ_FONT_DATA(basemask) \\r
219{ \\r
220 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
221 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
222 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
223 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
224 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
225 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
226}\r
227\r
cc68a136 228\r
4ff2d527 229#ifndef _ASM_CD_MEMORY_C\r
230static\r
231#endif\r
232u32 s68k_reg_read16(u32 a)\r
cc68a136 233{\r
234 u32 d=0;\r
cc68a136 235\r
672ad671 236 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 237\r
238 switch (a) {\r
239 case 0:\r
7a1f6e45 240 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 241 case 2:\r
2433f409 242 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
c008977e 243 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
2433f409 244 return s68k_poll_detect(a, d);\r
cc68a136 245 case 6:\r
7a1f6e45 246 return CDC_Read_Reg();\r
cc68a136 247 case 8:\r
7a1f6e45 248 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 249 case 0xC:\r
4f265db7 250 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 251 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 252 return d;\r
d1df8786 253 case 0x30:\r
7a1f6e45 254 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
255 return Pico_mcd->s68k_regs[31];\r
cc68a136 256 case 0x34: // fader\r
7a1f6e45 257 return 0; // no busy bit\r
913ef4b7 258 case 0x50: // font data (check: Lunar 2, Silpheed)\r
259 READ_FONT_DATA(0x00100000);\r
7a1f6e45 260 return d;\r
913ef4b7 261 case 0x52:\r
262 READ_FONT_DATA(0x00010000);\r
7a1f6e45 263 return d;\r
913ef4b7 264 case 0x54:\r
265 READ_FONT_DATA(0x10000000);\r
7a1f6e45 266 return d;\r
913ef4b7 267 case 0x56:\r
268 READ_FONT_DATA(0x01000000);\r
7a1f6e45 269 return d;\r
cc68a136 270 }\r
271\r
272 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
273\r
2433f409 274 if (a >= 0x0e && a < 0x30)\r
275 return s68k_poll_detect(a, d);\r
7a1f6e45 276\r
cc68a136 277 return d;\r
278}\r
279\r
4ff2d527 280#ifndef _ASM_CD_MEMORY_C\r
281static\r
282#endif\r
283void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 284{\r
672ad671 285 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 286\r
48e8482f 287 // Warning: d might have upper bits set\r
cc68a136 288 switch (a) {\r
672ad671 289 case 2:\r
290 return; // only m68k can change WP\r
fa1e5e29 291 case 3: {\r
292 int dold = Pico_mcd->s68k_regs[3];\r
c008977e 293 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
672ad671 294 d &= 0x1d;\r
4ff2d527 295 d |= dold&0xc2;\r
d0d47c5b 296 if (d&4) {\r
4ff2d527 297 if ((d ^ dold) & 5) {\r
298 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
4ff2d527 299 PicoMemResetCD(d);\r
4ff2d527 300 }\r
48e8482f 301#ifdef _ASM_CD_MEMORY_C\r
302 if ((d ^ dold) & 0x1d)\r
303 PicoMemResetCDdecode(d);\r
304#endif\r
fa1e5e29 305 if (!(dold & 4)) {\r
306 dprintf("wram mode 2M->1M");\r
307 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 308 }\r
d0d47c5b 309 } else {\r
fa1e5e29 310 if (dold & 4) {\r
311 dprintf("wram mode 1M->2M");\r
4ff2d527 312 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
313 d &= ~3;\r
314 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
315 }\r
fa1e5e29 316 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 317 PicoMemResetCD(d);\r
4ff2d527 318 }\r
319 else\r
320 d |= dold&1;\r
321 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 322 }\r
672ad671 323 break;\r
fa1e5e29 324 }\r
cc68a136 325 case 4:\r
326 dprintf("s68k CDC dest: %x", d&7);\r
327 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
328 return;\r
329 case 5:\r
c459aefd 330 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 331 break;\r
332 case 7:\r
333 CDC_Write_Reg(d);\r
334 return;\r
335 case 0xa:\r
336 dprintf("s68k set CDC dma addr");\r
337 break;\r
d1df8786 338 case 0xc:\r
4f265db7 339 case 0xd:\r
d1df8786 340 dprintf("s68k set stopwatch timer");\r
4f265db7 341 Pico_mcd->m.timer_stopwatch = 0;\r
342 return;\r
1cd356a3 343 case 0xe:\r
7a1f6e45 344 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 345 return;\r
d1df8786 346 case 0x31:\r
4f265db7 347 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 348 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 349 break;\r
cc68a136 350 case 0x33: // IRQ mask\r
351 dprintf("s68k irq mask: %02x", d);\r
352 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
353 CDD_Export_Status();\r
cc68a136 354 }\r
355 break;\r
356 case 0x34: // fader\r
357 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
358 return;\r
672ad671 359 case 0x36:\r
360 return; // d/m bit is unsetable\r
361 case 0x37: {\r
362 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
363 Pico_mcd->s68k_regs[0x37] = d&7;\r
364 if ((d&4) && !(d_old&4)) {\r
cc68a136 365 CDD_Export_Status();\r
cc68a136 366 }\r
672ad671 367 return;\r
368 }\r
cc68a136 369 case 0x4b:\r
370 Pico_mcd->s68k_regs[a] = (u8) d;\r
371 CDD_Import_Command();\r
372 return;\r
373 }\r
374\r
1cd356a3 375 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 376 {\r
fa1e5e29 377 dprintf("s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 378 return;\r
379 }\r
380\r
381 Pico_mcd->s68k_regs[a] = (u8) d;\r
382}\r
383\r
384\r
4ff2d527 385#ifndef _ASM_CD_MEMORY_C\r
fa1e5e29 386static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 387{\r
388 u32 d=0;\r
389\r
672ad671 390 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 391 d=m68k_reg_read16(a);\r
672ad671 392 goto end;\r
393 }\r
cc68a136 394\r
8022f53d 395 if (a==0x400000) {\r
396 if (SRam.data != NULL) d=3; // 64k cart\r
397 goto end;\r
398 }\r
399\r
400 if ((a&0xfe0000)==0x600000) {\r
401 if (SRam.data != NULL) {\r
402 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
403 if (realsize == 8) d|=d<<8;\r
404 }\r
405 goto end;\r
406 }\r
407\r
408 if (a==0x7ffffe) {\r
409 d=Pico_mcd->m.bcram_reg;\r
410 goto end;\r
411 }\r
412\r
fa1e5e29 413 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 414\r
415end:\r
416 return d;\r
417}\r
418\r
cc68a136 419\r
fa1e5e29 420static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 421{\r
cb4a513a 422 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 423\r
8022f53d 424 if ((a&0xfe0000)==0x600000) {\r
425 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
426 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
427 SRam.changed = 1;\r
428 }\r
429 return;\r
430 }\r
431\r
432 if (a==0x7fffff) {\r
433 Pico_mcd->m.bcram_reg=d;\r
434 return;\r
435 }\r
436\r
721cd396 437 dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 438}\r
439\r
69996cb7 440#define _CD_MEMORY_C\r
fa1e5e29 441#undef _ASM_MEMORY_C\r
442#include "../MemoryCmn.c"\r
4ff2d527 443#include "cell_map.c"\r
444#endif // !def _ASM_CD_MEMORY_C\r
cc68a136 445\r
2433f409 446\r
cc68a136 447// -----------------------------------------------------------------\r
448// Read Rom and read Ram\r
449\r
4ff2d527 450#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 451u32 PicoReadM68k8(u32 a);\r
4ff2d527 452#else\r
81fda4e8 453u32 PicoReadM68k8(u32 a)\r
cc68a136 454{\r
455 u32 d=0;\r
456\r
cc68a136 457 a&=0xffffff;\r
458\r
b542be46 459 switch (a >> 17)\r
460 {\r
461 case 0x00>>1: // BIOS: 000000 - 020000\r
462 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
463 break;\r
464 case 0x02>>1: // prg RAM\r
465 if ((Pico_mcd->m.busreq&3)!=1) {\r
466 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
467 d = *(prg_bank+((a^1)&0x1ffff));\r
468 }\r
469 break;\r
470 case 0x20>>1: // word RAM: 200000 - 220000\r
471 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
472 a &= 0x1ffff;\r
473 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
474 int bank = Pico_mcd->s68k_regs[3]&1;\r
475 d = Pico_mcd->word_ram1M[bank][a^1];\r
476 } else {\r
477 // allow access in any mode, like Gens does\r
478 d = Pico_mcd->word_ram2M[a^1];\r
479 }\r
480 wrdprintf("ret = %02x", (u8)d);\r
481 break;\r
482 case 0x22>>1: // word RAM: 220000 - 240000\r
483 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
484 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
485 int bank = Pico_mcd->s68k_regs[3]&1;\r
486 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
487 d = Pico_mcd->word_ram1M[bank][a^1];\r
488 } else {\r
489 // allow access in any mode, like Gens does\r
490 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
491 }\r
492 wrdprintf("ret = %02x", (u8)d);\r
493 break;\r
494 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
495 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
496 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
497 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
498 // VDP\r
499 if ((a&0xe700e0)==0xc00000) {\r
500 d=PicoVideoRead(a);\r
501 if ((a&1)==0) d>>=8;\r
502 }\r
503 break;\r
504 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
505 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
506 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
507 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
508 // RAM:\r
509 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
510 break;\r
511 default:\r
512 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
513 if ((a&0xffffc0)==0xa12000)\r
514 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 515\r
b542be46 516 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
cc68a136 517\r
b542be46 518 if ((a&0xffffc0)==0xa12000)\r
519 rdprintf("ret = %02x", (u8)d);\r
520 break;\r
d0d47c5b 521 }\r
522\r
cc68a136 523\r
524#ifdef __debug_io\r
525 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
b5e5172d 526#endif\r
527#ifdef EMU_CORE_DEBUG\r
528 if (a>=Pico.romsize) {\r
529 lastread_a = a;\r
530 lastread_d[lrp_cyc++&15] = d;\r
531 }\r
cc68a136 532#endif\r
0af33fe0 533 return d;\r
cc68a136 534}\r
4ff2d527 535#endif\r
cc68a136 536\r
ab0607f7 537\r
4ff2d527 538#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 539u32 PicoReadM68k16(u32 a);\r
4ff2d527 540#else\r
0af33fe0 541static u32 PicoReadM68k16(u32 a)\r
cc68a136 542{\r
0af33fe0 543 u32 d=0;\r
cc68a136 544\r
cc68a136 545 a&=0xfffffe;\r
546\r
b542be46 547 switch (a >> 17)\r
548 {\r
549 case 0x00>>1: // BIOS: 000000 - 020000\r
550 d = *(u16 *)(Pico_mcd->bios+a);\r
551 break;\r
552 case 0x02>>1: // prg RAM\r
553 if ((Pico_mcd->m.busreq&3)!=1) {\r
554 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
555 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
556 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
557 wrdprintf("ret = %04x", d);\r
558 }\r
559 break;\r
560 case 0x20>>1: // word RAM: 200000 - 220000\r
561 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
562 a &= 0x1fffe;\r
563 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
564 int bank = Pico_mcd->s68k_regs[3]&1;\r
565 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
566 } else {\r
567 // allow access in any mode, like Gens does\r
568 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
569 }\r
570 wrdprintf("ret = %04x", d);\r
571 break;\r
572 case 0x22>>1: // word RAM: 220000 - 240000\r
573 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
574 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
575 int bank = Pico_mcd->s68k_regs[3]&1;\r
576 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
577 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
578 } else {\r
579 // allow access in any mode, like Gens does\r
580 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
581 }\r
582 wrdprintf("ret = %04x", d);\r
583 break;\r
584 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
585 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
586 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
587 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
588 // VDP\r
589 if ((a&0xe700e0)==0xc00000)\r
590 d=PicoVideoRead(a);\r
591 break;\r
592 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
593 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
594 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
595 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
596 // RAM:\r
597 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
598 break;\r
599 default:\r
600 if ((a&0xffffc0)==0xa12000)\r
601 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 602\r
b542be46 603 d = OtherRead16(a, 16);\r
cc68a136 604\r
b542be46 605 if ((a&0xffffc0)==0xa12000)\r
606 rdprintf("ret = %04x", d);\r
607 break;\r
d0d47c5b 608 }\r
609\r
cc68a136 610\r
611#ifdef __debug_io\r
612 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 613#endif\r
614#ifdef EMU_CORE_DEBUG\r
615 if (a>=Pico.romsize) {\r
616 lastread_a = a;\r
617 lastread_d[lrp_cyc++&15] = d;\r
618 }\r
cc68a136 619#endif\r
620 return d;\r
621}\r
4ff2d527 622#endif\r
cc68a136 623\r
ab0607f7 624\r
4ff2d527 625#ifdef _ASM_CD_MEMORY_C\r
626u32 PicoReadM68k32(u32 a);\r
627#else\r
628static u32 PicoReadM68k32(u32 a)\r
cc68a136 629{\r
630 u32 d=0;\r
631\r
cc68a136 632 a&=0xfffffe;\r
633\r
b542be46 634 switch (a >> 17)\r
635 {\r
636 case 0x00>>1: { // BIOS: 000000 - 020000\r
637 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
638 d = (pm[0]<<16)|pm[1];\r
639 break;\r
640 }\r
641 case 0x02>>1: // prg RAM\r
642 if ((Pico_mcd->m.busreq&3)!=1) {\r
643 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
644 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
645 d = (pm[0]<<16)|pm[1];\r
646 }\r
647 break;\r
648 case 0x20>>1: // word RAM: 200000 - 220000\r
649 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
650 a&=0x1fffe;\r
651 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
652 int bank = Pico_mcd->s68k_regs[3]&1;\r
653 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
654 d = (pm[0]<<16)|pm[1];\r
655 } else {\r
656 // allow access in any mode, like Gens does\r
657 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
658 d = (pm[0]<<16)|pm[1];\r
659 }\r
660 wrdprintf("ret = %08x", d);\r
661 break;\r
662 case 0x22>>1: // word RAM: 220000 - 240000\r
663 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
664 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
fa1e5e29 665 u32 a1, a2;\r
b542be46 666 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 667 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 668 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
669 else a2 = a1 + 2;\r
670 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
671 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 672 } else {\r
b542be46 673 // allow access in any mode, like Gens does\r
674 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
675 d = (pm[0]<<16)|pm[1];\r
bf098bc5 676 }\r
b542be46 677 wrdprintf("ret = %08x", d);\r
678 break;\r
679 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
680 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
681 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
682 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
683 // VDP\r
684 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
685 break;\r
686 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
687 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
688 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
689 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
690 // RAM:\r
691 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
692 d = (pm[0]<<16)|pm[1];\r
693 break;\r
d0d47c5b 694 }\r
b542be46 695 default:\r
696 if ((a&0xffffc0)==0xa12000)\r
697 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
d0d47c5b 698\r
b542be46 699 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
672ad671 700\r
b542be46 701 if ((a&0xffffc0)==0xa12000)\r
702 rdprintf("ret = %08x", d);\r
703 break;\r
704 }\r
cc68a136 705\r
672ad671 706\r
cc68a136 707#ifdef __debug_io\r
708 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 709#endif\r
710#ifdef EMU_CORE_DEBUG\r
711 if (a>=Pico.romsize) {\r
712 lastread_a = a;\r
713 lastread_d[lrp_cyc++&15] = d;\r
714 }\r
cc68a136 715#endif\r
716 return d;\r
717}\r
4ff2d527 718#endif\r
cc68a136 719\r
ab0607f7 720\r
cc68a136 721// -----------------------------------------------------------------\r
cc68a136 722\r
4ff2d527 723#ifdef _ASM_CD_MEMORY_C\r
724void PicoWriteM68k8(u32 a,u8 d);\r
725#else\r
81fda4e8 726void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 727{\r
728#ifdef __debug_io\r
729 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
730#endif\r
b5e5172d 731#ifdef EMU_CORE_DEBUG\r
732 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
733#endif\r
cc68a136 734\r
ab0607f7 735 if ((a&0xe00000)==0xe00000) { // Ram\r
736 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
737 return;\r
738 }\r
cc68a136 739\r
cc68a136 740 // prg RAM\r
721cd396 741 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 742 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 743 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 744 return;\r
745 }\r
746\r
b542be46 747 a&=0xffffff;\r
748\r
d0d47c5b 749 // word RAM\r
750 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 751 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 752 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 753 int bank = Pico_mcd->s68k_regs[3]&1;\r
754 if (a >= 0x220000)\r
755 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
756 else a &= 0x1ffff;\r
757 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 758 } else {\r
759 // allow access in any mode, like Gens does\r
fa1e5e29 760 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 761 }\r
762 return;\r
763 }\r
764\r
2433f409 765 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 766 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 767 m68k_reg_write8(a, d);\r
768 return;\r
769 }\r
672ad671 770\r
fb9bec94 771 OtherWrite8(a,d);\r
cc68a136 772}\r
4ff2d527 773#endif\r
cc68a136 774\r
ab0607f7 775\r
4ff2d527 776#ifdef _ASM_CD_MEMORY_C\r
777void PicoWriteM68k16(u32 a,u16 d);\r
778#else\r
779static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 780{\r
781#ifdef __debug_io\r
782 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
783#endif\r
b5e5172d 784#ifdef EMU_CORE_DEBUG\r
785 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
786#endif\r
cc68a136 787\r
ab0607f7 788 if ((a&0xe00000)==0xe00000) { // Ram\r
789 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
790 return;\r
791 }\r
cc68a136 792\r
cc68a136 793 // prg RAM\r
721cd396 794 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 795 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
c008977e 796 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
cc68a136 797 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
798 return;\r
799 }\r
800\r
b542be46 801 a&=0xfffffe;\r
802\r
d0d47c5b 803 // word RAM\r
804 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 805 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 806 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 807 int bank = Pico_mcd->s68k_regs[3]&1;\r
808 if (a >= 0x220000)\r
809 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
810 else a &= 0x1fffe;\r
811 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 812 } else {\r
813 // allow access in any mode, like Gens does\r
fa1e5e29 814 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 815 }\r
816 return;\r
817 }\r
818\r
7a1f6e45 819 // regs\r
820 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 821 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 822 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
823 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
824#ifdef USE_POLL_DETECT\r
825 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 826 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
2433f409 827 plprintf("s68k poll release, a=%02x\n", a);\r
7a1f6e45 828 }\r
829#endif\r
830 return;\r
831 }\r
832 m68k_reg_write8(a, d>>8);\r
833 m68k_reg_write8(a+1,d&0xff);\r
834 return;\r
835 }\r
cc68a136 836\r
b542be46 837 // VDP\r
838 if ((a&0xe700e0)==0xc00000) {\r
839 PicoVideoWrite(a,(u16)d);\r
840 return;\r
841 }\r
842\r
cc68a136 843 OtherWrite16(a,d);\r
844}\r
4ff2d527 845#endif\r
cc68a136 846\r
ab0607f7 847\r
4ff2d527 848#ifdef _ASM_CD_MEMORY_C\r
849void PicoWriteM68k32(u32 a,u32 d);\r
850#else\r
851static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 852{\r
853#ifdef __debug_io\r
854 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
855#endif\r
b5e5172d 856#ifdef EMU_CORE_DEBUG\r
857 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
858#endif\r
cc68a136 859\r
860 if ((a&0xe00000)==0xe00000)\r
861 {\r
862 // Ram:\r
863 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
864 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
865 return;\r
866 }\r
867\r
cc68a136 868 // prg RAM\r
721cd396 869 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 870 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 871 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
872 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
873 return;\r
874 }\r
875\r
b542be46 876 a&=0xfffffe;\r
877\r
672ad671 878 // word RAM\r
d0d47c5b 879 if ((a&0xfc0000)==0x200000) {\r
880 if (d != 0) // don't log clears\r
913ef4b7 881 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 882 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 883 int bank = Pico_mcd->s68k_regs[3]&1;\r
884 if (a >= 0x220000) { // cell arranged\r
885 u32 a1, a2;\r
886 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 887 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
888 else a2 = a1 + 2;\r
889 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
890 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 891 } else {\r
fa1e5e29 892 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
893 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 894 }\r
d0d47c5b 895 } else {\r
896 // allow access in any mode, like Gens does\r
fa1e5e29 897 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 898 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
899 }\r
672ad671 900 return;\r
d0d47c5b 901 }\r
672ad671 902\r
2433f409 903 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 904 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
2433f409 905 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
906 }\r
cc68a136 907\r
b542be46 908 // VDP\r
909 if ((a&0xe700e0)==0xc00000)\r
910 {\r
911 PicoVideoWrite(a, (u16)(d>>16));\r
912 PicoVideoWrite(a+2,(u16)d);\r
913 return;\r
914 }\r
915\r
cc68a136 916 OtherWrite16(a, (u16)(d>>16));\r
917 OtherWrite16(a+2,(u16)d);\r
918}\r
4ff2d527 919#endif\r
cc68a136 920\r
921\r
721cd396 922// -----------------------------------------------------------------\r
923// S68k\r
cc68a136 924// -----------------------------------------------------------------\r
925\r
4ff2d527 926#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 927u32 PicoReadS68k8(u32 a);\r
4ff2d527 928#else\r
0af33fe0 929static u32 PicoReadS68k8(u32 a)\r
cc68a136 930{\r
931 u32 d=0;\r
932\r
b5e5172d 933#ifdef EMU_CORE_DEBUG\r
934 u32 ab=a&0xfffffe;\r
935#endif\r
cc68a136 936 a&=0xffffff;\r
937\r
938 // prg RAM\r
939 if (a < 0x80000) {\r
940 d = *(Pico_mcd->prg_ram+(a^1));\r
941 goto end;\r
942 }\r
943\r
944 // regs\r
945 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 946 a &= 0x1ff;\r
947 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
2433f409 948 if (a >= 0x0e && a < 0x30) {\r
949 d = Pico_mcd->s68k_regs[a];\r
950 s68k_poll_detect(a, d);\r
951 rdprintf("ret = %02x", (u8)d);\r
952 goto end;\r
953 }\r
954 else if (a >= 0x58 && a < 0x68)\r
cb4a513a 955 d = gfx_cd_read(a&~1);\r
956 else d = s68k_reg_read16(a&~1);\r
957 if ((a&1)==0) d>>=8;\r
c459aefd 958 rdprintf("ret = %02x", (u8)d);\r
cc68a136 959 goto end;\r
960 }\r
961\r
d0d47c5b 962 // word RAM (2M area)\r
963 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 964 // test: batman returns\r
913ef4b7 965 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 966 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 967 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 968 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
969 if (a&1) d &= 0x0f;\r
970 else d >>= 4;\r
971 dprintf("FIXME: decode");\r
d0d47c5b 972 } else {\r
973 // allow access in any mode, like Gens does\r
fa1e5e29 974 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 975 }\r
913ef4b7 976 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 977 goto end;\r
978 }\r
979\r
980 // word RAM (1M area)\r
68cba51e 981 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 982 int bank;\r
913ef4b7 983 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 984// if (!(Pico_mcd->s68k_regs[3]&4))\r
985// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 986 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 987 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 988 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 989 goto end;\r
990 }\r
991\r
4f265db7 992 // PCM\r
993 if ((a&0xff8000)==0xff0000) {\r
1cd356a3 994 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 995 a &= 0x7fff;\r
996 if (a >= 0x2000)\r
997 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
998 else if (a >= 0x20) {\r
999 a &= 0x1e;\r
1000 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1001 if (a & 2) d >>= 8;\r
1002 }\r
1003 dprintf("ret = %02x", (u8)d);\r
1004 goto end;\r
1005 }\r
1006\r
ab0607f7 1007 // bram\r
1008 if ((a&0xff0000)==0xfe0000) {\r
1009 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
1010 goto end;\r
1011 }\r
1012\r
cc68a136 1013 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
1014\r
1015 end:\r
1016\r
1017#ifdef __debug_io2\r
1018 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
b5e5172d 1019#endif\r
1020#ifdef EMU_CORE_DEBUG\r
1021 lastread_a = ab;\r
1022 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1023#endif\r
0af33fe0 1024 return d;\r
cc68a136 1025}\r
4ff2d527 1026#endif\r
cc68a136 1027\r
ab0607f7 1028\r
4ff2d527 1029#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 1030u32 PicoReadS68k16(u32 a);\r
4ff2d527 1031#else\r
0af33fe0 1032static u32 PicoReadS68k16(u32 a)\r
cc68a136 1033{\r
4f265db7 1034 u32 d=0;\r
cc68a136 1035\r
b5e5172d 1036#ifdef EMU_CORE_DEBUG\r
1037 u32 ab=a&0xfffffe;\r
1038#endif\r
cc68a136 1039 a&=0xfffffe;\r
1040\r
1041 // prg RAM\r
1042 if (a < 0x80000) {\r
c008977e 1043 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
cc68a136 1044 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
c008977e 1045 wrdprintf("ret = %04x", d);\r
cc68a136 1046 goto end;\r
1047 }\r
1048\r
1049 // regs\r
1050 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1051 a &= 0x1fe;\r
1052 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1053 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1054 d = gfx_cd_read(a);\r
1055 else d = s68k_reg_read16(a);\r
c459aefd 1056 rdprintf("ret = %04x", d);\r
cc68a136 1057 goto end;\r
1058 }\r
1059\r
d0d47c5b 1060 // word RAM (2M area)\r
1061 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1062 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1063 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1064 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1065 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1066 d |= d << 4; d &= ~0xf0;\r
1067 dprintf("FIXME: decode");\r
d0d47c5b 1068 } else {\r
1069 // allow access in any mode, like Gens does\r
fa1e5e29 1070 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1071 }\r
913ef4b7 1072 wrdprintf("ret = %04x", d);\r
d0d47c5b 1073 goto end;\r
1074 }\r
1075\r
1076 // word RAM (1M area)\r
68cba51e 1077 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1078 int bank;\r
913ef4b7 1079 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1080// if (!(Pico_mcd->s68k_regs[3]&4))\r
1081// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1082 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1083 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 1084 wrdprintf("ret = %04x", d);\r
ab0607f7 1085 goto end;\r
1086 }\r
1087\r
1088 // bram\r
1089 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1090 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1091 a = (a>>1)&0x1fff;\r
4f265db7 1092 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 1093 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 1094 dprintf("ret = %04x", d);\r
d0d47c5b 1095 goto end;\r
1096 }\r
1097\r
4f265db7 1098 // PCM\r
1099 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1100 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1101 a &= 0x7fff;\r
1102 if (a >= 0x2000)\r
1103 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1104 else if (a >= 0x20) {\r
1105 a &= 0x1e;\r
1106 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1107 if (a & 2) d >>= 8;\r
1108 }\r
1109 dprintf("ret = %04x", d);\r
1110 goto end;\r
1111 }\r
1112\r
cc68a136 1113 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1114\r
1115 end:\r
1116\r
1117#ifdef __debug_io2\r
1118 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1119#endif\r
1120#ifdef EMU_CORE_DEBUG\r
1121 lastread_a = ab;\r
1122 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1123#endif\r
1124 return d;\r
1125}\r
4ff2d527 1126#endif\r
cc68a136 1127\r
ab0607f7 1128\r
4ff2d527 1129#ifdef _ASM_CD_MEMORY_C\r
1130u32 PicoReadS68k32(u32 a);\r
1131#else\r
1132static u32 PicoReadS68k32(u32 a)\r
cc68a136 1133{\r
1134 u32 d=0;\r
1135\r
b5e5172d 1136#ifdef EMU_CORE_DEBUG\r
1137 u32 ab=a&0xfffffe;\r
1138#endif\r
cc68a136 1139 a&=0xfffffe;\r
1140\r
1141 // prg RAM\r
1142 if (a < 0x80000) {\r
1143 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1144 d = (pm[0]<<16)|pm[1];\r
1145 goto end;\r
1146 }\r
1147\r
1148 // regs\r
1149 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1150 a &= 0x1fe;\r
1151 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1152 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1153 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1154 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 1155 rdprintf("ret = %08x", d);\r
cc68a136 1156 goto end;\r
1157 }\r
1158\r
d0d47c5b 1159 // word RAM (2M area)\r
1160 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1161 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1162 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1163 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1164 a >>= 1;\r
1165 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1166 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1167 d |= d << 4; d &= 0x0f0f0f0f;\r
d0d47c5b 1168 } else {\r
1169 // allow access in any mode, like Gens does\r
fa1e5e29 1170 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 1171 }\r
913ef4b7 1172 wrdprintf("ret = %08x", d);\r
d0d47c5b 1173 goto end;\r
1174 }\r
1175\r
1176 // word RAM (1M area)\r
68cba51e 1177 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1178 int bank;\r
913ef4b7 1179 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1180// if (!(Pico_mcd->s68k_regs[3]&4))\r
1181// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1182 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1183 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 1184 wrdprintf("ret = %08x", d);\r
ab0607f7 1185 goto end;\r
1186 }\r
1187\r
4f265db7 1188 // PCM\r
1189 if ((a&0xff8000)==0xff0000) {\r
2433f409 1190 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1191 a &= 0x7fff;\r
1192 if (a >= 0x2000) {\r
1193 a >>= 1;\r
1194 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1195 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1196 } else if (a >= 0x20) {\r
1197 a &= 0x1e;\r
1198 if (a & 2) {\r
1199 a >>= 2;\r
1200 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1201 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1202 } else {\r
1203 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1204 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1205 }\r
1206 }\r
1207 dprintf("ret = %08x", d);\r
1208 goto end;\r
1209 }\r
1210\r
ab0607f7 1211 // bram\r
1212 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1213 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1214 a = (a>>1)&0x1fff;\r
1215 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1216 d|= Pico_mcd->bram[a++] << 24;\r
1217 d|= Pico_mcd->bram[a++];\r
1218 d|= Pico_mcd->bram[a++] << 8;\r
1219 dprintf("ret = %08x", d);\r
d0d47c5b 1220 goto end;\r
1221 }\r
1222\r
cc68a136 1223 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1224\r
1225 end:\r
1226\r
1227#ifdef __debug_io2\r
1228 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1229#endif\r
1230#ifdef EMU_CORE_DEBUG\r
1231 if (ab > 0x78) { // not vectors and stuff\r
1232 lastread_a = ab;\r
1233 lastread_d[lrp_cyc++&15] = d;\r
1234 }\r
cc68a136 1235#endif\r
1236 return d;\r
1237}\r
4ff2d527 1238#endif\r
cc68a136 1239\r
ab0607f7 1240\r
a4030801 1241#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1242/* check: jaguar xj 220 (draws entire world using decode) */\r
1243static void decode_write8(u32 a, u8 d, int r3)\r
1244{\r
3aa1e148 1245 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1246 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1247\r
0a051f55 1248 r3 &= 0x18;\r
1249 d &= 0x0f;\r
1250 if (!(a&1)) d <<= 4;\r
1251\r
0a051f55 1252 if (r3 == 8) {\r
1253 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1254 } else if (r3 > 8) {\r
1255 if (d) goto do_it;\r
1256 } else {\r
1257 goto do_it;\r
1258 }\r
1259\r
1260 return;\r
1261do_it:\r
1262 *pd = d | (*pd & oldmask);\r
1263}\r
1264\r
1265\r
1266static void decode_write16(u32 a, u16 d, int r3)\r
1267{\r
3aa1e148 1268 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1269\r
1270 //if ((a & 0x3ffff) < 0x28000) return;\r
1271\r
1272 r3 &= 0x18;\r
1273 d &= 0x0f0f;\r
1274 d |= d >> 4;\r
1275\r
1276 if (r3 == 8) {\r
1277 u8 dold = *pd;\r
1278 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1279 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1280 *pd = dold;\r
1281 } else if (r3 > 8) {\r
1282 u8 dold = *pd;\r
1283 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1284 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1285 *pd = d;\r
1286 } else {\r
1287 *pd = d;\r
1288 }\r
0a051f55 1289}\r
a4030801 1290#endif\r
0a051f55 1291\r
cc68a136 1292// -----------------------------------------------------------------\r
1293\r
4ff2d527 1294#ifdef _ASM_CD_MEMORY_C\r
1295void PicoWriteS68k8(u32 a,u8 d);\r
1296#else\r
1297static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1298{\r
1299#ifdef __debug_io2\r
1300 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1301#endif\r
1302\r
1303 a&=0xffffff;\r
1304\r
b5e5172d 1305#ifdef EMU_CORE_DEBUG\r
1306 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1307#endif\r
1308\r
cc68a136 1309 // prg RAM\r
1310 if (a < 0x80000) {\r
1311 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
721cd396 1312 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
cc68a136 1313 return;\r
1314 }\r
1315\r
1316 // regs\r
1317 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1318 a &= 0x1ff;\r
1319 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1320 if (a >= 0x58 && a < 0x68)\r
48e8482f 1321 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1322 else s68k_reg_write8(a,d);\r
cc68a136 1323 return;\r
1324 }\r
1325\r
d0d47c5b 1326 // word RAM (2M area)\r
1327 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1328 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1329 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1330 if (r3 & 4) { // 1M decode mode?\r
1331 decode_write8(a, d, r3);\r
d0d47c5b 1332 } else {\r
1333 // allow access in any mode, like Gens does\r
fa1e5e29 1334 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1335 }\r
1336 return;\r
1337 }\r
1338\r
1339 // word RAM (1M area)\r
68cba51e 1340 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1341 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1342 int bank;\r
d0d47c5b 1343 if (d)\r
913ef4b7 1344 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1345// if (!(Pico_mcd->s68k_regs[3]&4))\r
1346// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1347 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1348 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1349 return;\r
1350 }\r
1351\r
4f265db7 1352 // PCM\r
1353 if ((a&0xff8000)==0xff0000) {\r
1354 a &= 0x7fff;\r
1355 if (a >= 0x2000)\r
1356 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1357 else if (a < 0x12)\r
1358 pcm_write(a>>1, d);\r
1359 return;\r
1360 }\r
1361\r
ab0607f7 1362 // bram\r
1363 if ((a&0xff0000)==0xfe0000) {\r
1364 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1365 SRam.changed = 1;\r
1366 return;\r
1367 }\r
1368\r
cc68a136 1369 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1370}\r
4ff2d527 1371#endif\r
cc68a136 1372\r
ab0607f7 1373\r
4ff2d527 1374#ifdef _ASM_CD_MEMORY_C\r
1375void PicoWriteS68k16(u32 a,u16 d);\r
1376#else\r
1377static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1378{\r
1379#ifdef __debug_io2\r
1380 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1381#endif\r
1382\r
1383 a&=0xfffffe;\r
1384\r
b5e5172d 1385#ifdef EMU_CORE_DEBUG\r
1386 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1387#endif\r
1388\r
cc68a136 1389 // prg RAM\r
1390 if (a < 0x80000) {\r
c008977e 1391 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
721cd396 1392 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1393 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
cc68a136 1394 return;\r
1395 }\r
1396\r
1397 // regs\r
1398 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1399 a &= 0x1fe;\r
1400 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1401 if (a >= 0x58 && a < 0x68)\r
48e8482f 1402 gfx_cd_write16(a, d);\r
cb4a513a 1403 else {\r
1cd356a3 1404 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1405 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1406 return;\r
1cd356a3 1407 }\r
cb4a513a 1408 s68k_reg_write8(a, d>>8);\r
1409 s68k_reg_write8(a+1,d&0xff);\r
1410 }\r
cc68a136 1411 return;\r
1412 }\r
1413\r
d0d47c5b 1414 // word RAM (2M area)\r
1415 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1416 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1417 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1418 if (r3 & 4) { // 1M decode mode?\r
1419 decode_write16(a, d, r3);\r
d0d47c5b 1420 } else {\r
1421 // allow access in any mode, like Gens does\r
fa1e5e29 1422 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1423 }\r
1424 return;\r
1425 }\r
1426\r
1427 // word RAM (1M area)\r
68cba51e 1428 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1429 int bank;\r
d0d47c5b 1430 if (d)\r
913ef4b7 1431 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1432// if (!(Pico_mcd->s68k_regs[3]&4))\r
1433// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1434 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1435 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1436 return;\r
1437 }\r
1438\r
4f265db7 1439 // PCM\r
1440 if ((a&0xff8000)==0xff0000) {\r
1441 a &= 0x7fff;\r
1442 if (a >= 0x2000)\r
1443 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1444 else if (a < 0x12)\r
1445 pcm_write(a>>1, d & 0xff);\r
1446 return;\r
1447 }\r
1448\r
ab0607f7 1449 // bram\r
1450 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1451 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1452 a = (a>>1)&0x1fff;\r
1453 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1454 Pico_mcd->bram[a++] = d >> 8;\r
1455 SRam.changed = 1;\r
1456 return;\r
1457 }\r
1458\r
cc68a136 1459 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1460}\r
4ff2d527 1461#endif\r
cc68a136 1462\r
ab0607f7 1463\r
4ff2d527 1464#ifdef _ASM_CD_MEMORY_C\r
1465void PicoWriteS68k32(u32 a,u32 d);\r
1466#else\r
1467static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1468{\r
1469#ifdef __debug_io2\r
1470 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1471#endif\r
1472\r
1473 a&=0xfffffe;\r
1474\r
b5e5172d 1475#ifdef EMU_CORE_DEBUG\r
1476 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1477#endif\r
1478\r
cc68a136 1479 // prg RAM\r
1480 if (a < 0x80000) {\r
721cd396 1481 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1482 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1483 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1484 }\r
cc68a136 1485 return;\r
1486 }\r
1487\r
1488 // regs\r
1489 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1490 a &= 0x1fe;\r
1491 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1492 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1493 gfx_cd_write16(a, d>>16);\r
1494 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1495 } else {\r
2433f409 1496 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
cb4a513a 1497 s68k_reg_write8(a, d>>24);\r
1498 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1499 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1500 s68k_reg_write8(a+3, d &0xff);\r
1501 }\r
cc68a136 1502 return;\r
1503 }\r
1504\r
d0d47c5b 1505 // word RAM (2M area)\r
1506 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1507 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1508 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1509 if (r3 & 4) { // 1M decode mode?\r
1510 decode_write16(a , d >> 16, r3);\r
1511 decode_write16(a+2, d , r3);\r
d0d47c5b 1512 } else {\r
1513 // allow access in any mode, like Gens does\r
fa1e5e29 1514 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1515 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1516 }\r
1517 return;\r
1518 }\r
1519\r
1520 // word RAM (1M area)\r
68cba51e 1521 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1522 int bank;\r
1523 u16 *pm;\r
d0d47c5b 1524 if (d)\r
913ef4b7 1525 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1526// if (!(Pico_mcd->s68k_regs[3]&4))\r
1527// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1528 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1529 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1530 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1531 return;\r
1532 }\r
ab0607f7 1533\r
4f265db7 1534 // PCM\r
1535 if ((a&0xff8000)==0xff0000) {\r
1536 a &= 0x7fff;\r
1537 if (a >= 0x2000) {\r
1538 a >>= 1;\r
1539 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1540 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1541 } else if (a < 0x12) {\r
1542 a >>= 1;\r
1543 pcm_write(a, (d>>16) & 0xff);\r
1544 pcm_write(a+1, d & 0xff);\r
1545 }\r
1546 return;\r
1547 }\r
1548\r
ab0607f7 1549 // bram\r
1550 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1551 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1552 a = (a>>1)&0x1fff;\r
1553 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1554 Pico_mcd->bram[a++] = d >> 24;\r
1555 Pico_mcd->bram[a++] = d;\r
1556 Pico_mcd->bram[a++] = d >> 8;\r
1557 SRam.changed = 1;\r
1558 return;\r
1559 }\r
1560\r
cc68a136 1561 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1562}\r
4ff2d527 1563#endif\r
cc68a136 1564\r
1565\r
1566// -----------------------------------------------------------------\r
1567\r
b837b69b 1568\r
3aa1e148 1569#ifdef EMU_C68K\r
b837b69b 1570static __inline int PicoMemBaseM68k(u32 pc)\r
1571{\r
fa1e5e29 1572 if ((pc&0xe00000)==0xe00000)\r
1573 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1574\r
1575 if (pc < 0x20000)\r
fa1e5e29 1576 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1577\r
1578 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1579 {\r
fa1e5e29 1580 if (!(Pico_mcd->s68k_regs[3]&4))\r
1581 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1582 if (pc < 0x220000) {\r
3aa1e148 1583 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 1584 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1585 }\r
b837b69b 1586 }\r
1587\r
fa1e5e29 1588 // Error - Program Counter is invalid\r
1589 dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
1590\r
1591 return (int)Pico_mcd->bios;\r
b837b69b 1592}\r
1593\r
1594\r
1595static u32 PicoCheckPcM68k(u32 pc)\r
1596{\r
3aa1e148 1597 pc-=PicoCpuCM68k.membase; // Get real pc\r
b837b69b 1598 pc&=0xfffffe;\r
1599\r
3aa1e148 1600 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
b837b69b 1601\r
3aa1e148 1602 return PicoCpuCM68k.membase+pc;\r
b837b69b 1603}\r
1604\r
1605\r
1606static __inline int PicoMemBaseS68k(u32 pc)\r
1607{\r
fa1e5e29 1608 if (pc < 0x80000) // PRG RAM\r
1609 return (int)Pico_mcd->prg_ram;\r
b837b69b 1610\r
fa1e5e29 1611 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1612 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1613\r
1614 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
3aa1e148 1615 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1616 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1617 }\r
1618\r
fa1e5e29 1619 // Error - Program Counter is invalid\r
1620 dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
1621\r
1622 return (int)Pico_mcd->prg_ram;\r
b837b69b 1623}\r
1624\r
1625\r
1626static u32 PicoCheckPcS68k(u32 pc)\r
1627{\r
3aa1e148 1628 pc-=PicoCpuCS68k.membase; // Get real pc\r
b837b69b 1629 pc&=0xfffffe;\r
1630\r
3aa1e148 1631 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
b837b69b 1632\r
3aa1e148 1633 return PicoCpuCS68k.membase+pc;\r
b837b69b 1634}\r
1635#endif\r
1636\r
3aa1e148 1637#ifndef _ASM_CD_MEMORY_C\r
1638void PicoMemResetCD(int r3)\r
1639{\r
1640#ifdef EMU_F68K\r
1641 // update fetchmap..\r
1642 int i;\r
1643 if (!(r3 & 4))\r
1644 {\r
1645 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1646 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1647 }\r
1648 else\r
1649 {\r
1650 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1651 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1652 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1653 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1654 }\r
1655#endif\r
1656}\r
1657#endif\r
b837b69b 1658\r
eff55556 1659PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1660{\r
1661 dprintf("PicoMemSetupCD()");\r
1662#ifdef EMU_C68K\r
1663 // Setup m68k memory callbacks:\r
3aa1e148 1664 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1665 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1666 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1667 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1668 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1669 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1670 PicoCpuCM68k.write32=PicoWriteM68k32;\r
b837b69b 1671 // s68k\r
3aa1e148 1672 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1673 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1674 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1675 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1676 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1677 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1678 PicoCpuCS68k.write32=PicoWriteS68k32;\r
b837b69b 1679#endif\r
3aa1e148 1680#ifdef EMU_F68K\r
1681 // m68k\r
1682 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1683 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1684 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1685 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1686 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1687 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1688 // s68k\r
1689 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1690 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1691 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1692 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1693 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1694 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1695\r
1696 // setup FAME fetchmap\r
1697 {\r
1698 int i;\r
1699 // M68k\r
1700 // by default, point everything to fitst 64k of ROM (BIOS)\r
1701 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1702 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1703 // now real ROM (BIOS)\r
1704 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1705 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1706 // .. and RAM\r
1707 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1708 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1709 // S68k\r
1710 // PRG RAM is default\r
1711 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1712 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1713 // real PRG RAM\r
1714 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1715 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1716 // WORD RAM 2M area\r
1717 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1718 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1719 // PicoMemResetCD() will setup word ram for both\r
1720 }\r
1721#endif\r
1722\r
7a1f6e45 1723 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1724 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1725}\r
1726\r
1727\r
cc68a136 1728#ifdef EMU_M68K\r
1729unsigned char PicoReadCD8w (unsigned int a) {\r
3aa1e148 1730 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
cc68a136 1731}\r
1732unsigned short PicoReadCD16w(unsigned int a) {\r
3aa1e148 1733 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
cc68a136 1734}\r
1735unsigned int PicoReadCD32w(unsigned int a) {\r
3aa1e148 1736 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
cc68a136 1737}\r
1738void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
3aa1e148 1739 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
cc68a136 1740}\r
1741void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
3aa1e148 1742 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
cc68a136 1743}\r
1744void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
3aa1e148 1745 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
cc68a136 1746}\r
1747\r
1748// these are allowed to access RAM\r
b5e5172d 1749unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
1750{\r
cc68a136 1751 a&=0xffffff;\r
3aa1e148 1752 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1753 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1754 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1755 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1756 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1757 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1758 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1759 }\r
1760 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1761 } else {\r
cc68a136 1762 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1763 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1764 if((a&0xfc0000)==0x200000) { // word RAM\r
1765 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1766 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1767 else if (a < 0x220000) {\r
1768 int bank = Pico_mcd->s68k_regs[3]&1;\r
1769 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1770 }\r
1771 }\r
1772 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1773 }\r
1774 return 0;//(u8) lastread_d;\r
1775}\r
b5e5172d 1776unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
1777{\r
cc68a136 1778 a&=0xffffff;\r
3aa1e148 1779 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1780 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1781 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1782 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1783 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1784 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1785 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1786 }\r
1787 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1788 } else {\r
cc68a136 1789 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1790 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1791 if((a&0xfc0000)==0x200000) { // word RAM\r
1792 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1793 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1794 else if (a < 0x220000) {\r
1795 int bank = Pico_mcd->s68k_regs[3]&1;\r
1796 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1797 }\r
1798 }\r
1799 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1800 }\r
b837b69b 1801 return 0;\r
cc68a136 1802}\r
b5e5172d 1803unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
1804{\r
fa1e5e29 1805 u16 *pm;\r
cc68a136 1806 a&=0xffffff;\r
3aa1e148 1807 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1808 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1809 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1810 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1811 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1812 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1813 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1814 return (pm[0]<<16)|pm[1];\r
1815 }\r
1816 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1817 } else {\r
cc68a136 1818 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1819 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1820 if((a&0xfc0000)==0x200000) { // word RAM\r
1821 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1822 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1823 else if (a < 0x220000) {\r
1824 int bank = Pico_mcd->s68k_regs[3]&1;\r
1825 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1826 return (pm[0]<<16)|pm[1];\r
1827 }\r
1828 }\r
1829 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1830 }\r
b837b69b 1831 return 0;\r
cc68a136 1832}\r
1833#endif // EMU_M68K\r
1834\r
fast MegaDrive/MegaCD/32X emulator