amalgamation
[picodrive.git] / Pico / cd / Pico.c
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672ad671 1// (c) Copyright 2007 notaz, All rights reserved.
cc68a136 2
3
4#include "../PicoInt.h"
cc68a136 5
6
76276b0b 7extern unsigned char formatted_bram[4*0x10];
89fa852d 8extern unsigned int s68k_poll_adclk;
9
721cd396 10void (*PicoMCDopenTray)(void) = NULL;
11int (*PicoMCDcloseTray)(void) = NULL;
89fa852d 12
13#define dump_ram(ram,fname) \
14{ \
15 int i, d; \
16 FILE *f; \
17\
18 for (i = 0; i < sizeof(ram); i+=2) { \
19 d = (ram[i]<<8) | ram[i+1]; \
20 *(unsigned short *)(ram+i) = d; \
21 } \
22 f = fopen(fname, "wb"); \
23 if (f) { \
24 fwrite(ram, 1, sizeof(ram), f); \
25 fclose(f); \
26 } \
27 for (i = 0; i < sizeof(ram); i+=2) { \
28 d = (ram[i]<<8) | ram[i+1]; \
29 *(unsigned short *)(ram+i) = d; \
30 } \
31}
cc68a136 32
33
eff55556 34PICO_INTERNAL int PicoInitMCD(void)
cc68a136 35{
36 SekInitS68k();
37 Init_CD_Driver();
38
39 return 0;
40}
41
42
eff55556 43PICO_INTERNAL void PicoExitMCD(void)
cc68a136 44{
45 End_CD_Driver();
89fa852d 46
47 //dump_ram(Pico_mcd->prg_ram, "prg.bin");
48 //dump_ram(Pico.ram, "ram.bin");
cc68a136 49}
50
eff55556 51PICO_INTERNAL int PicoResetMCD(int hard)
cc68a136 52{
51a902ae 53 if (hard) {
a4030801 54 int fmt_size = sizeof(formatted_bram);
55 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
56 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
57 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
58 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
59 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
51a902ae 60 }
61 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 62 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 63 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 64
d1df8786 65 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
c008977e 66 Pico_mcd->m.state_flags |= 1; // s68k reset pending
672ad671 67 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
cc68a136 68
cc68a136 69 Reset_CD();
5c69a605 70 LC89510_Reset();
51a902ae 71 gfx_cd_reset();
4ff2d527 72#ifdef _ASM_CD_MEMORY_C
73 PicoMemResetCD(1);
00bd648e 74 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 75#endif
cc68a136 76
6cadc2da 77 // use SRam.data for RAM cart
78 if (SRam.data) free(SRam.data);
79 SRam.data = NULL;
80 if (PicoOpt&0x8000)
81 SRam.data = calloc(1, 0x12000);
82
cc68a136 83 return 0;
84}
85
eff55556 86static __inline void SekRunM68k(int cyc)
cc68a136 87{
88 int cyc_do;
89 SekCycleAim+=cyc;
90 if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return;
b837b69b 91#if defined(EMU_C68K)
92 PicoCpu.cycles=cyc_do;
93 CycloneRun(&PicoCpu);
94 SekCycleCnt+=cyc_do-PicoCpu.cycles;
95#elif defined(EMU_M68K)
cc68a136 96 m68k_set_context(&PicoM68kCPU);
97 SekCycleCnt+=m68k_execute(cyc_do);
98#endif
99}
100
101static __inline void SekRunS68k(int cyc)
102{
103 int cyc_do;
104 SekCycleAimS68k+=cyc;
105 if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return;
b837b69b 106#if defined(EMU_C68K)
107 PicoCpuS68k.cycles=cyc_do;
108 CycloneRun(&PicoCpuS68k);
109 SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles;
110#elif defined(EMU_M68K)
cc68a136 111 m68k_set_context(&PicoS68kCPU);
112 SekCycleCntS68k+=m68k_execute(cyc_do);
113#endif
114}
115
7336a99a 116#define PS_STEP_M68K ((488<<16)/20) // ~24
117//#define PS_STEP_S68K 13
68cba51e 118
a4030801 119#ifdef _ASM_CD_PICO_C
120void SekRunPS(int cyc_m68k, int cyc_s68k);
121#else
68cba51e 122static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
123{
7336a99a 124 int cycn, cycn_s68k, cyc_do;
125 int d_cm = 0, d_cs = 0, ex;
68cba51e 126 SekCycleAim+=cyc_m68k;
127 SekCycleAimS68k+=cyc_s68k;
7336a99a 128
129// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
130// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
131
132 /* loop 488 downto 0 in steps of PS_STEP */
133 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
134 {
135 ex = 0;
136 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
137//fprintf(stderr, "%3i/%3i: ", cycn>>16, cycn_s68k);
138 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
68cba51e 139#if defined(EMU_C68K)
7336a99a 140 PicoCpu.cycles = cyc_do;
68cba51e 141 CycloneRun(&PicoCpu);
7336a99a 142 SekCycleCnt += cyc_do - PicoCpu.cycles;
68cba51e 143#elif defined(EMU_M68K)
144 m68k_set_context(&PicoM68kCPU);
7336a99a 145 SekCycleCnt += (ex = m68k_execute(cyc_do));
68cba51e 146#endif
7336a99a 147 }
148//fprintf(stderr, "%3i ", ex); d_cm += ex; ex = 0;
149 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
68cba51e 150#if defined(EMU_C68K)
7336a99a 151 PicoCpuS68k.cycles = cyc_do;
68cba51e 152 CycloneRun(&PicoCpuS68k);
7336a99a 153 SekCycleCntS68k += cyc_do - PicoCpuS68k.cycles;
68cba51e 154#elif defined(EMU_M68K)
155 m68k_set_context(&PicoS68kCPU);
7336a99a 156 SekCycleCntS68k += (ex = m68k_execute(cyc_do));
68cba51e 157#endif
7336a99a 158 }
159//fprintf(stderr, "%3i\n", ex); d_cs += ex;
68cba51e 160 }
7336a99a 161
162//fprintf(stderr, "== end %3i/%3i ==\n", d_cm, d_cs);
68cba51e 163}
7336a99a 164#endif
68cba51e 165
166
bf098bc5 167static __inline void check_cd_dma(void)
168{
169 int ddx;
170
c459aefd 171 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
bf098bc5 172
173 ddx = Pico_mcd->s68k_regs[4] & 7;
174 if (ddx < 2) return; // invalid
c459aefd 175 if (ddx < 4) {
176 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
177 return;
178 }
bf098bc5 179 if (ddx == 6) return; // invalid
180
181 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
182}
183
4f265db7 184static __inline void update_chips(void)
185{
186 int counter_timer, int3_set;
187 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
188
189 // 75Hz CDC update
190 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
191 Pico_mcd->m.counter75hz -= counter75hz_lim;
192 Check_CD_Command();
193 }
194
195 // update timers
196 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
197 Pico_mcd->m.timer_stopwatch += counter_timer;
198 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
199 Pico_mcd->m.timer_int3 -= counter_timer;
200 if (Pico_mcd->m.timer_int3 < 0) {
201 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
202 dprintf("s68k: timer irq 3");
203 SekInterruptS68k(3);
204 Pico_mcd->m.timer_int3 += int3_set << 16;
205 }
206 // is this really what happens if irq3 is masked out?
207 Pico_mcd->m.timer_int3 &= 0xffffff;
208 }
209 }
210
211 // update gfx chip
212 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
213 gfx_cd_update();
89fa852d 214
215 // delayed setting of DMNA bit (needed for Silpheed)
216 if (Pico_mcd->m.state_flags & 2) {
217 Pico_mcd->m.state_flags &= ~2;
46969540 218 if (!(Pico_mcd->s68k_regs[3] & 4)) {
219 Pico_mcd->s68k_regs[3] |= 2;
220 Pico_mcd->s68k_regs[3] &= ~1;
89fa852d 221#ifdef USE_POLL_DETECT
46969540 222 if ((s68k_poll_adclk&0xfe) == 2) {
223 SekSetStopS68k(0); s68k_poll_adclk = 0;
224 }
89fa852d 225#endif
46969540 226 }
89fa852d 227 }
4f265db7 228}
229
b837b69b 230
cc68a136 231static int PicoFrameHintsMCD(void)
232{
233 struct PicoVideo *pv=&Pico.video;
4f265db7 234 int total_z80=0,lines,y,lines_vis = 224,z80CycleAim = 0,line_sample;
cc68a136 235 const int cycles_68k=488,cycles_z80=228,cycles_s68k=795; // both PAL and NTSC compile to same values
236 int skip=PicoSkipFrame || (PicoOpt&0x10);
237 int hint; // Hint counter
238
239 if(Pico.m.pal) { //
240 //cycles_68k = (int) ((double) OSC_PAL / 7 / 50 / 312 + 0.4); // should compile to a constant (488)
241 //cycles_z80 = (int) ((double) OSC_PAL / 15 / 50 / 312 + 0.4); // 228
242 lines = 312; // Steve Snake says there are 313 lines, but this seems to also work well
243 line_sample = 68;
244 if(pv->reg[1]&8) lines_vis = 240;
245 } else {
246 //cycles_68k = (int) ((double) OSC_NTSC / 7 / 60 / 262 + 0.4); // 488
247 //cycles_z80 = (int) ((double) OSC_NTSC / 15 / 60 / 262 + 0.4); // 228
248 lines = 262;
249 line_sample = 93;
250 }
251
252 SekCyclesReset();
253 SekCyclesResetS68k();
254 //z80ExtraCycles = 0;
255
256 if(PicoOpt&4)
257 z80CycleAim = 0;
258// z80_resetCycles();
259
260 pv->status&=~0x88; // clear V-Int, come out of vblank
261
262 hint=pv->reg[10]; // Load H-Int counter
263 //dprintf("-hint: %i", hint);
264
265 for (y=0;y<lines;y++)
266 {
267 Pico.m.scanline=(short)y;
268
269 // pad delay (for 6 button pads)
270 if(PicoOpt&0x20) {
271 if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0;
272 if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0;
273 }
274
bf098bc5 275 check_cd_dma();
276
cc68a136 277 // H-Interrupts:
278 if(y <= lines_vis && --hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
279 {
280 //dprintf("rhint:old @ %06x", SekPc);
281 hint=pv->reg[10]; // Reload H-Int counter
282 pv->pending_ints|=0x10;
283 if (pv->reg[0]&0x10) SekInterrupt(4);
284 //dprintf("rhint: %i @ %06x [%i|%i]", hint, SekPc, y, SekCycleCnt);
285 //dprintf("hint_routine: %x", (*(unsigned short*)(Pico.ram+0x0B84)<<16)|*(unsigned short*)(Pico.ram+0x0B86));
286 }
287
288 // V-Interrupt:
289 if (y == lines_vis)
290 {
291 //dprintf("vint: @ %06x [%i|%i]", SekPc, y, SekCycleCnt);
292 pv->status|=0x88; // V-Int happened, go into vblank
eff55556 293 SekRunM68k(128); SekCycleAim-=128; // there must be a gap between H and V ints, also after vblank bit set (Mazin Saga, Bram Stoker's Dracula)
cc68a136 294 /*if(Pico.m.z80Run && (PicoOpt&4)) {
295 z80CycleAim+=cycles_z80/2;
296 total_z80+=z80_run(z80CycleAim-total_z80);
297 z80CycleAim-=cycles_z80/2;
298 }*/
299 pv->pending_ints|=0x20;
300 if(pv->reg[1]&0x20) SekInterrupt(6);
301 if(Pico.m.z80Run && (PicoOpt&4)) // ?
302 z80_int();
303 //dprintf("zint: [%i|%i] zPC=%04x", Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0));
304 }
305
306 // decide if we draw this line
307#if CAN_HANDLE_240_LINES
308 if(!skip && ((!(pv->reg[1]&8) && y<224) || ((pv->reg[1]&8) && y<240)) )
309#else
310 if(!skip && y<224)
311#endif
312 PicoLine(y);
313
314 if(PicoOpt&1)
315 sound_timers_and_dac(y);
316
317 // get samples from sound chips
7a93adeb 318 if (y == 224 && PsndOut) {
319 int len = sound_render(0, PsndLen);
320 if (PicoWriteSound) PicoWriteSound(len);
321 // clear sound buffer
322 sound_clear();
323 }
cc68a136 324
325 // Run scanline:
326 //dprintf("m68k starting exec @ %06x", SekPc);
89fa852d 327 if (Pico.m.dma_bytes) SekCycleCnt+=CheckDMA();
328 if ((PicoOpt & 0x2000) && (Pico_mcd->m.busreq&3) == 1) {
7336a99a 329 SekRunPS(cycles_68k, cycles_s68k); // "better/perfect sync"
68cba51e 330 } else {
eff55556 331 SekRunM68k(cycles_68k);
68cba51e 332 if ((Pico_mcd->m.busreq&3) == 1) // no busreq/no reset
333 SekRunS68k(cycles_s68k);
cc68a136 334 }
335
89fa852d 336 if ((PicoOpt&4) && Pico.m.z80Run) {
d9153729 337 if (Pico.m.z80Run & 2) z80CycleAim+=cycles_z80;
338 else {
339 int cnt = SekCyclesDone() - z80startCycle;
340 cnt = (cnt>>1)-(cnt>>5);
341 //if (cnt > cycles_z80) printf("FIXME: z80 cycles: %i\n", cnt);
342 if (cnt > cycles_z80) cnt = cycles_z80;
343 Pico.m.z80Run |= 2;
344 z80CycleAim+=cnt;
345 }
cc68a136 346 total_z80+=z80_run(z80CycleAim-total_z80);
347 }
348
4f265db7 349 update_chips();
cc68a136 350 }
351
352 // draw a frame just after vblank in alternative render mode
89fa852d 353 if (!PicoSkipFrame && (PicoOpt&0x10))
cc68a136 354 PicoFrameFull();
355
356 return 0;
357}
358
359
eff55556 360PICO_INTERNAL int PicoFrameMCD(void)
cc68a136 361{
362 if(!(PicoOpt&0x10))
363 PicoFrameStart();
364
365 PicoFrameHintsMCD();
366
367 return 0;
368}
369
370