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1 | #ifndef __SH2_H__\r |
2 | #define __SH2_H__\r |
3 | \r |
4 | // pico memhandlers\r |
5 | // XXX: move somewhere else\r |
6 | unsigned int p32x_sh2_read8(unsigned int a, int id);\r |
7 | unsigned int p32x_sh2_read16(unsigned int a, int id);\r |
8 | unsigned int p32x_sh2_read32(unsigned int a, int id);\r |
9 | void p32x_sh2_write8(unsigned int a, unsigned int d, int id);\r |
10 | void p32x_sh2_write16(unsigned int a, unsigned int d, int id);\r |
11 | void p32x_sh2_write32(unsigned int a, unsigned int d, int id);\r |
12 | \r |
13 | \r |
14 | typedef struct\r |
15 | {\r |
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16 | unsigned int r[16]; // 00\r |
17 | unsigned int pc; // 40\r |
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18 | unsigned int ppc;\r |
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19 | unsigned int pr;\r |
20 | unsigned int sr;\r |
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21 | unsigned int gbr, vbr; // 50\r |
22 | unsigned int mach, macl; // 58\r |
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23 | \r |
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24 | // interpreter stuff\r |
25 | int icount; // 60 cycles left in current timeslice\r |
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26 | unsigned int ea;\r |
27 | unsigned int delay;\r |
28 | unsigned int test_irq;\r |
29 | \r |
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30 | // drc stuff\r |
31 | void **pc_hashtab; // 70\r |
32 | \r |
33 | // common\r |
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34 | int pending_irl;\r |
35 | int pending_int_irq; // internal irq\r |
36 | int pending_int_vector;\r |
37 | void (*irq_callback)(int id, int level);\r |
38 | int is_slave;\r |
39 | \r |
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40 | unsigned int cycles_aim; // subtract sh2_icount to get global counter\r |
41 | unsigned int cycles_done;\r |
42 | } SH2;\r |
43 | \r |
44 | extern SH2 *sh2; // active sh2\r |
45 | \r |
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46 | int sh2_init(SH2 *sh2, int is_slave);\r |
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47 | void sh2_reset(SH2 *sh2);\r |
48 | void sh2_irl_irq(SH2 *sh2, int level);\r |
49 | void sh2_internal_irq(SH2 *sh2, int level, int vector);\r |
50 | \r |
51 | void sh2_execute(SH2 *sh2, int cycles);\r |
52 | \r |
53 | #endif /* __SH2_H__ */\r |