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1 | /* |
f89d8471 |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2009-2010 |
3 | * |
4 | * This work is licensed under the terms of any of these licenses |
5 | * (at your option): |
6 | * - GNU GPL, version 2 or later. |
7 | * - GNU LGPL, version 2.1 or later. |
8 | * - MAME license. |
9 | * See the COPYING file in the top-level directory. |
10 | * |
f27b1cea |
11 | * <random_info=mem_map> |
12 | * 00000000-029fffff linux (42MB) |
13 | * 02a00000-02dfffff fb (4MB, 153600B really used) |
14 | * 02e00000-02ffffff sound dma (2MB) |
15 | * 03000000-03ffffff MPEGDEC (?, 16MB) |
16 | * </random_info> |
17 | */ |
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18 | |
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19 | #include <stdio.h> |
20 | #include <stdlib.h> |
21 | #include <string.h> |
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22 | #include <sys/types.h> |
23 | #include <sys/stat.h> |
24 | #include <fcntl.h> |
25 | #include <sys/mman.h> |
26 | #include <unistd.h> |
27 | #include <sys/ioctl.h> |
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28 | #include <linux/soundcard.h> |
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29 | |
30 | #include "soc.h" |
31 | #include "plat_gp2x.h" |
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32 | #include "../plat.h" |
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33 | |
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34 | static int battdev = -1, mixerdev = -1; |
35 | static int cpu_clock_allowed; |
36 | static unsigned int saved_video_regs[2][6]; |
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37 | static unsigned int timer_drift; // count per real second |
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38 | |
39 | #ifndef ARRAY_SIZE |
40 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) |
41 | #endif |
42 | |
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43 | /* note: both PLLs are programmed the same way, |
44 | * the databook incorrectly states that PLL1 differs */ |
45 | static int decode_pll(unsigned int reg) |
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46 | { |
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47 | long long v; |
48 | int p, m, s; |
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49 | |
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50 | p = (reg >> 18) & 0x3f; |
51 | m = (reg >> 8) & 0x3ff; |
52 | s = reg & 0xff; |
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53 | |
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54 | if (p == 0) |
55 | p = 1; |
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56 | |
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57 | v = 27000000; // master clock |
58 | v = v * m / (p << s); |
59 | return v; |
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60 | } |
61 | |
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62 | #define TIMER_BASE3 0x1980 |
63 | #define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2] |
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64 | |
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65 | static unsigned int gp2x_get_ticks_us_(void) |
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66 | { |
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67 | TIMER_REG(0x08) = 0x4b; /* run timer, latch value */ |
68 | return TIMER_REG(0); |
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69 | } |
70 | |
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71 | static unsigned int gp2x_get_ticks_ms_(void) |
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72 | { |
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73 | /* approximate /= 1000 */ |
74 | unsigned long long v64; |
75 | v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968; |
76 | return v64 >> 32; |
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77 | } |
78 | |
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79 | static void timer_cleanup(void) |
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80 | { |
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81 | TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */ |
82 | TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */ |
83 | TIMER_REG(0x00) = 0; /* clear counter */ |
84 | TIMER_REG(0x40) = 0; /* clocks off */ |
85 | TIMER_REG(0x44) = 0; /* dividers back to default */ |
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86 | } |
87 | |
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88 | static void save_multiple_regs(unsigned int *dest, int base, int count) |
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89 | { |
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90 | const volatile unsigned int *regs = memregl + base / 4; |
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91 | int i; |
92 | |
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93 | for (i = 0; i < count; i++) |
94 | dest[i] = regs[i]; |
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95 | } |
96 | |
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97 | static void restore_multiple_regs(int base, const unsigned int *src, int count) |
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98 | { |
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99 | volatile unsigned int *regs = memregl + base / 4; |
100 | int i; |
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101 | |
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102 | for (i = 0; i < count; i++) |
103 | regs[i] = src[i]; |
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104 | } |
105 | |
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106 | int pollux_get_real_snd_rate(int req_rate) |
107 | { |
108 | int clk0_src, clk1_src, rate, div; |
109 | |
110 | clk0_src = (memregl[0xdbc4>>2] >> 1) & 7; |
111 | clk1_src = (memregl[0xdbc8>>2] >> 1) & 7; |
112 | if (clk0_src > 1 || clk1_src != 7) { |
113 | fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src); |
114 | return req_rate; |
115 | } |
116 | |
117 | rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]); |
118 | |
119 | // apply divisors |
120 | div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1; |
121 | rate /= div; |
122 | div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1; |
123 | rate /= div; |
124 | rate /= 64; |
125 | |
126 | //printf("rate %d\n", rate); |
127 | rate -= rate * timer_drift / 1000000; |
128 | printf("adjusted rate: %d\n", rate); |
129 | |
130 | if (rate < 8000-1000 || rate > 44100+1000) { |
131 | fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate); |
132 | return req_rate; |
133 | } |
134 | |
135 | return rate; |
136 | } |
137 | |
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138 | /* newer API */ |
139 | static int pollux_cpu_clock_get(void) |
140 | { |
141 | return decode_pll(memregl[0xf004>>2]) / 1000000; |
142 | } |
143 | |
144 | int pollux_cpu_clock_set(int mhz) |
145 | { |
146 | int adiv, mdiv, pdiv, sdiv = 0; |
147 | int i, vf000, vf004; |
148 | |
149 | if (!cpu_clock_allowed) |
150 | return -1; |
151 | if (mhz == pollux_cpu_clock_get()) |
152 | return 0; |
153 | |
154 | // m = MDIV, p = PDIV, s = SDIV |
155 | #define SYS_CLK_FREQ 27 |
156 | pdiv = 9; |
157 | mdiv = (mhz * pdiv) / SYS_CLK_FREQ; |
158 | if (mdiv & ~0x3ff) |
159 | return -1; |
160 | vf004 = (pdiv<<18) | (mdiv<<8) | sdiv; |
161 | |
162 | // attempt to keep the AHB divider close to 250, but not higher |
163 | for (adiv = 1; mhz / adiv > 250; adiv++) |
164 | ; |
165 | |
166 | vf000 = memregl[0xf000>>2]; |
167 | vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6); |
168 | memregl[0xf000>>2] = vf000; |
169 | memregl[0xf004>>2] = vf004; |
170 | memregl[0xf07c>>2] |= 0x8000; |
171 | for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++) |
172 | ; |
173 | |
174 | printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv); |
175 | return 0; |
176 | } |
177 | |
178 | static int pollux_bat_capacity_get(void) |
179 | { |
180 | unsigned short magic_val = 0; |
181 | |
182 | if (battdev < 0) |
183 | return -1; |
184 | if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val)) |
185 | return -1; |
186 | switch (magic_val) { |
187 | default: |
188 | case 1: return 100; |
189 | case 2: return 66; |
190 | case 3: return 40; |
191 | case 4: return 0; |
192 | } |
193 | } |
194 | |
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195 | static int step_volume(int *volume, int diff) |
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196 | { |
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197 | int ret, val; |
198 | |
199 | if (mixerdev < 0) |
200 | return -1; |
201 | |
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202 | *volume += diff; |
203 | if (*volume > 255) |
204 | *volume = 255; |
205 | else if (*volume < 0) |
206 | *volume = 0; |
207 | |
208 | val = *volume; |
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209 | val |= val << 8; |
210 | |
211 | ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val); |
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212 | if (ret == -1) { |
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213 | perror("WRITE_PCM"); |
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214 | return ret; |
215 | } |
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216 | |
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217 | return 0; |
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218 | } |
219 | |
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220 | void pollux_init(void) |
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221 | { |
222 | int rate, timer_div, timer_div2; |
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223 | |
224 | memdev = open("/dev/mem", O_RDWR); |
225 | if (memdev == -1) { |
226 | perror("open(/dev/mem) failed"); |
227 | exit(1); |
228 | } |
229 | |
230 | memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, |
231 | memdev, 0xc0000000); |
232 | if (memregs == MAP_FAILED) { |
233 | perror("mmap(memregs) failed"); |
234 | exit(1); |
235 | } |
236 | memregl = (volatile void *)memregs; |
237 | |
238 | // save video regs of both MLCs |
239 | save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0])); |
240 | save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1])); |
241 | |
242 | /* some firmwares have sys clk on PLL0, we can't adjust CPU clock |
243 | * by reprogramming the PLL0 then, as it overclocks system bus */ |
244 | if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000) |
245 | cpu_clock_allowed = 1; |
246 | else { |
247 | cpu_clock_allowed = 0; |
248 | fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n", |
249 | memregl[0xf000>>2]); |
250 | } |
251 | |
252 | /* find what PLL1 runs at, for the timer */ |
253 | rate = decode_pll(memregl[0xf008>>2]); |
254 | printf("PLL1 @ %dHz\n", rate); |
255 | |
256 | /* setup timer */ |
257 | timer_div = (rate + 500000) / 1000000; |
258 | timer_div2 = 0; |
259 | while (timer_div > 256) { |
260 | timer_div /= 2; |
261 | timer_div2++; |
262 | } |
263 | if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) { |
264 | int timer_rate = (rate >> timer_div2) / timer_div; |
265 | if (TIMER_REG(0x08) & 8) { |
266 | fprintf(stderr, "warning: timer in use, overriding!\n"); |
267 | timer_cleanup(); |
268 | } |
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269 | timer_drift = timer_rate - 1000000; |
270 | if (timer_drift != 0) |
271 | fprintf(stderr, "warning: timer drift %d us\n", |
272 | timer_drift); |
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273 | |
274 | timer_div2 = (timer_div2 + 3) & 3; |
275 | TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */ |
276 | TIMER_REG(0x40) = 0x0c; /* clocks on */ |
277 | TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */ |
278 | } |
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279 | else { |
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280 | fprintf(stderr, "warning: could not make use of timer\n"); |
281 | |
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282 | // those functions are actually not good at all on Wiz kernel |
283 | gp2x_get_ticks_ms = plat_get_ticks_ms_good; |
284 | gp2x_get_ticks_us = plat_get_ticks_us_good; |
285 | } |
286 | |
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287 | battdev = open("/dev/pollux_batt", O_RDONLY); |
288 | if (battdev < 0) |
289 | perror("Warning: could't open pollux_batt"); |
290 | |
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291 | mixerdev = open("/dev/mixer", O_RDWR); |
292 | if (mixerdev == -1) |
293 | perror("open(/dev/mixer)"); |
294 | |
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295 | plat_target.cpu_clock_get = pollux_cpu_clock_get; |
296 | plat_target.cpu_clock_set = pollux_cpu_clock_set; |
297 | plat_target.bat_capacity_get = pollux_bat_capacity_get; |
298 | plat_target.step_volume = step_volume; |
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299 | |
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300 | gp2x_get_ticks_ms = gp2x_get_ticks_ms_; |
301 | gp2x_get_ticks_us = gp2x_get_ticks_us_; |
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302 | } |
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303 | |
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304 | void pollux_finish(void) |
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305 | { |
306 | timer_cleanup(); |
307 | |
308 | restore_multiple_regs(0x4058, saved_video_regs[0], |
309 | ARRAY_SIZE(saved_video_regs[0])); |
310 | restore_multiple_regs(0x4458, saved_video_regs[1], |
311 | ARRAY_SIZE(saved_video_regs[1])); |
312 | memregl[0x4058>>2] |= 0x10; |
313 | memregl[0x4458>>2] |= 0x10; |
314 | |
315 | if (battdev >= 0) |
316 | close(battdev); |
317 | if (mixerdev >= 0) |
318 | close(mixerdev); |
319 | munmap((void *)memregs, 0x20000); |
320 | close(memdev); |
321 | } |