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1 | // (c) Copyright 2007 notaz, All rights reserved. |
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2 | |
3 | |
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4 | #include "../pico_int.h" |
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5 | |
6 | |
7 | int SekCycleCntS68k=0; // cycles done in this frame |
8 | int SekCycleAimS68k=0; // cycle aim |
9 | |
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10 | |
11 | /* context */ |
12 | // Cyclone 68000 |
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13 | #ifdef EMU_C68K |
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14 | struct Cyclone PicoCpuCS68k; |
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15 | #endif |
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16 | // MUSASHI 68000 |
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17 | #ifdef EMU_M68K |
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18 | m68ki_cpu_core PicoCpuMS68k; |
19 | #endif |
20 | // FAME 68000 |
21 | #ifdef EMU_F68K |
22 | M68K_CONTEXT PicoCpuFS68k; |
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23 | #endif |
24 | |
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25 | |
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26 | static int new_irq_level(int level) |
27 | { |
28 | int level_new = 0, irqs; |
29 | Pico_mcd->m.s68k_pend_ints &= ~(1 << level); |
30 | irqs = Pico_mcd->m.s68k_pend_ints; |
31 | irqs &= Pico_mcd->s68k_regs[0x33]; |
32 | while ((irqs >>= 1)) level_new++; |
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33 | |
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34 | return level_new; |
35 | } |
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36 | |
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37 | #ifdef EMU_C68K |
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38 | // interrupt acknowledgement |
39 | static int SekIntAckS68k(int level) |
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40 | { |
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41 | int level_new = new_irq_level(level); |
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42 | |
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43 | elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new); |
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44 | PicoCpuCS68k.irq = level_new; |
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45 | return CYCLONE_INT_ACK_AUTOVECTOR; |
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46 | } |
47 | |
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48 | static void SekResetAckS68k(void) |
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49 | { |
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50 | elprintf(EL_ANOMALY, "s68k: Reset encountered @ %06x", SekPcS68k); |
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51 | } |
52 | |
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53 | static int SekUnrecognizedOpcodeS68k(void) |
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54 | { |
55 | unsigned int pc, op; |
56 | pc = SekPcS68k; |
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57 | op = PicoCpuCS68k.read16(pc); |
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58 | elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc); |
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59 | //exit(1); |
60 | return 0; |
61 | } |
62 | #endif |
63 | |
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64 | #ifdef EMU_M68K |
65 | static int SekIntAckMS68k(int level) |
66 | { |
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67 | #ifndef EMU_CORE_DEBUG |
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68 | int level_new = new_irq_level(level); |
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69 | elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new); |
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70 | CPU_INT_LEVEL = level_new << 8; |
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71 | #else |
72 | CPU_INT_LEVEL = 0; |
73 | #endif |
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74 | return M68K_INT_ACK_AUTOVECTOR; |
75 | } |
76 | #endif |
77 | |
78 | #ifdef EMU_F68K |
79 | static void SekIntAckFS68k(unsigned level) |
80 | { |
81 | int level_new = new_irq_level(level); |
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82 | elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new); |
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83 | #ifndef EMU_CORE_DEBUG |
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84 | PicoCpuFS68k.interrupts[0] = level_new; |
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85 | #else |
86 | { |
87 | extern int dbg_irq_level_sub; |
88 | dbg_irq_level_sub = level_new; |
89 | PicoCpuFS68k.interrupts[0] = 0; |
90 | } |
91 | #endif |
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92 | } |
93 | #endif |
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94 | |
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95 | |
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96 | PICO_INTERNAL void SekInitS68k(void) |
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97 | { |
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98 | #ifdef EMU_C68K |
99 | // CycloneInit(); |
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100 | memset(&PicoCpuCS68k,0,sizeof(PicoCpuCS68k)); |
101 | PicoCpuCS68k.IrqCallback=SekIntAckS68k; |
102 | PicoCpuCS68k.ResetCallback=SekResetAckS68k; |
103 | PicoCpuCS68k.UnrecognizedCallback=SekUnrecognizedOpcodeS68k; |
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104 | #endif |
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105 | #ifdef EMU_M68K |
106 | { |
107 | // Musashi is not very context friendly.. |
108 | void *oldcontext = m68ki_cpu_p; |
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109 | m68k_set_context(&PicoCpuMS68k); |
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110 | m68k_set_cpu_type(M68K_CPU_TYPE_68000); |
111 | m68k_init(); |
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112 | m68k_set_int_ack_callback(SekIntAckMS68k); |
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113 | // m68k_pulse_reset(); // not yet, memmap is not set up |
114 | m68k_set_context(oldcontext); |
115 | } |
116 | #endif |
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117 | #ifdef EMU_F68K |
118 | { |
119 | void *oldcontext = g_m68kcontext; |
120 | g_m68kcontext = &PicoCpuFS68k; |
121 | memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k)); |
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122 | fm68k_init(); |
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123 | PicoCpuFS68k.iack_handler = SekIntAckFS68k; |
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124 | PicoCpuFS68k.sr = 0x2704; // Z flag |
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125 | g_m68kcontext = oldcontext; |
126 | } |
127 | #endif |
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128 | } |
129 | |
130 | // Reset the 68000: |
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131 | PICO_INTERNAL int SekResetS68k(void) |
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132 | { |
133 | if (Pico.rom==NULL) return 1; |
134 | |
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135 | #ifdef EMU_C68K |
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136 | PicoCpuCS68k.state_flags=0; |
137 | PicoCpuCS68k.osp=0; |
138 | PicoCpuCS68k.srh =0x27; // Supervisor mode |
139 | PicoCpuCS68k.flags=4; // Z set |
140 | PicoCpuCS68k.irq=0; |
141 | PicoCpuCS68k.a[7]=PicoCpuCS68k.read32(0); // Stack Pointer |
142 | PicoCpuCS68k.membase=0; |
143 | PicoCpuCS68k.pc=PicoCpuCS68k.checkpc(PicoCpuCS68k.read32(4)); // Program Counter |
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144 | #endif |
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145 | #ifdef EMU_M68K |
146 | { |
147 | void *oldcontext = m68ki_cpu_p; |
148 | |
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149 | m68k_set_context(&PicoCpuMS68k); |
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150 | m68ki_cpu.sp[0]=0; |
151 | m68k_set_irq(0); |
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152 | m68k_pulse_reset(); |
153 | m68k_set_context(oldcontext); |
154 | } |
155 | #endif |
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156 | #ifdef EMU_F68K |
157 | { |
158 | void *oldcontext = g_m68kcontext; |
159 | g_m68kcontext = &PicoCpuFS68k; |
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160 | fm68k_reset(); |
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161 | g_m68kcontext = oldcontext; |
162 | } |
163 | #endif |
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164 | |
165 | return 0; |
166 | } |
167 | |
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168 | PICO_INTERNAL int SekInterruptS68k(int irq) |
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169 | { |
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170 | int irqs, real_irq = 1; |
171 | Pico_mcd->m.s68k_pend_ints |= 1 << irq; |
172 | irqs = Pico_mcd->m.s68k_pend_ints >> 1; |
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173 | while ((irqs >>= 1)) real_irq++; |
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174 | |
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175 | #ifdef EMU_CORE_DEBUG |
176 | { |
177 | extern int dbg_irq_level_sub; |
178 | dbg_irq_level_sub=real_irq; |
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179 | return 0; |
180 | } |
181 | #endif |
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182 | #ifdef EMU_C68K |
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183 | PicoCpuCS68k.irq=real_irq; |
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184 | #endif |
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185 | #ifdef EMU_M68K |
186 | void *oldcontext = m68ki_cpu_p; |
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187 | m68k_set_context(&PicoCpuMS68k); |
188 | m68k_set_irq(real_irq); |
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189 | m68k_set_context(oldcontext); |
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190 | #endif |
191 | #ifdef EMU_F68K |
192 | PicoCpuFS68k.interrupts[0]=real_irq; |
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193 | #endif |
194 | return 0; |
195 | } |
196 | |