bugfixes related to mmap usage for ROM
[picodrive.git] / pico / cd / sek.c
CommitLineData
03e4f2a3 1// (c) Copyright 2007 notaz, All rights reserved.
cc68a136 2
3
efcba75f 4#include "../pico_int.h"
cc68a136 5
6
7int SekCycleCntS68k=0; // cycles done in this frame
8int SekCycleAimS68k=0; // cycle aim
9
3aa1e148 10
11/* context */
12// Cyclone 68000
b837b69b 13#ifdef EMU_C68K
3aa1e148 14struct Cyclone PicoCpuCS68k;
b837b69b 15#endif
3aa1e148 16// MUSASHI 68000
cc68a136 17#ifdef EMU_M68K
3aa1e148 18m68ki_cpu_core PicoCpuMS68k;
19#endif
20// FAME 68000
21#ifdef EMU_F68K
22M68K_CONTEXT PicoCpuFS68k;
cc68a136 23#endif
24
3aa1e148 25
51a902ae 26static int new_irq_level(int level)
27{
28 int level_new = 0, irqs;
29 Pico_mcd->m.s68k_pend_ints &= ~(1 << level);
30 irqs = Pico_mcd->m.s68k_pend_ints;
31 irqs &= Pico_mcd->s68k_regs[0x33];
32 while ((irqs >>= 1)) level_new++;
b837b69b 33
51a902ae 34 return level_new;
35}
cc68a136 36
b837b69b 37#ifdef EMU_C68K
0af33fe0 38// interrupt acknowledgement
39static int SekIntAckS68k(int level)
b837b69b 40{
51a902ae 41 int level_new = new_irq_level(level);
b837b69b 42
ca61ee42 43 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
3aa1e148 44 PicoCpuCS68k.irq = level_new;
0af33fe0 45 return CYCLONE_INT_ACK_AUTOVECTOR;
b837b69b 46}
47
eff55556 48static void SekResetAckS68k(void)
b837b69b 49{
ca61ee42 50 elprintf(EL_ANOMALY, "s68k: Reset encountered @ %06x", SekPcS68k);
b837b69b 51}
52
eff55556 53static int SekUnrecognizedOpcodeS68k(void)
b837b69b 54{
a736af3e 55 elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", SekPcS68k);
b837b69b 56 //exit(1);
57 return 0;
58}
59#endif
60
3aa1e148 61#ifdef EMU_M68K
62static int SekIntAckMS68k(int level)
63{
b5e5172d 64#ifndef EMU_CORE_DEBUG
3aa1e148 65 int level_new = new_irq_level(level);
ca61ee42 66 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
3aa1e148 67 CPU_INT_LEVEL = level_new << 8;
b5e5172d 68#else
69 CPU_INT_LEVEL = 0;
70#endif
3aa1e148 71 return M68K_INT_ACK_AUTOVECTOR;
72}
73#endif
74
75#ifdef EMU_F68K
76static void SekIntAckFS68k(unsigned level)
77{
78 int level_new = new_irq_level(level);
ca61ee42 79 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
b5e5172d 80#ifndef EMU_CORE_DEBUG
3aa1e148 81 PicoCpuFS68k.interrupts[0] = level_new;
b5e5172d 82#else
83 {
84 extern int dbg_irq_level_sub;
85 dbg_irq_level_sub = level_new;
86 PicoCpuFS68k.interrupts[0] = 0;
87 }
88#endif
3aa1e148 89}
90#endif
b837b69b 91
cc68a136 92
2aa27095 93PICO_INTERNAL void SekInitS68k(void)
cc68a136 94{
b837b69b 95#ifdef EMU_C68K
96// CycloneInit();
3aa1e148 97 memset(&PicoCpuCS68k,0,sizeof(PicoCpuCS68k));
98 PicoCpuCS68k.IrqCallback=SekIntAckS68k;
99 PicoCpuCS68k.ResetCallback=SekResetAckS68k;
100 PicoCpuCS68k.UnrecognizedCallback=SekUnrecognizedOpcodeS68k;
b837b69b 101#endif
cc68a136 102#ifdef EMU_M68K
103 {
104 // Musashi is not very context friendly..
105 void *oldcontext = m68ki_cpu_p;
3aa1e148 106 m68k_set_context(&PicoCpuMS68k);
cc68a136 107 m68k_set_cpu_type(M68K_CPU_TYPE_68000);
108 m68k_init();
3aa1e148 109 m68k_set_int_ack_callback(SekIntAckMS68k);
cc68a136 110// m68k_pulse_reset(); // not yet, memmap is not set up
111 m68k_set_context(oldcontext);
112 }
113#endif
3aa1e148 114#ifdef EMU_F68K
115 {
116 void *oldcontext = g_m68kcontext;
117 g_m68kcontext = &PicoCpuFS68k;
118 memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k));
03e4f2a3 119 fm68k_init();
3aa1e148 120 PicoCpuFS68k.iack_handler = SekIntAckFS68k;
b5e5172d 121 PicoCpuFS68k.sr = 0x2704; // Z flag
3aa1e148 122 g_m68kcontext = oldcontext;
123 }
124#endif
cc68a136 125}
126
127// Reset the 68000:
2aa27095 128PICO_INTERNAL int SekResetS68k(void)
cc68a136 129{
130 if (Pico.rom==NULL) return 1;
131
b837b69b 132#ifdef EMU_C68K
5e89f0f5 133 CycloneReset(&PicoCpuCS68k);
b837b69b 134#endif
cc68a136 135#ifdef EMU_M68K
136 {
137 void *oldcontext = m68ki_cpu_p;
138
3aa1e148 139 m68k_set_context(&PicoCpuMS68k);
2d0b15bb 140 m68ki_cpu.sp[0]=0;
141 m68k_set_irq(0);
cc68a136 142 m68k_pulse_reset();
143 m68k_set_context(oldcontext);
144 }
145#endif
3aa1e148 146#ifdef EMU_F68K
147 {
148 void *oldcontext = g_m68kcontext;
149 g_m68kcontext = &PicoCpuFS68k;
03e4f2a3 150 fm68k_reset();
3aa1e148 151 g_m68kcontext = oldcontext;
152 }
153#endif
cc68a136 154
155 return 0;
156}
157
eff55556 158PICO_INTERNAL int SekInterruptS68k(int irq)
cc68a136 159{
51a902ae 160 int irqs, real_irq = 1;
161 Pico_mcd->m.s68k_pend_ints |= 1 << irq;
162 irqs = Pico_mcd->m.s68k_pend_ints >> 1;
3aa1e148 163 while ((irqs >>= 1)) real_irq++;
51a902ae 164
b5e5172d 165#ifdef EMU_CORE_DEBUG
166 {
167 extern int dbg_irq_level_sub;
168 dbg_irq_level_sub=real_irq;
b5e5172d 169 return 0;
170 }
171#endif
b837b69b 172#ifdef EMU_C68K
3aa1e148 173 PicoCpuCS68k.irq=real_irq;
b837b69b 174#endif
cc68a136 175#ifdef EMU_M68K
176 void *oldcontext = m68ki_cpu_p;
3aa1e148 177 m68k_set_context(&PicoCpuMS68k);
178 m68k_set_irq(real_irq);
cc68a136 179 m68k_set_context(oldcontext);
3aa1e148 180#endif
181#ifdef EMU_F68K
182 PicoCpuFS68k.interrupts[0]=real_irq;
cc68a136 183#endif
184 return 0;
185}
186