pandora: fix readme and pxml version
[picodrive.git] / pico / cd / sek.c
CommitLineData
cff531af 1/*
2 * PicoDrive
3 * (C) notaz, 2007
4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
cc68a136 8
efcba75f 9#include "../pico_int.h"
cc68a136 10
11
ae214f1c 12unsigned int SekCycleCntS68k;
13unsigned int SekCycleAimS68k;
cc68a136 14
3aa1e148 15
16/* context */
17// Cyclone 68000
b837b69b 18#ifdef EMU_C68K
3aa1e148 19struct Cyclone PicoCpuCS68k;
b837b69b 20#endif
3aa1e148 21// MUSASHI 68000
cc68a136 22#ifdef EMU_M68K
3aa1e148 23m68ki_cpu_core PicoCpuMS68k;
24#endif
25// FAME 68000
26#ifdef EMU_F68K
27M68K_CONTEXT PicoCpuFS68k;
cc68a136 28#endif
29
3aa1e148 30
51a902ae 31static int new_irq_level(int level)
32{
33 int level_new = 0, irqs;
34 Pico_mcd->m.s68k_pend_ints &= ~(1 << level);
178a9b68 35 if (level == 2) // clear pending bit
36 Pico_mcd->m.state_flags &= ~PCD_ST_S68K_IFL2;
51a902ae 37 irqs = Pico_mcd->m.s68k_pend_ints;
38 irqs &= Pico_mcd->s68k_regs[0x33];
39 while ((irqs >>= 1)) level_new++;
b837b69b 40
51a902ae 41 return level_new;
42}
cc68a136 43
b837b69b 44#ifdef EMU_C68K
0af33fe0 45// interrupt acknowledgement
46static int SekIntAckS68k(int level)
b837b69b 47{
51a902ae 48 int level_new = new_irq_level(level);
b837b69b 49
ca61ee42 50 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
3aa1e148 51 PicoCpuCS68k.irq = level_new;
0af33fe0 52 return CYCLONE_INT_ACK_AUTOVECTOR;
b837b69b 53}
54
eff55556 55static void SekResetAckS68k(void)
b837b69b 56{
ca61ee42 57 elprintf(EL_ANOMALY, "s68k: Reset encountered @ %06x", SekPcS68k);
b837b69b 58}
59
eff55556 60static int SekUnrecognizedOpcodeS68k(void)
b837b69b 61{
a736af3e 62 elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", SekPcS68k);
b837b69b 63 //exit(1);
64 return 0;
65}
66#endif
67
3aa1e148 68#ifdef EMU_M68K
69static int SekIntAckMS68k(int level)
70{
b5e5172d 71#ifndef EMU_CORE_DEBUG
3aa1e148 72 int level_new = new_irq_level(level);
ca61ee42 73 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
3aa1e148 74 CPU_INT_LEVEL = level_new << 8;
b5e5172d 75#else
76 CPU_INT_LEVEL = 0;
77#endif
3aa1e148 78 return M68K_INT_ACK_AUTOVECTOR;
79}
80#endif
81
82#ifdef EMU_F68K
83static void SekIntAckFS68k(unsigned level)
84{
85 int level_new = new_irq_level(level);
ca61ee42 86 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
b5e5172d 87#ifndef EMU_CORE_DEBUG
3aa1e148 88 PicoCpuFS68k.interrupts[0] = level_new;
b5e5172d 89#else
90 {
91 extern int dbg_irq_level_sub;
92 dbg_irq_level_sub = level_new;
93 PicoCpuFS68k.interrupts[0] = 0;
94 }
95#endif
3aa1e148 96}
97#endif
b837b69b 98
cc68a136 99
2aa27095 100PICO_INTERNAL void SekInitS68k(void)
cc68a136 101{
b837b69b 102#ifdef EMU_C68K
103// CycloneInit();
3aa1e148 104 memset(&PicoCpuCS68k,0,sizeof(PicoCpuCS68k));
105 PicoCpuCS68k.IrqCallback=SekIntAckS68k;
106 PicoCpuCS68k.ResetCallback=SekResetAckS68k;
107 PicoCpuCS68k.UnrecognizedCallback=SekUnrecognizedOpcodeS68k;
b837b69b 108#endif
cc68a136 109#ifdef EMU_M68K
110 {
111 // Musashi is not very context friendly..
112 void *oldcontext = m68ki_cpu_p;
3aa1e148 113 m68k_set_context(&PicoCpuMS68k);
cc68a136 114 m68k_set_cpu_type(M68K_CPU_TYPE_68000);
115 m68k_init();
3aa1e148 116 m68k_set_int_ack_callback(SekIntAckMS68k);
cc68a136 117// m68k_pulse_reset(); // not yet, memmap is not set up
118 m68k_set_context(oldcontext);
119 }
120#endif
3aa1e148 121#ifdef EMU_F68K
7669591e 122 memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k));
123 fm68k_init();
124 PicoCpuFS68k.iack_handler = SekIntAckFS68k;
125 PicoCpuFS68k.sr = 0x2704; // Z flag
3aa1e148 126#endif
cc68a136 127}
128
129// Reset the 68000:
2aa27095 130PICO_INTERNAL int SekResetS68k(void)
cc68a136 131{
b837b69b 132#ifdef EMU_C68K
5e89f0f5 133 CycloneReset(&PicoCpuCS68k);
b837b69b 134#endif
cc68a136 135#ifdef EMU_M68K
136 {
137 void *oldcontext = m68ki_cpu_p;
138
3aa1e148 139 m68k_set_context(&PicoCpuMS68k);
2d0b15bb 140 m68ki_cpu.sp[0]=0;
141 m68k_set_irq(0);
cc68a136 142 m68k_pulse_reset();
143 m68k_set_context(oldcontext);
144 }
145#endif
3aa1e148 146#ifdef EMU_F68K
7669591e 147 fm68k_reset(&PicoCpuFS68k);
3aa1e148 148#endif
cc68a136 149
150 return 0;
151}
152
eff55556 153PICO_INTERNAL int SekInterruptS68k(int irq)
cc68a136 154{
51a902ae 155 int irqs, real_irq = 1;
156 Pico_mcd->m.s68k_pend_ints |= 1 << irq;
157 irqs = Pico_mcd->m.s68k_pend_ints >> 1;
3aa1e148 158 while ((irqs >>= 1)) real_irq++;
51a902ae 159
b5e5172d 160#ifdef EMU_CORE_DEBUG
161 {
162 extern int dbg_irq_level_sub;
163 dbg_irq_level_sub=real_irq;
b5e5172d 164 return 0;
165 }
166#endif
b837b69b 167#ifdef EMU_C68K
3aa1e148 168 PicoCpuCS68k.irq=real_irq;
b837b69b 169#endif
cc68a136 170#ifdef EMU_M68K
22814963 171 // avoid m68k_set_irq() for delaying to work
172 PicoCpuMS68k.int_level = real_irq << 8;
3aa1e148 173#endif
174#ifdef EMU_F68K
175 PicoCpuFS68k.interrupts[0]=real_irq;
cc68a136 176#endif
177 return 0;
178}
179
3f23709e 180void SekInterruptClearS68k(int irq)
181{
182 int level_new = new_irq_level(irq);
183
184#ifdef EMU_C68K
185 PicoCpuCS68k.irq = level_new;
186#endif
187#ifdef EMU_M68K
188 CPU_INT_LEVEL = level_new << 8;
189#endif
190#ifdef EMU_F68K
191 PicoCpuFS68k.interrupts[0] = level_new;
192#endif
193}