add a thp-based huge page alloc fallback
[pcsx_rearmed.git] / plugins / dfsound / reverb.c
CommitLineData
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1/***************************************************************************\r
2 reverb.c - description\r
3 -------------------\r
4 begin : Wed May 15 2002\r
5 copyright : (C) 2002 by Pete Bernert\r
6 email : BlackDove@addcom.de\r
1775933a 7\r
8 Portions (C) GraÅžvydas "notaz" Ignotas, 2010-2011\r
9 Portions (C) SPU2-X, gigaherz, Pcsx2 Development Team\r
10\r
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11 ***************************************************************************/\r
12/***************************************************************************\r
13 * *\r
14 * This program is free software; you can redistribute it and/or modify *\r
15 * it under the terms of the GNU General Public License as published by *\r
16 * the Free Software Foundation; either version 2 of the License, or *\r
17 * (at your option) any later version. See also the license.txt file for *\r
18 * additional informations. *\r
19 * *\r
20 ***************************************************************************/\r
21\r
22#include "stdafx.h"\r
b71a957f 23#include "spu.h"\r
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24\r
25#define _IN_REVERB\r
26\r
27// will be included from spu.c\r
28#ifdef _IN_SPU\r
29\r
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30////////////////////////////////////////////////////////////////////////\r
31// START REVERB\r
32////////////////////////////////////////////////////////////////////////\r
33\r
34INLINE void StartREVERB(int ch)\r
35{\r
5514a050 36 if(spu.s_chan[ch].bReverb && (spu.spuCtrl&0x80)) // reverb possible?\r
ef79bbde 37 {\r
5514a050 38 spu.s_chan[ch].bRVBActive=!!spu_config.iUseReverb;\r
ef79bbde 39 }\r
5514a050 40 else spu.s_chan[ch].bRVBActive=0; // else -> no reverb\r
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41}\r
42\r
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43////////////////////////////////////////////////////////////////////////\r
44\r
1775933a 45INLINE int rvb2ram_offs(int curr, int space, int iOff)\r
ef79bbde 46{\r
1775933a 47 iOff += curr;\r
48 if (iOff >= 0x40000) iOff -= space;\r
49 return iOff;\r
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50}\r
51\r
1775933a 52// get_buffer content helper: takes care about wraps\r
53#define g_buffer(var) \\r
b71a957f 54 ((int)(signed short)LE16TOH(spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var)]))\r
ef79bbde 55\r
1775933a 56// saturate iVal and store it as var\r
57#define s_buffer(var, iVal) \\r
58 ssat32_to_16(iVal); \\r
b71a957f 59 spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var)] = HTOLE16(iVal)\r
ef79bbde 60\r
1775933a 61#define s_buffer1(var, iVal) \\r
62 ssat32_to_16(iVal); \\r
b71a957f 63 spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var + 1)] = HTOLE16(iVal)\r
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64\r
65////////////////////////////////////////////////////////////////////////\r
66\r
1775933a 67// portions based on spu2-x from PCSX2\r
05c7cec7 68static void MixREVERB(int *SSumLR, int *RVB, int ns_to, int curr_addr)\r
ef79bbde 69{\r
05c7cec7 70 const REVERBInfo *rvb = spu.rvb;\r
71 int IIR_ALPHA = rvb->IIR_ALPHA;\r
72 int IIR_COEF = rvb->IIR_COEF;\r
73 int space = 0x40000 - rvb->StartAddr;\r
74 int l, r, ns;\r
1775933a 75\r
650adfd2 76 for (ns = 0; ns < ns_to * 2; )\r
ef79bbde 77 {\r
1775933a 78 int ACC0, ACC1, FB_A0, FB_A1, FB_B0, FB_B1;\r
79 int mix_dest_a0, mix_dest_a1, mix_dest_b0, mix_dest_b1;\r
80\r
05c7cec7 81 int input_L = RVB[ns] * rvb->IN_COEF_L;\r
82 int input_R = RVB[ns+1] * rvb->IN_COEF_R;\r
1775933a 83\r
05c7cec7 84 int IIR_INPUT_A0 = ((g_buffer(IIR_SRC_A0) * IIR_COEF) + input_L) >> 15;\r
85 int IIR_INPUT_A1 = ((g_buffer(IIR_SRC_A1) * IIR_COEF) + input_R) >> 15;\r
86 int IIR_INPUT_B0 = ((g_buffer(IIR_SRC_B0) * IIR_COEF) + input_L) >> 15;\r
87 int IIR_INPUT_B1 = ((g_buffer(IIR_SRC_B1) * IIR_COEF) + input_R) >> 15;\r
1775933a 88\r
89 int iir_dest_a0 = g_buffer(IIR_DEST_A0);\r
90 int iir_dest_a1 = g_buffer(IIR_DEST_A1);\r
91 int iir_dest_b0 = g_buffer(IIR_DEST_B0);\r
92 int iir_dest_b1 = g_buffer(IIR_DEST_B1);\r
93\r
94 int IIR_A0 = iir_dest_a0 + ((IIR_INPUT_A0 - iir_dest_a0) * IIR_ALPHA >> 15);\r
95 int IIR_A1 = iir_dest_a1 + ((IIR_INPUT_A1 - iir_dest_a1) * IIR_ALPHA >> 15);\r
96 int IIR_B0 = iir_dest_b0 + ((IIR_INPUT_B0 - iir_dest_b0) * IIR_ALPHA >> 15);\r
97 int IIR_B1 = iir_dest_b1 + ((IIR_INPUT_B1 - iir_dest_b1) * IIR_ALPHA >> 15);\r
98\r
05c7cec7 99 preload(SSumLR + ns + 64*2/4 - 4);\r
100\r
1775933a 101 s_buffer1(IIR_DEST_A0, IIR_A0);\r
102 s_buffer1(IIR_DEST_A1, IIR_A1);\r
103 s_buffer1(IIR_DEST_B0, IIR_B0);\r
104 s_buffer1(IIR_DEST_B1, IIR_B1);\r
105\r
05c7cec7 106 preload(RVB + ns + 64*2/4 - 4);\r
107\r
108 ACC0 = (g_buffer(ACC_SRC_A0) * rvb->ACC_COEF_A +\r
109 g_buffer(ACC_SRC_B0) * rvb->ACC_COEF_B +\r
110 g_buffer(ACC_SRC_C0) * rvb->ACC_COEF_C +\r
111 g_buffer(ACC_SRC_D0) * rvb->ACC_COEF_D) >> 15;\r
112 ACC1 = (g_buffer(ACC_SRC_A1) * rvb->ACC_COEF_A +\r
113 g_buffer(ACC_SRC_B1) * rvb->ACC_COEF_B +\r
114 g_buffer(ACC_SRC_C1) * rvb->ACC_COEF_C +\r
115 g_buffer(ACC_SRC_D1) * rvb->ACC_COEF_D) >> 15;\r
1775933a 116\r
117 FB_A0 = g_buffer(FB_SRC_A0);\r
118 FB_A1 = g_buffer(FB_SRC_A1);\r
119 FB_B0 = g_buffer(FB_SRC_B0);\r
120 FB_B1 = g_buffer(FB_SRC_B1);\r
121\r
05c7cec7 122 mix_dest_a0 = ACC0 - ((FB_A0 * rvb->FB_ALPHA) >> 15);\r
123 mix_dest_a1 = ACC1 - ((FB_A1 * rvb->FB_ALPHA) >> 15);\r
1775933a 124\r
05c7cec7 125 mix_dest_b0 = FB_A0 + (((ACC0 - FB_A0) * rvb->FB_ALPHA - FB_B0 * rvb->FB_X) >> 15);\r
126 mix_dest_b1 = FB_A1 + (((ACC1 - FB_A1) * rvb->FB_ALPHA - FB_B1 * rvb->FB_X) >> 15);\r
1775933a 127\r
128 s_buffer(MIX_DEST_A0, mix_dest_a0);\r
129 s_buffer(MIX_DEST_A1, mix_dest_a1);\r
130 s_buffer(MIX_DEST_B0, mix_dest_b0);\r
131 s_buffer(MIX_DEST_B1, mix_dest_b1);\r
132\r
b72f17a1 133 l = (mix_dest_a0 + mix_dest_b0) / 2;\r
134 r = (mix_dest_a1 + mix_dest_b1) / 2;\r
1775933a 135\r
05c7cec7 136 l = (l * rvb->VolLeft) >> 15; // 15?\r
137 r = (r * rvb->VolRight) >> 15;\r
b72f17a1 138\r
b72f17a1 139 SSumLR[ns++] += l;\r
140 SSumLR[ns++] += r;\r
05c7cec7 141 SSumLR[ns++] += l;\r
142 SSumLR[ns++] += r;\r
b72f17a1 143\r
144 curr_addr++;\r
05c7cec7 145 if (curr_addr >= 0x40000) curr_addr = rvb->StartAddr;\r
b72f17a1 146 }\r
b72f17a1 147}\r
148\r
05c7cec7 149static void MixREVERB_off(int *SSumLR, int ns_to, int curr_addr)\r
b72f17a1 150{\r
05c7cec7 151 const REVERBInfo *rvb = spu.rvb;\r
152 int space = 0x40000 - rvb->StartAddr;\r
153 int l, r, ns;\r
b72f17a1 154\r
650adfd2 155 for (ns = 0; ns < ns_to * 2; )\r
b72f17a1 156 {\r
05c7cec7 157 preload(SSumLR + ns + 64*2/4 - 4);\r
158\r
b72f17a1 159 l = (g_buffer(MIX_DEST_A0) + g_buffer(MIX_DEST_B0)) / 2;\r
160 r = (g_buffer(MIX_DEST_A1) + g_buffer(MIX_DEST_B1)) / 2;\r
161\r
05c7cec7 162 l = (l * rvb->VolLeft) >> 15;\r
163 r = (r * rvb->VolRight) >> 15;\r
1775933a 164\r
1775933a 165 SSumLR[ns++] += l;\r
166 SSumLR[ns++] += r;\r
05c7cec7 167 SSumLR[ns++] += l;\r
168 SSumLR[ns++] += r;\r
1775933a 169\r
170 curr_addr++;\r
05c7cec7 171 if (curr_addr >= 0x40000) curr_addr = rvb->StartAddr;\r
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172 }\r
173}\r
174\r
05c7cec7 175static void REVERBPrep(void)\r
1775933a 176{\r
05c7cec7 177 REVERBInfo *rvb = spu.rvb;\r
7b2c4897 178 int space, t;\r
179\r
180 t = spu.regArea[(H_SPUReverbAddr - 0xc00) >> 1];\r
181 if (t == 0xFFFF || t <= 0x200)\r
182 spu.rvb->StartAddr = spu.rvb->CurrAddr = 0;\r
183 else if (spu.rvb->StartAddr != (t << 2))\r
184 spu.rvb->StartAddr = spu.rvb->CurrAddr = t << 2;\r
185\r
186 space = 0x40000 - rvb->StartAddr;\r
187\r
188 #define prep_offs(v, r) \\r
189 t = spu.regArea[(0x1c0 + r) >> 1] * 4; \\r
1775933a 190 while (t >= space) \\r
191 t -= space; \\r
7b2c4897 192 rvb->v = t\r
193 #define prep_offs2(d, r1, r2) \\r
194 t = spu.regArea[(0x1c0 + r1) >> 1] * 4; \\r
195 t -= spu.regArea[(0x1c0 + r2) >> 1] * 4; \\r
196 while (t < 0) \\r
197 t += space; \\r
1775933a 198 while (t >= space) \\r
199 t -= space; \\r
7b2c4897 200 rvb->d = t\r
201\r
202 prep_offs(IIR_SRC_A0, 32);\r
203 prep_offs(IIR_SRC_A1, 34);\r
204 prep_offs(IIR_SRC_B0, 36);\r
205 prep_offs(IIR_SRC_B1, 38);\r
206 prep_offs(IIR_DEST_A0, 20);\r
207 prep_offs(IIR_DEST_A1, 22);\r
208 prep_offs(IIR_DEST_B0, 36);\r
209 prep_offs(IIR_DEST_B1, 38);\r
210 prep_offs(ACC_SRC_A0, 24);\r
211 prep_offs(ACC_SRC_A1, 26);\r
212 prep_offs(ACC_SRC_B0, 28);\r
213 prep_offs(ACC_SRC_B1, 30);\r
214 prep_offs(ACC_SRC_C0, 40);\r
215 prep_offs(ACC_SRC_C1, 42);\r
216 prep_offs(ACC_SRC_D0, 44);\r
217 prep_offs(ACC_SRC_D1, 46);\r
218 prep_offs(MIX_DEST_A0, 52);\r
219 prep_offs(MIX_DEST_A1, 54);\r
220 prep_offs(MIX_DEST_B0, 56);\r
221 prep_offs(MIX_DEST_B1, 58);\r
222 prep_offs2(FB_SRC_A0, 52, 0);\r
223 prep_offs2(FB_SRC_A1, 54, 0);\r
224 prep_offs2(FB_SRC_B0, 56, 2);\r
225 prep_offs2(FB_SRC_B1, 58, 2);\r
1775933a 226\r
227#undef prep_offs\r
228#undef prep_offs2\r
05c7cec7 229 rvb->dirty = 0;\r
1775933a 230}\r
ef79bbde 231\r
05c7cec7 232INLINE void REVERBDo(int *SSumLR, int *RVB, int ns_to, int curr_addr)\r
ef79bbde 233{\r
3154bfab 234 if (spu.spuCtrl & 0x80) // -> reverb on? oki\r
1775933a 235 {\r
05c7cec7 236 MixREVERB(SSumLR, RVB, ns_to, curr_addr);\r
b72f17a1 237 }\r
05c7cec7 238 else if (spu.rvb->VolLeft || spu.rvb->VolRight)\r
1775933a 239 {\r
05c7cec7 240 MixREVERB_off(SSumLR, ns_to, curr_addr);\r
1775933a 241 }\r
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242}\r
243\r
244////////////////////////////////////////////////////////////////////////\r
245\r
246#endif\r
247\r
248/*\r
249-----------------------------------------------------------------------------\r
250PSX reverb hardware notes\r
251by Neill Corlett\r
252-----------------------------------------------------------------------------\r
253\r
254Yadda yadda disclaimer yadda probably not perfect yadda well it's okay anyway\r
255yadda yadda.\r
256\r
257-----------------------------------------------------------------------------\r
258\r
259Basics\r
260------\r
261\r
262- The reverb buffer is 22khz 16-bit mono PCM.\r
263- It starts at the reverb address given by 1DA2, extends to\r
264 the end of sound RAM, and wraps back to the 1DA2 address.\r
265\r
266Setting the address at 1DA2 resets the current reverb work address.\r
267\r
268This work address ALWAYS increments every 1/22050 sec., regardless of\r
269whether reverb is enabled (bit 7 of 1DAA set).\r
270\r
271And the contents of the reverb buffer ALWAYS play, scaled by the\r
272"reverberation depth left/right" volumes (1D84/1D86).\r
273(which, by the way, appear to be scaled so 3FFF=approx. 1.0, 4000=-1.0)\r
274\r
275-----------------------------------------------------------------------------\r
276\r
277Register names\r
278--------------\r
279\r
280These are probably not their real names.\r
281These are probably not even correct names.\r
282We will use them anyway, because we can.\r
283\r
2841DC0: FB_SRC_A (offset)\r
2851DC2: FB_SRC_B (offset)\r
2861DC4: IIR_ALPHA (coef.)\r
2871DC6: ACC_COEF_A (coef.)\r
2881DC8: ACC_COEF_B (coef.)\r
2891DCA: ACC_COEF_C (coef.)\r
2901DCC: ACC_COEF_D (coef.)\r
2911DCE: IIR_COEF (coef.)\r
2921DD0: FB_ALPHA (coef.)\r
2931DD2: FB_X (coef.)\r
2941DD4: IIR_DEST_A0 (offset)\r
2951DD6: IIR_DEST_A1 (offset)\r
2961DD8: ACC_SRC_A0 (offset)\r
2971DDA: ACC_SRC_A1 (offset)\r
2981DDC: ACC_SRC_B0 (offset)\r
2991DDE: ACC_SRC_B1 (offset)\r
3001DE0: IIR_SRC_A0 (offset)\r
3011DE2: IIR_SRC_A1 (offset)\r
3021DE4: IIR_DEST_B0 (offset)\r
3031DE6: IIR_DEST_B1 (offset)\r
3041DE8: ACC_SRC_C0 (offset)\r
3051DEA: ACC_SRC_C1 (offset)\r
3061DEC: ACC_SRC_D0 (offset)\r
3071DEE: ACC_SRC_D1 (offset)\r
3081DF0: IIR_SRC_B1 (offset)\r
3091DF2: IIR_SRC_B0 (offset)\r
3101DF4: MIX_DEST_A0 (offset)\r
3111DF6: MIX_DEST_A1 (offset)\r
3121DF8: MIX_DEST_B0 (offset)\r
3131DFA: MIX_DEST_B1 (offset)\r
3141DFC: IN_COEF_L (coef.)\r
3151DFE: IN_COEF_R (coef.)\r
316\r
317The coefficients are signed fractional values.\r
318-32768 would be -1.0\r
319 32768 would be 1.0 (if it were possible... the highest is of course 32767)\r
320\r
321The offsets are (byte/8) offsets into the reverb buffer.\r
322i.e. you multiply them by 8, you get byte offsets.\r
323You can also think of them as (samples/4) offsets.\r
324They appear to be signed. They can be negative.\r
325None of the documented presets make them negative, though.\r
326\r
327Yes, 1DF0 and 1DF2 appear to be backwards. Not a typo.\r
328\r
329-----------------------------------------------------------------------------\r
330\r
331What it does\r
332------------\r
333\r
334We take all reverb sources:\r
335- regular channels that have the reverb bit on\r
336- cd and external sources, if their reverb bits are on\r
337and mix them into one stereo 44100hz signal.\r
338\r
339Lowpass/downsample that to 22050hz. The PSX uses a proper bandlimiting\r
340algorithm here, but I haven't figured out the hysterically exact specifics.\r
341I use an 8-tap filter with these coefficients, which are nice but probably\r
342not the real ones:\r
343\r
3440.037828187894\r
3450.157538631280\r
3460.321159685278\r
3470.449322115345\r
3480.449322115345\r
3490.321159685278\r
3500.157538631280\r
3510.037828187894\r
352\r
353So we have two input samples (INPUT_SAMPLE_L, INPUT_SAMPLE_R) every 22050hz.\r
354\r
355* IN MY EMULATION, I divide these by 2 to make it clip less.\r
356 (and of course the L/R output coefficients are adjusted to compensate)\r
357 The real thing appears to not do this.\r
358\r
359At every 22050hz tick:\r
360- If the reverb bit is enabled (bit 7 of 1DAA), execute the reverb\r
361 steady-state algorithm described below\r
362- AFTERWARDS, retrieve the "wet out" L and R samples from the reverb buffer\r
363 (This part may not be exactly right and I guessed at the coefs. TODO: check later.)\r
364 L is: 0.333 * (buffer[MIX_DEST_A0] + buffer[MIX_DEST_B0])\r
365 R is: 0.333 * (buffer[MIX_DEST_A1] + buffer[MIX_DEST_B1])\r
366- Advance the current buffer position by 1 sample\r
367\r
368The wet out L and R are then upsampled to 44100hz and played at the\r
369"reverberation depth left/right" (1D84/1D86) volume, independent of the main\r
370volume.\r
371\r
372-----------------------------------------------------------------------------\r
373\r
374Reverb steady-state\r
375-------------------\r
376\r
377The reverb steady-state algorithm is fairly clever, and of course by\r
378"clever" I mean "batshit insane".\r
379\r
380buffer[x] is relative to the current buffer position, not the beginning of\r
381the buffer. Note that all buffer offsets must wrap around so they're\r
382contained within the reverb work area.\r
383\r
384Clipping is performed at the end... maybe also sooner, but definitely at\r
385the end.\r
386\r
387IIR_INPUT_A0 = buffer[IIR_SRC_A0] * IIR_COEF + INPUT_SAMPLE_L * IN_COEF_L;\r
388IIR_INPUT_A1 = buffer[IIR_SRC_A1] * IIR_COEF + INPUT_SAMPLE_R * IN_COEF_R;\r
389IIR_INPUT_B0 = buffer[IIR_SRC_B0] * IIR_COEF + INPUT_SAMPLE_L * IN_COEF_L;\r
390IIR_INPUT_B1 = buffer[IIR_SRC_B1] * IIR_COEF + INPUT_SAMPLE_R * IN_COEF_R;\r
391\r
392IIR_A0 = IIR_INPUT_A0 * IIR_ALPHA + buffer[IIR_DEST_A0] * (1.0 - IIR_ALPHA);\r
393IIR_A1 = IIR_INPUT_A1 * IIR_ALPHA + buffer[IIR_DEST_A1] * (1.0 - IIR_ALPHA);\r
394IIR_B0 = IIR_INPUT_B0 * IIR_ALPHA + buffer[IIR_DEST_B0] * (1.0 - IIR_ALPHA);\r
395IIR_B1 = IIR_INPUT_B1 * IIR_ALPHA + buffer[IIR_DEST_B1] * (1.0 - IIR_ALPHA);\r
396\r
397buffer[IIR_DEST_A0 + 1sample] = IIR_A0;\r
398buffer[IIR_DEST_A1 + 1sample] = IIR_A1;\r
399buffer[IIR_DEST_B0 + 1sample] = IIR_B0;\r
400buffer[IIR_DEST_B1 + 1sample] = IIR_B1;\r
401\r
402ACC0 = buffer[ACC_SRC_A0] * ACC_COEF_A +\r
403 buffer[ACC_SRC_B0] * ACC_COEF_B +\r
404 buffer[ACC_SRC_C0] * ACC_COEF_C +\r
405 buffer[ACC_SRC_D0] * ACC_COEF_D;\r
406ACC1 = buffer[ACC_SRC_A1] * ACC_COEF_A +\r
407 buffer[ACC_SRC_B1] * ACC_COEF_B +\r
408 buffer[ACC_SRC_C1] * ACC_COEF_C +\r
409 buffer[ACC_SRC_D1] * ACC_COEF_D;\r
410\r
411FB_A0 = buffer[MIX_DEST_A0 - FB_SRC_A];\r
412FB_A1 = buffer[MIX_DEST_A1 - FB_SRC_A];\r
413FB_B0 = buffer[MIX_DEST_B0 - FB_SRC_B];\r
414FB_B1 = buffer[MIX_DEST_B1 - FB_SRC_B];\r
415\r
416buffer[MIX_DEST_A0] = ACC0 - FB_A0 * FB_ALPHA;\r
417buffer[MIX_DEST_A1] = ACC1 - FB_A1 * FB_ALPHA;\r
418buffer[MIX_DEST_B0] = (FB_ALPHA * ACC0) - FB_A0 * (FB_ALPHA^0x8000) - FB_B0 * FB_X;\r
419buffer[MIX_DEST_B1] = (FB_ALPHA * ACC1) - FB_A1 * (FB_ALPHA^0x8000) - FB_B1 * FB_X;\r
420\r
421-----------------------------------------------------------------------------\r
422*/\r
423\r
1775933a 424// vim:shiftwidth=1:expandtab\r