libretro: Fix key passing of update_controller_port_device()
[pcsx_rearmed.git] / plugins / dfsound / reverb.c
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1/***************************************************************************\r
2 reverb.c - description\r
3 -------------------\r
4 begin : Wed May 15 2002\r
5 copyright : (C) 2002 by Pete Bernert\r
6 email : BlackDove@addcom.de\r
1775933a 7\r
8 Portions (C) GraÅžvydas "notaz" Ignotas, 2010-2011\r
9 Portions (C) SPU2-X, gigaherz, Pcsx2 Development Team\r
10\r
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11 ***************************************************************************/\r
12/***************************************************************************\r
13 * *\r
14 * This program is free software; you can redistribute it and/or modify *\r
15 * it under the terms of the GNU General Public License as published by *\r
16 * the Free Software Foundation; either version 2 of the License, or *\r
17 * (at your option) any later version. See also the license.txt file for *\r
18 * additional informations. *\r
19 * *\r
20 ***************************************************************************/\r
21\r
22#include "stdafx.h"\r
23\r
24#define _IN_REVERB\r
25\r
26// will be included from spu.c\r
27#ifdef _IN_SPU\r
28\r
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29////////////////////////////////////////////////////////////////////////\r
30// START REVERB\r
31////////////////////////////////////////////////////////////////////////\r
32\r
33INLINE void StartREVERB(int ch)\r
34{\r
5514a050 35 if(spu.s_chan[ch].bReverb && (spu.spuCtrl&0x80)) // reverb possible?\r
ef79bbde 36 {\r
5514a050 37 spu.s_chan[ch].bRVBActive=!!spu_config.iUseReverb;\r
ef79bbde 38 }\r
5514a050 39 else spu.s_chan[ch].bRVBActive=0; // else -> no reverb\r
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40}\r
41\r
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42////////////////////////////////////////////////////////////////////////\r
43\r
1775933a 44INLINE int rvb2ram_offs(int curr, int space, int iOff)\r
ef79bbde 45{\r
1775933a 46 iOff += curr;\r
47 if (iOff >= 0x40000) iOff -= space;\r
48 return iOff;\r
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49}\r
50\r
1775933a 51// get_buffer content helper: takes care about wraps\r
52#define g_buffer(var) \\r
7b2c4897 53 ((int)(signed short)spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var)])\r
ef79bbde 54\r
1775933a 55// saturate iVal and store it as var\r
56#define s_buffer(var, iVal) \\r
57 ssat32_to_16(iVal); \\r
7b2c4897 58 spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var)] = iVal\r
ef79bbde 59\r
1775933a 60#define s_buffer1(var, iVal) \\r
61 ssat32_to_16(iVal); \\r
7b2c4897 62 spu.spuMem[rvb2ram_offs(curr_addr, space, rvb->var + 1)] = iVal\r
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63\r
64////////////////////////////////////////////////////////////////////////\r
65\r
1775933a 66// portions based on spu2-x from PCSX2\r
05c7cec7 67static void MixREVERB(int *SSumLR, int *RVB, int ns_to, int curr_addr)\r
ef79bbde 68{\r
05c7cec7 69 const REVERBInfo *rvb = spu.rvb;\r
70 int IIR_ALPHA = rvb->IIR_ALPHA;\r
71 int IIR_COEF = rvb->IIR_COEF;\r
72 int space = 0x40000 - rvb->StartAddr;\r
73 int l, r, ns;\r
1775933a 74\r
650adfd2 75 for (ns = 0; ns < ns_to * 2; )\r
ef79bbde 76 {\r
1775933a 77 int ACC0, ACC1, FB_A0, FB_A1, FB_B0, FB_B1;\r
78 int mix_dest_a0, mix_dest_a1, mix_dest_b0, mix_dest_b1;\r
79\r
05c7cec7 80 int input_L = RVB[ns] * rvb->IN_COEF_L;\r
81 int input_R = RVB[ns+1] * rvb->IN_COEF_R;\r
1775933a 82\r
05c7cec7 83 int IIR_INPUT_A0 = ((g_buffer(IIR_SRC_A0) * IIR_COEF) + input_L) >> 15;\r
84 int IIR_INPUT_A1 = ((g_buffer(IIR_SRC_A1) * IIR_COEF) + input_R) >> 15;\r
85 int IIR_INPUT_B0 = ((g_buffer(IIR_SRC_B0) * IIR_COEF) + input_L) >> 15;\r
86 int IIR_INPUT_B1 = ((g_buffer(IIR_SRC_B1) * IIR_COEF) + input_R) >> 15;\r
1775933a 87\r
88 int iir_dest_a0 = g_buffer(IIR_DEST_A0);\r
89 int iir_dest_a1 = g_buffer(IIR_DEST_A1);\r
90 int iir_dest_b0 = g_buffer(IIR_DEST_B0);\r
91 int iir_dest_b1 = g_buffer(IIR_DEST_B1);\r
92\r
93 int IIR_A0 = iir_dest_a0 + ((IIR_INPUT_A0 - iir_dest_a0) * IIR_ALPHA >> 15);\r
94 int IIR_A1 = iir_dest_a1 + ((IIR_INPUT_A1 - iir_dest_a1) * IIR_ALPHA >> 15);\r
95 int IIR_B0 = iir_dest_b0 + ((IIR_INPUT_B0 - iir_dest_b0) * IIR_ALPHA >> 15);\r
96 int IIR_B1 = iir_dest_b1 + ((IIR_INPUT_B1 - iir_dest_b1) * IIR_ALPHA >> 15);\r
97\r
05c7cec7 98 preload(SSumLR + ns + 64*2/4 - 4);\r
99\r
1775933a 100 s_buffer1(IIR_DEST_A0, IIR_A0);\r
101 s_buffer1(IIR_DEST_A1, IIR_A1);\r
102 s_buffer1(IIR_DEST_B0, IIR_B0);\r
103 s_buffer1(IIR_DEST_B1, IIR_B1);\r
104\r
05c7cec7 105 preload(RVB + ns + 64*2/4 - 4);\r
106\r
107 ACC0 = (g_buffer(ACC_SRC_A0) * rvb->ACC_COEF_A +\r
108 g_buffer(ACC_SRC_B0) * rvb->ACC_COEF_B +\r
109 g_buffer(ACC_SRC_C0) * rvb->ACC_COEF_C +\r
110 g_buffer(ACC_SRC_D0) * rvb->ACC_COEF_D) >> 15;\r
111 ACC1 = (g_buffer(ACC_SRC_A1) * rvb->ACC_COEF_A +\r
112 g_buffer(ACC_SRC_B1) * rvb->ACC_COEF_B +\r
113 g_buffer(ACC_SRC_C1) * rvb->ACC_COEF_C +\r
114 g_buffer(ACC_SRC_D1) * rvb->ACC_COEF_D) >> 15;\r
1775933a 115\r
116 FB_A0 = g_buffer(FB_SRC_A0);\r
117 FB_A1 = g_buffer(FB_SRC_A1);\r
118 FB_B0 = g_buffer(FB_SRC_B0);\r
119 FB_B1 = g_buffer(FB_SRC_B1);\r
120\r
05c7cec7 121 mix_dest_a0 = ACC0 - ((FB_A0 * rvb->FB_ALPHA) >> 15);\r
122 mix_dest_a1 = ACC1 - ((FB_A1 * rvb->FB_ALPHA) >> 15);\r
1775933a 123\r
05c7cec7 124 mix_dest_b0 = FB_A0 + (((ACC0 - FB_A0) * rvb->FB_ALPHA - FB_B0 * rvb->FB_X) >> 15);\r
125 mix_dest_b1 = FB_A1 + (((ACC1 - FB_A1) * rvb->FB_ALPHA - FB_B1 * rvb->FB_X) >> 15);\r
1775933a 126\r
127 s_buffer(MIX_DEST_A0, mix_dest_a0);\r
128 s_buffer(MIX_DEST_A1, mix_dest_a1);\r
129 s_buffer(MIX_DEST_B0, mix_dest_b0);\r
130 s_buffer(MIX_DEST_B1, mix_dest_b1);\r
131\r
b72f17a1 132 l = (mix_dest_a0 + mix_dest_b0) / 2;\r
133 r = (mix_dest_a1 + mix_dest_b1) / 2;\r
1775933a 134\r
05c7cec7 135 l = (l * rvb->VolLeft) >> 15; // 15?\r
136 r = (r * rvb->VolRight) >> 15;\r
b72f17a1 137\r
b72f17a1 138 SSumLR[ns++] += l;\r
139 SSumLR[ns++] += r;\r
05c7cec7 140 SSumLR[ns++] += l;\r
141 SSumLR[ns++] += r;\r
b72f17a1 142\r
143 curr_addr++;\r
05c7cec7 144 if (curr_addr >= 0x40000) curr_addr = rvb->StartAddr;\r
b72f17a1 145 }\r
b72f17a1 146}\r
147\r
05c7cec7 148static void MixREVERB_off(int *SSumLR, int ns_to, int curr_addr)\r
b72f17a1 149{\r
05c7cec7 150 const REVERBInfo *rvb = spu.rvb;\r
151 int space = 0x40000 - rvb->StartAddr;\r
152 int l, r, ns;\r
b72f17a1 153\r
650adfd2 154 for (ns = 0; ns < ns_to * 2; )\r
b72f17a1 155 {\r
05c7cec7 156 preload(SSumLR + ns + 64*2/4 - 4);\r
157\r
b72f17a1 158 l = (g_buffer(MIX_DEST_A0) + g_buffer(MIX_DEST_B0)) / 2;\r
159 r = (g_buffer(MIX_DEST_A1) + g_buffer(MIX_DEST_B1)) / 2;\r
160\r
05c7cec7 161 l = (l * rvb->VolLeft) >> 15;\r
162 r = (r * rvb->VolRight) >> 15;\r
1775933a 163\r
1775933a 164 SSumLR[ns++] += l;\r
165 SSumLR[ns++] += r;\r
05c7cec7 166 SSumLR[ns++] += l;\r
167 SSumLR[ns++] += r;\r
1775933a 168\r
169 curr_addr++;\r
05c7cec7 170 if (curr_addr >= 0x40000) curr_addr = rvb->StartAddr;\r
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171 }\r
172}\r
173\r
05c7cec7 174static void REVERBPrep(void)\r
1775933a 175{\r
05c7cec7 176 REVERBInfo *rvb = spu.rvb;\r
7b2c4897 177 int space, t;\r
178\r
179 t = spu.regArea[(H_SPUReverbAddr - 0xc00) >> 1];\r
180 if (t == 0xFFFF || t <= 0x200)\r
181 spu.rvb->StartAddr = spu.rvb->CurrAddr = 0;\r
182 else if (spu.rvb->StartAddr != (t << 2))\r
183 spu.rvb->StartAddr = spu.rvb->CurrAddr = t << 2;\r
184\r
185 space = 0x40000 - rvb->StartAddr;\r
186\r
187 #define prep_offs(v, r) \\r
188 t = spu.regArea[(0x1c0 + r) >> 1] * 4; \\r
1775933a 189 while (t >= space) \\r
190 t -= space; \\r
7b2c4897 191 rvb->v = t\r
192 #define prep_offs2(d, r1, r2) \\r
193 t = spu.regArea[(0x1c0 + r1) >> 1] * 4; \\r
194 t -= spu.regArea[(0x1c0 + r2) >> 1] * 4; \\r
195 while (t < 0) \\r
196 t += space; \\r
1775933a 197 while (t >= space) \\r
198 t -= space; \\r
7b2c4897 199 rvb->d = t\r
200\r
201 prep_offs(IIR_SRC_A0, 32);\r
202 prep_offs(IIR_SRC_A1, 34);\r
203 prep_offs(IIR_SRC_B0, 36);\r
204 prep_offs(IIR_SRC_B1, 38);\r
205 prep_offs(IIR_DEST_A0, 20);\r
206 prep_offs(IIR_DEST_A1, 22);\r
207 prep_offs(IIR_DEST_B0, 36);\r
208 prep_offs(IIR_DEST_B1, 38);\r
209 prep_offs(ACC_SRC_A0, 24);\r
210 prep_offs(ACC_SRC_A1, 26);\r
211 prep_offs(ACC_SRC_B0, 28);\r
212 prep_offs(ACC_SRC_B1, 30);\r
213 prep_offs(ACC_SRC_C0, 40);\r
214 prep_offs(ACC_SRC_C1, 42);\r
215 prep_offs(ACC_SRC_D0, 44);\r
216 prep_offs(ACC_SRC_D1, 46);\r
217 prep_offs(MIX_DEST_A0, 52);\r
218 prep_offs(MIX_DEST_A1, 54);\r
219 prep_offs(MIX_DEST_B0, 56);\r
220 prep_offs(MIX_DEST_B1, 58);\r
221 prep_offs2(FB_SRC_A0, 52, 0);\r
222 prep_offs2(FB_SRC_A1, 54, 0);\r
223 prep_offs2(FB_SRC_B0, 56, 2);\r
224 prep_offs2(FB_SRC_B1, 58, 2);\r
1775933a 225\r
226#undef prep_offs\r
227#undef prep_offs2\r
05c7cec7 228 rvb->dirty = 0;\r
1775933a 229}\r
ef79bbde 230\r
05c7cec7 231INLINE void REVERBDo(int *SSumLR, int *RVB, int ns_to, int curr_addr)\r
ef79bbde 232{\r
3154bfab 233 if (spu.spuCtrl & 0x80) // -> reverb on? oki\r
1775933a 234 {\r
05c7cec7 235 MixREVERB(SSumLR, RVB, ns_to, curr_addr);\r
b72f17a1 236 }\r
05c7cec7 237 else if (spu.rvb->VolLeft || spu.rvb->VolRight)\r
1775933a 238 {\r
05c7cec7 239 MixREVERB_off(SSumLR, ns_to, curr_addr);\r
1775933a 240 }\r
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241}\r
242\r
243////////////////////////////////////////////////////////////////////////\r
244\r
245#endif\r
246\r
247/*\r
248-----------------------------------------------------------------------------\r
249PSX reverb hardware notes\r
250by Neill Corlett\r
251-----------------------------------------------------------------------------\r
252\r
253Yadda yadda disclaimer yadda probably not perfect yadda well it's okay anyway\r
254yadda yadda.\r
255\r
256-----------------------------------------------------------------------------\r
257\r
258Basics\r
259------\r
260\r
261- The reverb buffer is 22khz 16-bit mono PCM.\r
262- It starts at the reverb address given by 1DA2, extends to\r
263 the end of sound RAM, and wraps back to the 1DA2 address.\r
264\r
265Setting the address at 1DA2 resets the current reverb work address.\r
266\r
267This work address ALWAYS increments every 1/22050 sec., regardless of\r
268whether reverb is enabled (bit 7 of 1DAA set).\r
269\r
270And the contents of the reverb buffer ALWAYS play, scaled by the\r
271"reverberation depth left/right" volumes (1D84/1D86).\r
272(which, by the way, appear to be scaled so 3FFF=approx. 1.0, 4000=-1.0)\r
273\r
274-----------------------------------------------------------------------------\r
275\r
276Register names\r
277--------------\r
278\r
279These are probably not their real names.\r
280These are probably not even correct names.\r
281We will use them anyway, because we can.\r
282\r
2831DC0: FB_SRC_A (offset)\r
2841DC2: FB_SRC_B (offset)\r
2851DC4: IIR_ALPHA (coef.)\r
2861DC6: ACC_COEF_A (coef.)\r
2871DC8: ACC_COEF_B (coef.)\r
2881DCA: ACC_COEF_C (coef.)\r
2891DCC: ACC_COEF_D (coef.)\r
2901DCE: IIR_COEF (coef.)\r
2911DD0: FB_ALPHA (coef.)\r
2921DD2: FB_X (coef.)\r
2931DD4: IIR_DEST_A0 (offset)\r
2941DD6: IIR_DEST_A1 (offset)\r
2951DD8: ACC_SRC_A0 (offset)\r
2961DDA: ACC_SRC_A1 (offset)\r
2971DDC: ACC_SRC_B0 (offset)\r
2981DDE: ACC_SRC_B1 (offset)\r
2991DE0: IIR_SRC_A0 (offset)\r
3001DE2: IIR_SRC_A1 (offset)\r
3011DE4: IIR_DEST_B0 (offset)\r
3021DE6: IIR_DEST_B1 (offset)\r
3031DE8: ACC_SRC_C0 (offset)\r
3041DEA: ACC_SRC_C1 (offset)\r
3051DEC: ACC_SRC_D0 (offset)\r
3061DEE: ACC_SRC_D1 (offset)\r
3071DF0: IIR_SRC_B1 (offset)\r
3081DF2: IIR_SRC_B0 (offset)\r
3091DF4: MIX_DEST_A0 (offset)\r
3101DF6: MIX_DEST_A1 (offset)\r
3111DF8: MIX_DEST_B0 (offset)\r
3121DFA: MIX_DEST_B1 (offset)\r
3131DFC: IN_COEF_L (coef.)\r
3141DFE: IN_COEF_R (coef.)\r
315\r
316The coefficients are signed fractional values.\r
317-32768 would be -1.0\r
318 32768 would be 1.0 (if it were possible... the highest is of course 32767)\r
319\r
320The offsets are (byte/8) offsets into the reverb buffer.\r
321i.e. you multiply them by 8, you get byte offsets.\r
322You can also think of them as (samples/4) offsets.\r
323They appear to be signed. They can be negative.\r
324None of the documented presets make them negative, though.\r
325\r
326Yes, 1DF0 and 1DF2 appear to be backwards. Not a typo.\r
327\r
328-----------------------------------------------------------------------------\r
329\r
330What it does\r
331------------\r
332\r
333We take all reverb sources:\r
334- regular channels that have the reverb bit on\r
335- cd and external sources, if their reverb bits are on\r
336and mix them into one stereo 44100hz signal.\r
337\r
338Lowpass/downsample that to 22050hz. The PSX uses a proper bandlimiting\r
339algorithm here, but I haven't figured out the hysterically exact specifics.\r
340I use an 8-tap filter with these coefficients, which are nice but probably\r
341not the real ones:\r
342\r
3430.037828187894\r
3440.157538631280\r
3450.321159685278\r
3460.449322115345\r
3470.449322115345\r
3480.321159685278\r
3490.157538631280\r
3500.037828187894\r
351\r
352So we have two input samples (INPUT_SAMPLE_L, INPUT_SAMPLE_R) every 22050hz.\r
353\r
354* IN MY EMULATION, I divide these by 2 to make it clip less.\r
355 (and of course the L/R output coefficients are adjusted to compensate)\r
356 The real thing appears to not do this.\r
357\r
358At every 22050hz tick:\r
359- If the reverb bit is enabled (bit 7 of 1DAA), execute the reverb\r
360 steady-state algorithm described below\r
361- AFTERWARDS, retrieve the "wet out" L and R samples from the reverb buffer\r
362 (This part may not be exactly right and I guessed at the coefs. TODO: check later.)\r
363 L is: 0.333 * (buffer[MIX_DEST_A0] + buffer[MIX_DEST_B0])\r
364 R is: 0.333 * (buffer[MIX_DEST_A1] + buffer[MIX_DEST_B1])\r
365- Advance the current buffer position by 1 sample\r
366\r
367The wet out L and R are then upsampled to 44100hz and played at the\r
368"reverberation depth left/right" (1D84/1D86) volume, independent of the main\r
369volume.\r
370\r
371-----------------------------------------------------------------------------\r
372\r
373Reverb steady-state\r
374-------------------\r
375\r
376The reverb steady-state algorithm is fairly clever, and of course by\r
377"clever" I mean "batshit insane".\r
378\r
379buffer[x] is relative to the current buffer position, not the beginning of\r
380the buffer. Note that all buffer offsets must wrap around so they're\r
381contained within the reverb work area.\r
382\r
383Clipping is performed at the end... maybe also sooner, but definitely at\r
384the end.\r
385\r
386IIR_INPUT_A0 = buffer[IIR_SRC_A0] * IIR_COEF + INPUT_SAMPLE_L * IN_COEF_L;\r
387IIR_INPUT_A1 = buffer[IIR_SRC_A1] * IIR_COEF + INPUT_SAMPLE_R * IN_COEF_R;\r
388IIR_INPUT_B0 = buffer[IIR_SRC_B0] * IIR_COEF + INPUT_SAMPLE_L * IN_COEF_L;\r
389IIR_INPUT_B1 = buffer[IIR_SRC_B1] * IIR_COEF + INPUT_SAMPLE_R * IN_COEF_R;\r
390\r
391IIR_A0 = IIR_INPUT_A0 * IIR_ALPHA + buffer[IIR_DEST_A0] * (1.0 - IIR_ALPHA);\r
392IIR_A1 = IIR_INPUT_A1 * IIR_ALPHA + buffer[IIR_DEST_A1] * (1.0 - IIR_ALPHA);\r
393IIR_B0 = IIR_INPUT_B0 * IIR_ALPHA + buffer[IIR_DEST_B0] * (1.0 - IIR_ALPHA);\r
394IIR_B1 = IIR_INPUT_B1 * IIR_ALPHA + buffer[IIR_DEST_B1] * (1.0 - IIR_ALPHA);\r
395\r
396buffer[IIR_DEST_A0 + 1sample] = IIR_A0;\r
397buffer[IIR_DEST_A1 + 1sample] = IIR_A1;\r
398buffer[IIR_DEST_B0 + 1sample] = IIR_B0;\r
399buffer[IIR_DEST_B1 + 1sample] = IIR_B1;\r
400\r
401ACC0 = buffer[ACC_SRC_A0] * ACC_COEF_A +\r
402 buffer[ACC_SRC_B0] * ACC_COEF_B +\r
403 buffer[ACC_SRC_C0] * ACC_COEF_C +\r
404 buffer[ACC_SRC_D0] * ACC_COEF_D;\r
405ACC1 = buffer[ACC_SRC_A1] * ACC_COEF_A +\r
406 buffer[ACC_SRC_B1] * ACC_COEF_B +\r
407 buffer[ACC_SRC_C1] * ACC_COEF_C +\r
408 buffer[ACC_SRC_D1] * ACC_COEF_D;\r
409\r
410FB_A0 = buffer[MIX_DEST_A0 - FB_SRC_A];\r
411FB_A1 = buffer[MIX_DEST_A1 - FB_SRC_A];\r
412FB_B0 = buffer[MIX_DEST_B0 - FB_SRC_B];\r
413FB_B1 = buffer[MIX_DEST_B1 - FB_SRC_B];\r
414\r
415buffer[MIX_DEST_A0] = ACC0 - FB_A0 * FB_ALPHA;\r
416buffer[MIX_DEST_A1] = ACC1 - FB_A1 * FB_ALPHA;\r
417buffer[MIX_DEST_B0] = (FB_ALPHA * ACC0) - FB_A0 * (FB_ALPHA^0x8000) - FB_B0 * FB_X;\r
418buffer[MIX_DEST_B1] = (FB_ALPHA * ACC1) - FB_A1 * (FB_ALPHA^0x8000) - FB_B1 * FB_X;\r
419\r
420-----------------------------------------------------------------------------\r
421*/\r
422\r
1775933a 423// vim:shiftwidth=1:expandtab\r