[libpicofe.git] / gp2x / soc_pollux.c

/*
 * (C) Gražvydas "notaz" Ignotas, 2009-2010
 *
 * This work is licensed under the terms of any of these licenses
 * (at your option):
 *  - GNU GPL, version 2 or later.
 *  - GNU LGPL, version 2.1 or later.
 *  - MAME license.
 * See the COPYING file in the top-level directory.
 *
 * <random_info=mem_map>
 * 00000000-029fffff linux (42MB)
 * 02a00000-02dfffff fb (4MB, 153600B really used)
 * 02e00000-02ffffff sound dma (2MB)
 * 03000000-03ffffff MPEGDEC (?, 16MB)
 * </random_info>
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <linux/soundcard.h>

#include "soc.h"
#include "plat_gp2x.h"
#include "../plat.h"

static int battdev = -1, mixerdev = -1;
static int cpu_clock_allowed;
static unsigned int saved_video_regs[2][6];
static unsigned int timer_drift; // count per real second

#ifndef ARRAY_SIZE
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#endif

/* note: both PLLs are programmed the same way,
 * the databook incorrectly states that PLL1 differs */
static int decode_pll(unsigned int reg)
{
	long long v;
	int p, m, s;

	p = (reg >> 18) & 0x3f;
	m = (reg >> 8) & 0x3ff;
	s = reg & 0xff;

	if (p == 0)
		p = 1;

	v = 27000000; // master clock
	v = v * m / (p << s);
	return v;
}

#define TIMER_BASE3 0x1980
#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]

static unsigned int gp2x_get_ticks_us_(void)
{
	TIMER_REG(0x08) = 0x4b;  /* run timer, latch value */
	return TIMER_REG(0);
}

static unsigned int gp2x_get_ticks_ms_(void)
{
	/* approximate /= 1000 */
	unsigned long long v64;
	v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
	return v64 >> 32;
}

static void timer_cleanup(void)
{
	TIMER_REG(0x40) = 0x0c;	/* be sure clocks are on */
	TIMER_REG(0x08) = 0x23;	/* stop the timer, clear irq in case it's pending */
	TIMER_REG(0x00) = 0;	/* clear counter */
	TIMER_REG(0x40) = 0;	/* clocks off */
	TIMER_REG(0x44) = 0;	/* dividers back to default */
}

static void save_multiple_regs(unsigned int *dest, int base, int count)
{
	const volatile unsigned int *regs = memregl + base / 4;
	int i;

	for (i = 0; i < count; i++)
		dest[i] = regs[i];
}

static void restore_multiple_regs(int base, const unsigned int *src, int count)
{
	volatile unsigned int *regs = memregl + base / 4;
	int i;

	for (i = 0; i < count; i++)
		regs[i] = src[i];
}

int pollux_get_real_snd_rate(int req_rate)
{
	int clk0_src, clk1_src, rate, div;

	clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
	clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
	if (clk0_src > 1 || clk1_src != 7) {
		fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
		return req_rate;
	}

	rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);

	// apply divisors
	div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1;
	rate /= div;
	div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1;
	rate /= div;
	rate /= 64;

	//printf("rate %d\n", rate);
	rate -= rate * timer_drift / 1000000;
	printf("adjusted rate: %d\n", rate);

	if (rate < 8000-1000 || rate > 44100+1000) {
		fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
		return req_rate;
	}

	return rate;
}

/* newer API */
static int pollux_cpu_clock_get(void)
{
	return decode_pll(memregl[0xf004>>2]) / 1000000;
}

int pollux_cpu_clock_set(int mhz)
{
	int adiv, mdiv, pdiv, sdiv = 0;
	int i, vf000, vf004;

	if (!cpu_clock_allowed)
		return -1;
	if (mhz == pollux_cpu_clock_get())
		return 0;

	// m = MDIV, p = PDIV, s = SDIV
	#define SYS_CLK_FREQ 27
	pdiv = 9;
	mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
	if (mdiv & ~0x3ff)
		return -1;
	vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;

	// attempt to keep the AHB divider close to 250, but not higher
	for (adiv = 1; mhz / adiv > 250; adiv++)
		;

	vf000 = memregl[0xf000>>2];
	vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
	memregl[0xf000>>2] = vf000;
	memregl[0xf004>>2] = vf004;
	memregl[0xf07c>>2] |= 0x8000;
	for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
		;

	printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
	return 0;
}

static int pollux_bat_capacity_get(void)
{
	unsigned short magic_val = 0;

	if (battdev < 0)
		return -1;
	if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
		return -1;
	switch (magic_val) {
	default:
	case 1:	return 100;
	case 2: return 66;
	case 3: return 40;
	case 4: return 0;
	}
}

static int step_volume(int *volume, int diff)
{
	int ret, val;

	if (mixerdev < 0)
		return -1;

	*volume += diff;
	if (*volume > 255)
		*volume = 255;
	else if (*volume < 0)
		*volume = 0;

	val = *volume;
	val |= val << 8;

 	ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
	if (ret == -1) {
		perror("WRITE_PCM");
		return ret;
	}

	return 0;
}

void pollux_init(void)
{
	int rate, timer_div, timer_div2;

	memdev = open("/dev/mem", O_RDWR);
	if (memdev == -1) {
		perror("open(/dev/mem) failed");
		exit(1);
	}

	memregs	= mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED,
		memdev, 0xc0000000);
	if (memregs == MAP_FAILED) {
		perror("mmap(memregs) failed");
		exit(1);
	}
	memregl = (volatile void *)memregs;

	// save video regs of both MLCs
	save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
	save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));

	/* some firmwares have sys clk on PLL0, we can't adjust CPU clock
	 * by reprogramming the PLL0 then, as it overclocks system bus */
	if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
		cpu_clock_allowed = 1;
	else {
		cpu_clock_allowed = 0;
		fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
			memregl[0xf000>>2]);
	}

	/* find what PLL1 runs at, for the timer */
	rate = decode_pll(memregl[0xf008>>2]);
	printf("PLL1 @ %dHz\n", rate);

	/* setup timer */
	timer_div = (rate + 500000) / 1000000;
	timer_div2 = 0;
	while (timer_div > 256) {
		timer_div /= 2;
		timer_div2++;
	}
	if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
		int timer_rate = (rate >> timer_div2) / timer_div;
		if (TIMER_REG(0x08) & 8) {
			fprintf(stderr, "warning: timer in use, overriding!\n");
			timer_cleanup();
		}
		timer_drift = timer_rate - 1000000;
		if (timer_drift != 0)
			fprintf(stderr, "warning: timer drift %d us\n",
				timer_drift);

		timer_div2 = (timer_div2 + 3) & 3;
		TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2;	/* using PLL1 */
		TIMER_REG(0x40) = 0x0c;				/* clocks on */
		TIMER_REG(0x08) = 0x68 | timer_div2;		/* run timer, clear irq, latch value */
	}
	else {
		fprintf(stderr, "warning: could not make use of timer\n");

		// those functions are actually not good at all on Wiz kernel
		gp2x_get_ticks_ms = plat_get_ticks_ms_good;
		gp2x_get_ticks_us = plat_get_ticks_us_good;
	}

	battdev = open("/dev/pollux_batt", O_RDONLY);
	if (battdev < 0)
		perror("Warning: could't open pollux_batt");

	mixerdev = open("/dev/mixer", O_RDWR);
	if (mixerdev == -1)
		perror("open(/dev/mixer)");

	plat_target.cpu_clock_get = pollux_cpu_clock_get;
	plat_target.cpu_clock_set = pollux_cpu_clock_set;
	plat_target.bat_capacity_get = pollux_bat_capacity_get;
	plat_target.step_volume = step_volume;

	gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
	gp2x_get_ticks_us = gp2x_get_ticks_us_;
}

void pollux_finish(void)
{
	timer_cleanup();

	restore_multiple_regs(0x4058, saved_video_regs[0],
		ARRAY_SIZE(saved_video_regs[0]));
	restore_multiple_regs(0x4458, saved_video_regs[1],
		ARRAY_SIZE(saved_video_regs[1]));
	memregl[0x4058>>2] |= 0x10;
	memregl[0x4458>>2] |= 0x10;

	if (battdev >= 0)
		close(battdev);
	if (mixerdev >= 0)
		close(mixerdev);
	munmap((void *)memregs, 0x20000);
	close(memdev);
}
Commit	Line	Data
	1	/*
	2	* (C) Gražvydas "notaz" Ignotas, 2009-2010
	3	*
	4	* This work is licensed under the terms of any of these licenses
	5	* (at your option):
	6	* - GNU GPL, version 2 or later.
	7	* - GNU LGPL, version 2.1 or later.
	8	* - MAME license.
	9	* See the COPYING file in the top-level directory.
	10	*
	11	* <random_info=mem_map>
	12	* 00000000-029fffff linux (42MB)
	13	* 02a00000-02dfffff fb (4MB, 153600B really used)
	14	* 02e00000-02ffffff sound dma (2MB)
	15	* 03000000-03ffffff MPEGDEC (?, 16MB)
	16	* </random_info>
	17	*/
	18
	19	#include <stdio.h>
	20	#include <stdlib.h>
	21	#include <string.h>
	22	#include <sys/types.h>
	23	#include <sys/stat.h>
	24	#include <fcntl.h>
	25	#include <sys/mman.h>
	26	#include <unistd.h>
	27	#include <sys/ioctl.h>
	28	#include <linux/soundcard.h>
	29
	30	#include "soc.h"
	31	#include "plat_gp2x.h"
	32	#include "../plat.h"
	33
	34	static int battdev = -1, mixerdev = -1;
	35	static int cpu_clock_allowed;
	36	static unsigned int saved_video_regs[2][6];
	37	static unsigned int timer_drift; // count per real second
	38
	39	#ifndef ARRAY_SIZE
	40	#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
	41	#endif
	42
	43	/* note: both PLLs are programmed the same way,
	44	* the databook incorrectly states that PLL1 differs */
	45	static int decode_pll(unsigned int reg)
	46	{
	47	long long v;
	48	int p, m, s;
	49
	50	p = (reg >> 18) & 0x3f;
	51	m = (reg >> 8) & 0x3ff;
	52	s = reg & 0xff;
	53
	54	if (p == 0)
	55	p = 1;
	56
	57	v = 27000000; // master clock
	58	v = v * m / (p << s);
	59	return v;
	60	}
	61
	62	#define TIMER_BASE3 0x1980
	63	#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
	64
	65	static unsigned int gp2x_get_ticks_us_(void)
	66	{
	67	TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
	68	return TIMER_REG(0);
	69	}
	70
	71	static unsigned int gp2x_get_ticks_ms_(void)
	72	{
	73	/* approximate /= 1000 */
	74	unsigned long long v64;
	75	v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
	76	return v64 >> 32;
	77	}
	78
	79	static void timer_cleanup(void)
	80	{
	81	TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
	82	TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
	83	TIMER_REG(0x00) = 0; /* clear counter */
	84	TIMER_REG(0x40) = 0; /* clocks off */
	85	TIMER_REG(0x44) = 0; /* dividers back to default */
	86	}
	87
	88	static void save_multiple_regs(unsigned int *dest, int base, int count)
	89	{
	90	const volatile unsigned int *regs = memregl + base / 4;
	91	int i;
	92
	93	for (i = 0; i < count; i++)
	94	dest[i] = regs[i];
	95	}
	96
	97	static void restore_multiple_regs(int base, const unsigned int *src, int count)
	98	{
	99	volatile unsigned int *regs = memregl + base / 4;
	100	int i;
	101
	102	for (i = 0; i < count; i++)
	103	regs[i] = src[i];
	104	}
	105
	106	int pollux_get_real_snd_rate(int req_rate)
	107	{
	108	int clk0_src, clk1_src, rate, div;
	109
	110	clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
	111	clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
	112	if (clk0_src > 1 \|\| clk1_src != 7) {
	113	fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
	114	return req_rate;
	115	}
	116
	117	rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
	118
	119	// apply divisors
	120	div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1;
	121	rate /= div;
	122	div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1;
	123	rate /= div;
	124	rate /= 64;
	125
	126	//printf("rate %d\n", rate);
	127	rate -= rate * timer_drift / 1000000;
	128	printf("adjusted rate: %d\n", rate);
	129
	130	if (rate < 8000-1000 \|\| rate > 44100+1000) {
	131	fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
	132	return req_rate;
	133	}
	134
	135	return rate;
	136	}
	137
	138	/* newer API */
	139	static int pollux_cpu_clock_get(void)
	140	{
	141	return decode_pll(memregl[0xf004>>2]) / 1000000;
	142	}
	143
	144	int pollux_cpu_clock_set(int mhz)
	145	{
	146	int adiv, mdiv, pdiv, sdiv = 0;
	147	int i, vf000, vf004;
	148
	149	if (!cpu_clock_allowed)
	150	return -1;
	151	if (mhz == pollux_cpu_clock_get())
	152	return 0;
	153
	154	// m = MDIV, p = PDIV, s = SDIV
	155	#define SYS_CLK_FREQ 27
	156	pdiv = 9;
	157	mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
	158	if (mdiv & ~0x3ff)
	159	return -1;
	160	vf004 = (pdiv<<18) \| (mdiv<<8) \| sdiv;
	161
	162	// attempt to keep the AHB divider close to 250, but not higher
	163	for (adiv = 1; mhz / adiv > 250; adiv++)
	164	;
	165
	166	vf000 = memregl[0xf000>>2];
	167	vf000 = (vf000 & ~0x3c0) \| ((adiv - 1) << 6);
	168	memregl[0xf000>>2] = vf000;
	169	memregl[0xf004>>2] = vf004;
	170	memregl[0xf07c>>2] \|= 0x8000;
	171	for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
	172	;
	173
	174	printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
	175	return 0;
	176	}
	177
	178	static int pollux_bat_capacity_get(void)
	179	{
	180	unsigned short magic_val = 0;
	181
	182	if (battdev < 0)
	183	return -1;
	184	if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
	185	return -1;
	186	switch (magic_val) {
	187	default:
	188	case 1: return 100;
	189	case 2: return 66;
	190	case 3: return 40;
	191	case 4: return 0;
	192	}
	193	}
	194
	195	static int step_volume(int *volume, int diff)
	196	{
	197	int ret, val;
	198
	199	if (mixerdev < 0)
	200	return -1;
	201
	202	*volume += diff;
	203	if (*volume > 255)
	204	*volume = 255;
	205	else if (*volume < 0)
	206	*volume = 0;
	207
	208	val = *volume;
	209	val \|= val << 8;
	210
	211	ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
	212	if (ret == -1) {
	213	perror("WRITE_PCM");
	214	return ret;
	215	}
	216
	217	return 0;
	218	}
	219
	220	void pollux_init(void)
	221	{
	222	int rate, timer_div, timer_div2;
	223
	224	memdev = open("/dev/mem", O_RDWR);
	225	if (memdev == -1) {
	226	perror("open(/dev/mem) failed");
	227	exit(1);
	228	}
	229
	230	memregs = mmap(0, 0x20000, PROT_READ\|PROT_WRITE, MAP_SHARED,
	231	memdev, 0xc0000000);
	232	if (memregs == MAP_FAILED) {
	233	perror("mmap(memregs) failed");
	234	exit(1);
	235	}
	236	memregl = (volatile void *)memregs;
	237
	238	// save video regs of both MLCs
	239	save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
	240	save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
	241
	242	/* some firmwares have sys clk on PLL0, we can't adjust CPU clock
	243	* by reprogramming the PLL0 then, as it overclocks system bus */
	244	if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
	245	cpu_clock_allowed = 1;
	246	else {
	247	cpu_clock_allowed = 0;
	248	fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
	249	memregl[0xf000>>2]);
	250	}
	251
	252	/* find what PLL1 runs at, for the timer */
	253	rate = decode_pll(memregl[0xf008>>2]);
	254	printf("PLL1 @ %dHz\n", rate);
	255
	256	/* setup timer */
	257	timer_div = (rate + 500000) / 1000000;
	258	timer_div2 = 0;
	259	while (timer_div > 256) {
	260	timer_div /= 2;
	261	timer_div2++;
	262	}
	263	if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
	264	int timer_rate = (rate >> timer_div2) / timer_div;
	265	if (TIMER_REG(0x08) & 8) {
	266	fprintf(stderr, "warning: timer in use, overriding!\n");
	267	timer_cleanup();
	268	}
	269	timer_drift = timer_rate - 1000000;
	270	if (timer_drift != 0)
	271	fprintf(stderr, "warning: timer drift %d us\n",
	272	timer_drift);
	273
	274	timer_div2 = (timer_div2 + 3) & 3;
	275	TIMER_REG(0x44) = ((timer_div - 1) << 4) \| 2; /* using PLL1 */
	276	TIMER_REG(0x40) = 0x0c; /* clocks on */
	277	TIMER_REG(0x08) = 0x68 \| timer_div2; /* run timer, clear irq, latch value */
	278	}
	279	else {
	280	fprintf(stderr, "warning: could not make use of timer\n");
	281
	282	// those functions are actually not good at all on Wiz kernel
	283	gp2x_get_ticks_ms = plat_get_ticks_ms_good;
	284	gp2x_get_ticks_us = plat_get_ticks_us_good;
	285	}
	286
	287	battdev = open("/dev/pollux_batt", O_RDONLY);
	288	if (battdev < 0)
	289	perror("Warning: could't open pollux_batt");
	290
	291	mixerdev = open("/dev/mixer", O_RDWR);
	292	if (mixerdev == -1)
	293	perror("open(/dev/mixer)");
	294
	295	plat_target.cpu_clock_get = pollux_cpu_clock_get;
	296	plat_target.cpu_clock_set = pollux_cpu_clock_set;
	297	plat_target.bat_capacity_get = pollux_bat_capacity_get;
	298	plat_target.step_volume = step_volume;
	299
	300	gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
	301	gp2x_get_ticks_us = gp2x_get_ticks_us_;
	302	}
	303
	304	void pollux_finish(void)
	305	{
	306	timer_cleanup();
	307
	308	restore_multiple_regs(0x4058, saved_video_regs[0],
	309	ARRAY_SIZE(saved_video_regs[0]));
	310	restore_multiple_regs(0x4458, saved_video_regs[1],
	311	ARRAY_SIZE(saved_video_regs[1]));
	312	memregl[0x4058>>2] \|= 0x10;
	313	memregl[0x4458>>2] \|= 0x10;
	314
	315	if (battdev >= 0)
	316	close(battdev);
	317	if (mixerdev >= 0)
	318	close(mixerdev);
	319	munmap((void *)memregs, 0x20000);
	320	close(memdev);
	321	}