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[libpicofe.git] / gp2x / soc_pollux.c
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1/*
2 * <random_info=mem_map>
3 * 00000000-029fffff linux (42MB)
4 * 02a00000-02dfffff fb (4MB, 153600B really used)
5 * 02e00000-02ffffff sound dma (2MB)
6 * 03000000-03ffffff MPEGDEC (?, 16MB)
7 * </random_info>
8 */
9#include <stdio.h>
10#include <stdlib.h>
11#include <string.h>
12#include <math.h>
13#include <sys/types.h>
14#include <sys/stat.h>
15#include <fcntl.h>
16#include <sys/mman.h>
17#include <unistd.h>
18#include <sys/ioctl.h>
19#include <linux/fb.h>
20
21#include "soc.h"
22#include "plat_gp2x.h"
23#include "../common/emu.h"
24#include "../common/plat.h"
25#include "../common/arm_utils.h"
26#include "pollux_set.h"
27
28static volatile unsigned short *memregs;
29static volatile unsigned int *memregl;
30static int memdev = -1;
31static int battdev = -1;
32
33extern void *gp2x_screens[4];
34
35#define fb_buf_count 4
36static unsigned int fb_paddr[fb_buf_count];
37static int fb_work_buf;
38static int fbdev = -1;
39
40static char cpuclk_was_changed = 0;
41static unsigned short memtimex_old[2];
42static unsigned int pllsetreg0_old;
43static unsigned int timer_drift; // count per real second
44static int last_pal_setting = 0;
45
46
47/* misc */
48static void pollux_set_fromenv(const char *env_var)
49{
50 const char *set_string;
51 set_string = getenv(env_var);
52 if (set_string)
53 pollux_set(memregs, set_string);
54 else
55 printf("env var %s not defined.\n", env_var);
56}
57
58/* video stuff */
59static void pollux_video_flip(int buf_count)
60{
61 memregl[0x406C>>2] = fb_paddr[fb_work_buf];
62 memregl[0x4058>>2] |= 0x10;
63 fb_work_buf++;
64 if (fb_work_buf >= buf_count)
65 fb_work_buf = 0;
66 g_screen_ptr = gp2x_screens[fb_work_buf];
67}
68
69static void gp2x_video_flip_(void)
70{
71 pollux_video_flip(fb_buf_count);
72}
73
74/* doulblebuffered flip */
75static void gp2x_video_flip2_(void)
76{
77 pollux_video_flip(2);
78}
79
80static void gp2x_video_changemode_ll_(int bpp)
81{
82 static int prev_bpp = 0;
83 int code = 0, bytes = 2;
84 int rot_cmd[2] = { 0, 0 };
85 unsigned int r;
86 char buff[32];
87 int ret;
88
89 if (bpp == prev_bpp)
90 return;
91 prev_bpp = bpp;
92
93 printf("changemode: %dbpp rot=%d\n", abs(bpp), bpp < 0);
94
95 /* negative bpp means rotated mode */
96 rot_cmd[0] = (bpp < 0) ? 6 : 5;
97 ret = ioctl(fbdev, _IOW('D', 90, int[2]), rot_cmd);
98 if (ret < 0)
99 perror("rot ioctl failed");
100 memregl[0x4004>>2] = (bpp < 0) ? 0x013f00ef : 0x00ef013f;
101 memregl[0x4000>>2] |= 1 << 3;
102
103 /* the above ioctl resets LCD timings, so set them here */
104 snprintf(buff, sizeof(buff), "POLLUX_LCD_TIMINGS_%s", last_pal_setting ? "PAL" : "NTSC");
105 pollux_set_fromenv(buff);
106
107 switch (abs(bpp))
108 {
109 case 8:
110 code = 0x443a;
111 bytes = 1;
112 break;
113
114 case 15:
115 case 16:
116 code = 0x4432;
117 bytes = 2;
118 break;
119
120 default:
121 printf("unhandled bpp request: %d\n", abs(bpp));
122 return;
123 }
124
125 memregl[0x405c>>2] = bytes;
126 memregl[0x4060>>2] = bytes * (bpp < 0 ? 240 : 320);
127
128 r = memregl[0x4058>>2];
129 r = (r & 0xffff) | (code << 16) | 0x10;
130 memregl[0x4058>>2] = r;
131}
132
133static void gp2x_video_setpalette_(int *pal, int len)
134{
135 /* pollux palette is 16bpp only.. */
136 int i;
137 for (i = 0; i < len; i++)
138 {
139 int c = pal[i];
140 c = ((c >> 8) & 0xf800) | ((c >> 5) & 0x07c0) | ((c >> 3) & 0x001f);
141 memregl[0x4070>>2] = (i << 24) | c;
142 }
143}
144
145static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
146{
147 /* maybe a job for 3d hardware? */
148}
149
150static void gp2x_video_wait_vsync_(void)
151{
152 while (!(memregl[0x308c>>2] & (1 << 10)));
153 spend_cycles(128);
154 memregl[0x308c>>2] |= 1 << 10;
155}
156
157/* CPU clock */
158static void gp2x_set_cpuclk_(unsigned int mhz)
159{
160 char buff[24];
161 snprintf(buff, sizeof(buff), "cpuclk=%u", mhz);
162 pollux_set(memregs, buff);
163
164 cpuclk_was_changed = 1;
165}
166
167/* RAM timings */
168static void set_ram_timings_(void)
169{
170 pollux_set_fromenv("POLLUX_RAM_TIMINGS");
171}
172
173static void unset_ram_timings_(void)
174{
175 int i;
176
177 memregs[0x14802>>1] = memtimex_old[0];
178 memregs[0x14804>>1] = memtimex_old[1] | 0x8000;
179
180 for (i = 0; i < 0x100000; i++)
181 if (!(memregs[0x14804>>1] & 0x8000))
182 break;
183
184 printf("RAM timings reset to startup values.\n");
185}
186
187/* LCD refresh */
188static void set_lcd_custom_rate_(int is_pal)
189{
190 /* just remember PAL/NTSC. We always set timings in _changemode_ll() */
191 last_pal_setting = is_pal;
192}
193
194static void unset_lcd_custom_rate_(void)
195{
196}
197
198static void set_lcd_gamma_(int g100, int A_SNs_curve)
199{
200 /* hm, the LCD possibly can do it (but not POLLUX) */
201}
202
203static int gp2x_read_battery_(void)
204{
205 unsigned short magic_val = 0;
206
207 if (battdev < 0)
208 return -1;
209 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
210 return -1;
211 switch (magic_val) {
212 default:
213 case 1: return 100;
214 case 2: return 66;
215 case 3: return 40;
216 case 4: return 0;
217 }
218}
219
220#define TIMER_BASE3 0x1980
221#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
222
223static unsigned int gp2x_get_ticks_us_(void)
224{
225 TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
226 return TIMER_REG(0);
227}
228
229static unsigned int gp2x_get_ticks_ms_(void)
230{
231 /* approximate /= 1000 */
232 unsigned long long v64;
233 v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
234 return v64 >> 32;
235}
236
237static void timer_cleanup(void)
238{
239 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
240 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
241 TIMER_REG(0x00) = 0; /* clear counter */
242 TIMER_REG(0x40) = 0; /* clocks off */
243 TIMER_REG(0x44) = 0; /* dividers back to default */
244}
245
246/* note: both PLLs are programmed the same way,
247 * the databook incorrectly states that PLL1 differs */
248static int decode_pll(unsigned int reg)
249{
250 long long v;
251 int p, m, s;
252
253 p = (reg >> 18) & 0x3f;
254 m = (reg >> 8) & 0x3ff;
255 s = reg & 0xff;
256
257 if (p == 0)
258 p = 1;
259
260 v = 27000000; // master clock
261 v = v * m / (p << s);
262 return v;
263}
264
265int pollux_get_real_snd_rate(int req_rate)
266{
267 int clk0_src, clk1_src, rate, div;
268
269 clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
270 clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
271 if (clk0_src > 1 || clk1_src != 7) {
272 fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
273 return req_rate;
274 }
275
276 rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
277
278 // apply divisors
279 div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1;
280 rate /= div;
281 div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1;
282 rate /= div;
283 rate /= 64;
284
285 //printf("rate %d\n", rate);
286 rate -= rate * timer_drift / 1000000;
287 printf("adjusted rate: %d\n", rate);
288
289 if (rate < 8000-1000 || rate > 44100+1000) {
290 fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
291 return req_rate;
292 }
293
294 return rate;
295}
296
297void pollux_init(void)
298{
299 struct fb_fix_screeninfo fbfix;
300 int i, ret, rate, timer_div;
301
302 memdev = open("/dev/mem", O_RDWR);
303 if (memdev == -1) {
304 perror("open(/dev/mem) failed");
305 exit(1);
306 }
307
308 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
309 if (memregs == MAP_FAILED) {
310 perror("mmap(memregs) failed");
311 exit(1);
312 }
313 memregl = (volatile void *)memregs;
314
315 fbdev = open("/dev/fb0", O_RDWR);
316 if (fbdev < 0) {
317 perror("can't open fbdev");
318 exit(1);
319 }
320
321 ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
322 if (ret == -1) {
323 perror("ioctl(fbdev) failed");
324 exit(1);
325 }
326
327 printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
328 fb_paddr[0] = fbfix.smem_start;
329
330 gp2x_screens[0] = mmap(0, 320*240*2*fb_buf_count, PROT_READ|PROT_WRITE,
331 MAP_SHARED, memdev, fb_paddr[0]);
332 if (gp2x_screens[0] == MAP_FAILED)
333 {
334 perror("mmap(gp2x_screens) failed");
335 exit(1);
336 }
337 memset(gp2x_screens[0], 0, 320*240*2*fb_buf_count);
338
339 printf(" %p -> %08x\n", gp2x_screens[0], fb_paddr[0]);
340 for (i = 1; i < fb_buf_count; i++)
341 {
342 fb_paddr[i] = fb_paddr[i-1] + 320*240*2;
343 gp2x_screens[i] = (char *)gp2x_screens[i-1] + 320*240*2;
344 printf(" %p -> %08x\n", gp2x_screens[i], fb_paddr[i]);
345 }
346 fb_work_buf = 0;
347 g_screen_ptr = gp2x_screens[0];
348
349 battdev = open("/dev/pollux_batt", O_RDONLY);
350 if (battdev < 0)
351 perror("Warning: could't open pollux_batt");
352
353 /* find what PLL1 runs at, for the timer */
354 rate = decode_pll(memregl[0xf008>>2]);
355 printf("PLL1 @ %dHz\n", rate);
356
357 /* setup timer */
358 timer_div = (rate + 500000) / 1000000;
359 if (1 <= timer_div && timer_div <= 256) {
360 timer_drift = (rate - (timer_div * 1000000)) / timer_div;
361
362 if (TIMER_REG(0x08) & 8) {
363 fprintf(stderr, "warning: timer in use, overriding!\n");
364 timer_cleanup();
365 }
366
367 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1, divide by it's rate */
368 TIMER_REG(0x40) = 0x0c; /* clocks on */
369 TIMER_REG(0x08) = 0x6b; /* run timer, clear irq, latch value */
370
371 gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
372 gp2x_get_ticks_us = gp2x_get_ticks_us_;
373 }
374 else {
375 fprintf(stderr, "warning: could not make use of timer\n");
376
377 // those functions are actually not good at all on Wiz kernel
378 gp2x_get_ticks_ms = plat_get_ticks_ms_good;
379 gp2x_get_ticks_us = plat_get_ticks_us_good;
380 }
381
382 pllsetreg0_old = memregl[0xf004>>2];
383 memtimex_old[0] = memregs[0x14802>>1];
384 memtimex_old[1] = memregs[0x14804>>1];
385
386 gp2x_video_flip = gp2x_video_flip_;
387 gp2x_video_flip2 = gp2x_video_flip2_;
388 gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
389 gp2x_video_setpalette = gp2x_video_setpalette_;
390 gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
391 gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
392
393 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
394 * by reprogramming the PLL0 then, as it overclocks system bus */
395 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
396 gp2x_set_cpuclk = gp2x_set_cpuclk_;
397 else {
398 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
399 memregl[0xf000>>2]);
400 gp2x_set_cpuclk = NULL;
401 }
402
403 set_lcd_custom_rate = set_lcd_custom_rate_;
404 unset_lcd_custom_rate = unset_lcd_custom_rate_;
405 set_lcd_gamma = set_lcd_gamma_;
406
407 set_ram_timings = set_ram_timings_;
408 unset_ram_timings = unset_ram_timings_;
409 gp2x_read_battery = gp2x_read_battery_;
410}
411
412void pollux_finish(void)
413{
414 /* switch to default fb mem, turn portrait off */
415 memregl[0x406C>>2] = fb_paddr[0];
416 memregl[0x4058>>2] |= 0x10;
417 close(fbdev);
418
419 gp2x_video_changemode_ll_(16);
420 unset_ram_timings_();
421 if (cpuclk_was_changed) {
422 memregl[0xf004>>2] = pllsetreg0_old;
423 memregl[0xf07c>>2] |= 0x8000;
424 }
425 timer_cleanup();
426
427 munmap((void *)memregs, 0x20000);
428 close(memdev);
429 if (battdev >= 0)
430 close(battdev);
431}
432