1 @ vim:filetype=armasm
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3 @ memory handlers with banking support for SSF II - The New Challengers
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4 @ mostly based on Gens code
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6 @ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
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7 @ All Rights Reserved
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10 .include "port_config.s"
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14 @ default jump tables
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17 .long m_read8_rom0 @ 0x000000 - 0x07FFFF
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18 .long m_read8_rom1 @ 0x080000 - 0x0FFFFF
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19 .long m_read8_rom2 @ 0x100000 - 0x17FFFF
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20 .long m_read8_rom3 @ 0x180000 - 0x1FFFFF
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21 .long m_read8_rom4 @ 0x200000 - 0x27FFFF
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22 .long m_read8_rom5 @ 0x280000 - 0x2FFFFF
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23 .long m_read8_rom6 @ 0x300000 - 0x37FFFF
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24 .long m_read8_rom7 @ 0x380000 - 0x3FFFFF
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25 .long m_read8_rom8 @ 0x400000 - 0x47FFFF - for all those large ROM hacks
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26 .long m_read8_rom9 @ 0x480000 - 0x4FFFFF
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27 .long m_read8_romA @ 0x500000 - 0x57FFFF
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28 .long m_read8_romB @ 0x580000 - 0x5FFFFF
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29 .long m_read8_romC @ 0x600000 - 0x67FFFF
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30 .long m_read8_romD @ 0x680000 - 0x6FFFFF
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31 .long m_read8_romE @ 0x700000 - 0x77FFFF
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32 .long m_read8_romF @ 0x780000 - 0x7FFFFF
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33 .long m_read8_rom10 @ 0x800000 - 0x87FFFF
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34 .long m_read8_rom11 @ 0x880000 - 0x8FFFFF
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35 .long m_read8_rom12 @ 0x900000 - 0x97FFFF
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36 .long m_read8_rom13 @ 0x980000 - 0x9FFFFF
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37 .long m_read8_misc @ 0xA00000 - 0xA7FFFF
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38 .long m_read_null @ 0xA80000 - 0xAFFFFF
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39 .long m_read_null @ 0xB00000 - 0xB7FFFF
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40 .long m_read_null @ 0xB80000 - 0xBFFFFF
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41 .long m_read8_vdp @ 0xC00000 - 0xC7FFFF
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42 .long m_read8_vdp @ 0xC80000 - 0xCFFFFF
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43 .long m_read8_vdp @ 0xD00000 - 0xD7FFFF
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44 .long m_read8_vdp @ 0xD80000 - 0xDFFFFF
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45 .long m_read8_ram @ 0xE00000 - 0xE7FFFF
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46 .long m_read8_ram @ 0xE80000 - 0xEFFFFF
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47 .long m_read8_ram @ 0xF00000 - 0xF7FFFF
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48 .long m_read8_ram @ 0xF80000 - 0xFFFFFF
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51 .long m_read16_rom0 @ 0x000000 - 0x07FFFF
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52 .long m_read16_rom1 @ 0x080000 - 0x0FFFFF
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53 .long m_read16_rom2 @ 0x100000 - 0x17FFFF
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54 .long m_read16_rom3 @ 0x180000 - 0x1FFFFF
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55 .long m_read16_rom4 @ 0x200000 - 0x27FFFF
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56 .long m_read16_rom5 @ 0x280000 - 0x2FFFFF
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57 .long m_read16_rom6 @ 0x300000 - 0x37FFFF
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58 .long m_read16_rom7 @ 0x380000 - 0x3FFFFF
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59 .long m_read16_rom8 @ 0x400000 - 0x47FFFF
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60 .long m_read16_rom9 @ 0x480000 - 0x4FFFFF
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61 .long m_read16_romA @ 0x500000 - 0x57FFFF
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62 .long m_read16_romB @ 0x580000 - 0x5FFFFF
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63 .long m_read16_romC @ 0x600000 - 0x67FFFF
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64 .long m_read16_romD @ 0x680000 - 0x6FFFFF
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65 .long m_read16_romE @ 0x700000 - 0x77FFFF
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66 .long m_read16_romF @ 0x780000 - 0x7FFFFF
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67 .long m_read16_rom10 @ 0x800000 - 0x87FFFF
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68 .long m_read16_rom11 @ 0x880000 - 0x8FFFFF
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69 .long m_read16_rom12 @ 0x900000 - 0x97FFFF
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70 .long m_read16_rom13 @ 0x980000 - 0x9FFFFF
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71 .long m_read16_misc @ 0xA00000 - 0xA7FFFF
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72 .long m_read_null @ 0xA80000 - 0xAFFFFF
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73 .long m_read_null @ 0xB00000 - 0xB7FFFF
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74 .long m_read_null @ 0xB80000 - 0xBFFFFF
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75 .long m_read16_vdp @ 0xC00000 - 0xC7FFFF
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76 .long m_read16_vdp @ 0xC80000 - 0xCFFFFF
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77 .long m_read16_vdp @ 0xD00000 - 0xD7FFFF
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78 .long m_read16_vdp @ 0xD80000 - 0xDFFFFF
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79 .long m_read16_ram @ 0xE00000 - 0xE7FFFF
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80 .long m_read16_ram @ 0xE80000 - 0xEFFFFF
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81 .long m_read16_ram @ 0xF00000 - 0xF7FFFF
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82 .long m_read16_ram @ 0xF80000 - 0xFFFFFF
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85 .long m_read32_rom0 @ 0x000000 - 0x07FFFF
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86 .long m_read32_rom1 @ 0x080000 - 0x0FFFFF
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87 .long m_read32_rom2 @ 0x100000 - 0x17FFFF
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88 .long m_read32_rom3 @ 0x180000 - 0x1FFFFF
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89 .long m_read32_rom4 @ 0x200000 - 0x27FFFF
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90 .long m_read32_rom5 @ 0x280000 - 0x2FFFFF
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91 .long m_read32_rom6 @ 0x300000 - 0x37FFFF
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92 .long m_read32_rom7 @ 0x380000 - 0x3FFFFF
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93 .long m_read32_rom8 @ 0x400000 - 0x47FFFF
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94 .long m_read32_rom9 @ 0x480000 - 0x4FFFFF
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95 .long m_read32_romA @ 0x500000 - 0x57FFFF
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96 .long m_read32_romB @ 0x580000 - 0x5FFFFF
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97 .long m_read32_romC @ 0x600000 - 0x67FFFF
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98 .long m_read32_romD @ 0x680000 - 0x6FFFFF
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99 .long m_read32_romE @ 0x700000 - 0x77FFFF
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100 .long m_read32_romF @ 0x780000 - 0x7FFFFF
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101 .long m_read32_rom10 @ 0x800000 - 0x87FFFF
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102 .long m_read32_rom11 @ 0x880000 - 0x8FFFFF
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103 .long m_read32_rom12 @ 0x900000 - 0x97FFFF
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104 .long m_read32_rom13 @ 0x980000 - 0x9FFFFF
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105 .long m_read32_misc @ 0xA00000 - 0xA7FFFF
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106 .long m_read_null @ 0xA80000 - 0xAFFFFF
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107 .long m_read_null @ 0xB00000 - 0xB7FFFF
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108 .long m_read_null @ 0xB80000 - 0xBFFFFF
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109 .long m_read32_vdp @ 0xC00000 - 0xC7FFFF
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110 .long m_read32_vdp @ 0xC80000 - 0xCFFFFF
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111 .long m_read32_vdp @ 0xD00000 - 0xD7FFFF
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112 .long m_read32_vdp @ 0xD80000 - 0xDFFFFF
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113 .long m_read32_ram @ 0xE00000 - 0xE7FFFF
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114 .long m_read32_ram @ 0xE80000 - 0xEFFFFF
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115 .long m_read32_ram @ 0xF00000 - 0xF7FFFF
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116 .long m_read32_ram @ 0xF80000 - 0xFFFFFF
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119 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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122 @.section .bss, "brw"
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136 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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140 .global PicoMemReset
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145 .global PicoWriteRomHW_SSF2
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146 .global m_m68k_read8_misc
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147 .global m_m68k_write8_misc
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151 ldr r12,=(Pico+0x22204)
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152 ldr r12,[r12] @ romsize
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153 add r12,r12,#0x80000
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155 mov r12,r12,lsr #19
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157 ldr r0, =m_read8_table
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158 ldr r1, =m_read8_def_table
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166 ldr r0, =m_read16_table
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167 ldr r1, =m_read16_def_table
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175 ldr r0, =m_read32_table
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176 ldr r1, =m_read32_def_table
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184 @ update memhandlers according to ROM size
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185 ldr r1, =m_read8_above_rom
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186 ldr r0, =m_read8_table
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193 beq 1b @ do not touch the SRAM area
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194 str r1, [r0, r2, lsl #2]
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197 ldr r1, =m_read16_above_rom
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198 ldr r0, =m_read16_table
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206 str r1, [r0, r2, lsl #2]
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209 ldr r1, =m_read32_above_rom
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210 ldr r0, =m_read32_table
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218 str r1, [r0, r2, lsl #2]
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225 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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228 ldr r2, =m_read8_table
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229 bic r0, r0, #0xff000000
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230 and r1, r0, #0x00f80000
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231 ldr pc, [r2, r1, lsr #17]
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233 PicoRead16: @ u32 a
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234 ldr r2, =m_read16_table
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235 bic r0, r0, #0xff000000
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236 and r1, r0, #0x00f80000
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237 ldr pc, [r2, r1, lsr #17]
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239 PicoRead32: @ u32 a
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240 ldr r2, =m_read32_table
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241 bic r0, r0, #0xff000000
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242 and r1, r0, #0x00f80000
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243 ldr pc, [r2, r1, lsr #17]
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247 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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254 .macro m_read8_rom sect
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255 ldr r1, =(Pico+0x22200)
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256 bic r0, r0, #0xf80000
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259 orr r0, r0, #0x080000*\sect
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267 m_read8_rom0: @ 0x000000 - 0x07ffff
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270 m_read8_rom1: @ 0x080000 - 0x0fffff
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273 m_read8_rom2: @ 0x100000 - 0x17ffff
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276 m_read8_rom3: @ 0x180000 - 0x1fffff
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279 m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area
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281 ldr r3, =(Pico+0x22200)
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282 ldr r1, [r2, #8] @ SRam.end
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283 bic r0, r0, #0xf80000
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284 orr r0, r0, #0x200000
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287 ldr r1, [r2, #4] @ SRam.start
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290 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
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294 ldr r1, [r3, #4] @ romsize
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297 bxgt lr @ bad location
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303 m_read8_rom5: @ 0x280000 - 0x2fffff
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306 m_read8_rom6: @ 0x300000 - 0x37ffff
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309 m_read8_rom7: @ 0x380000 - 0x3fffff
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312 m_read8_rom8: @ 0x400000 - 0x47ffff
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315 m_read8_rom9: @ 0x480000 - 0x4fffff
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318 m_read8_romA: @ 0x500000 - 0x57ffff
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321 m_read8_romB: @ 0x580000 - 0x5fffff
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324 m_read8_romC: @ 0x600000 - 0x67ffff
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327 m_read8_romD: @ 0x680000 - 0x6fffff
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330 m_read8_romE: @ 0x700000 - 0x77ffff
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333 m_read8_romF: @ 0x780000 - 0x7fffff
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336 m_read8_rom10: @ 0x800000 - 0x87ffff
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339 m_read8_rom11: @ 0x880000 - 0x8fffff
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342 m_read8_rom12: @ 0x900000 - 0x97ffff
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345 m_read8_rom13: @ 0x980000 - 0x9fffff
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351 bic r2, r0, #0x001f @ most commonly we get i/o port read,
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352 cmp r2, #0xa10000 @ so check for it first
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356 beq m_read8_misc_hwreg
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361 ldr r3, =(Pico+0x22000)
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362 mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])
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366 m_read8_misc_hwreg:
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367 ldr r3, =(Pico+0x22200)
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368 ldrb r0, [r3, #0x0f] @ Pico.m.hardware
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372 mov r2, #0xa10000 @ games also like to poll busreq,
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373 orr r2, r2, #0x001100 @ so we'll try it now
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377 and r2, r0, #0xff0000 @ finally it might be
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378 cmp r2, #0xa00000 @ z80 area
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381 beq z80Read8 @ z80 RAM
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382 and r2, r0, #0x6000
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386 .if EXTERNAL_YM2612
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390 beq m_read8_fake_ym2612
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398 m_read8_fake_ym2612:
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399 ldr r3, =(Pico+0x22200)
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400 ldrb r0, [r3, #8] @ Pico.m.rotate
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407 @ if everything else fails, use generic handler
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414 moveq r0, r0, lsr #8
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421 bxne lr @ invalid read
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427 moveq r0, r0, lsr #8
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432 bic r0, r0, #0xff0000
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438 @ might still be SRam (Micro Machines, HardBall '95)
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440 ldr r3, =(Pico+0x22200)
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441 ldr r1, [r2, #8] @ SRam.end
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443 bgt m_read8_ar_nosram
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444 ldr r1, [r2, #4] @ SRam.start
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446 blt m_read8_ar_nosram
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447 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
457 moveq r0, r0, lsr #8
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462 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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464 .macro m_read16_rom sect
\r
465 ldr r1, =(Pico+0x22200)
\r
466 bic r0, r0, #0xf80000
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470 orr r0, r0, #0x080000*\sect
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477 m_read16_rom0: @ 0x000000 - 0x07ffff
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480 m_read16_rom1: @ 0x080000 - 0x0fffff
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483 m_read16_rom2: @ 0x100000 - 0x17ffff
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486 m_read16_rom3: @ 0x180000 - 0x1fffff
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489 m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95)
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491 ldr r3, =(Pico+0x22200)
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492 ldr r1, [r2, #8] @ SRam.end
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493 bic r0, r0, #0xf80000
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495 orr r0, r0, #0x200000
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497 bgt m_read16_nosram
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498 ldr r1, [r2, #4] @ SRam.start
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500 blt m_read16_nosram
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501 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
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503 beq m_read16_nosram
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506 orr r0, r0, r0, lsl #8
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509 ldr r1, [r3, #4] @ romsize
\r
512 bxgt lr @ bad location
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517 m_read16_rom5: @ 0x280000 - 0x2fffff
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520 m_read16_rom6: @ 0x300000 - 0x37ffff
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523 m_read16_rom7: @ 0x380000 - 0x3fffff
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526 m_read16_rom8: @ 0x400000 - 0x47ffff
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529 m_read16_rom9: @ 0x480000 - 0x4fffff
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532 m_read16_romA: @ 0x500000 - 0x57ffff
\r
535 m_read16_romB: @ 0x580000 - 0x5fffff
\r
538 m_read16_romC: @ 0x600000 - 0x67ffff
\r
541 m_read16_romD: @ 0x680000 - 0x6fffff
\r
544 m_read16_romE: @ 0x700000 - 0x77ffff
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547 m_read16_romF: @ 0x780000 - 0x7fffff
\r
550 m_read16_rom10: @ 0x800000 - 0x87ffff
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553 m_read16_rom11: @ 0x880000 - 0x8fffff
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556 m_read16_rom12: @ 0x900000 - 0x97ffff
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559 m_read16_rom13: @ 0x980000 - 0x9fffff
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568 tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000)
\r
570 bxne lr @ invalid read
\r
576 bic r0, r0, #0xff0000
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581 m_read16_above_rom:
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582 @ might still be SRam
\r
584 ldr r3, =(Pico+0x22200)
\r
585 ldr r1, [r2, #8] @ SRam.end
\r
588 bgt m_read16_ar_nosram
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589 ldr r1, [r2, #4] @ SRam.start
\r
591 blt m_read16_ar_nosram
\r
592 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
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594 beq m_read16_ar_nosram
\r
597 orr r0, r0, r0, lsl #8
\r
599 m_read16_ar_nosram:
\r
605 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
607 .macro m_read32_rom sect
\r
608 ldr r1, =(Pico+0x22200)
\r
609 bic r0, r0, #0xf80000
\r
613 orr r0, r0, #0x080000*\sect
\r
616 ldrh r1, [r1, #2] @ 1ci
\r
617 orr r0, r1, r0, lsl #16
\r
622 m_read32_rom0: @ 0x000000 - 0x07ffff
\r
625 m_read32_rom1: @ 0x080000 - 0x0fffff
\r
628 m_read32_rom2: @ 0x100000 - 0x17ffff
\r
631 m_read32_rom3: @ 0x180000 - 0x1fffff
\r
634 m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?)
\r
636 ldr r3, =(Pico+0x22200)
\r
637 ldr r1, [r2, #8] @ SRam.end
\r
638 bic r0, r0, #0xf80000
\r
640 orr r0, r0, #0x200000
\r
642 bgt m_read32_nosram
\r
643 ldr r1, [r2, #4] @ SRam.start
\r
645 blt m_read32_nosram
\r
646 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
648 beq m_read32_nosram
\r
656 orr r0, r1, r0, lsl #16
\r
657 orr r0, r0, r0, lsl #8
\r
660 ldr r1, [r3, #4] @ romsize
\r
663 bxgt lr @ bad location
\r
664 ldr r1, [r3] @ (1ci)
\r
666 ldrh r1, [r1, #2] @ (2ci)
\r
667 orr r0, r1, r0, lsl #16
\r
670 m_read32_rom5: @ 0x280000 - 0x2fffff
\r
673 m_read32_rom6: @ 0x300000 - 0x37ffff
\r
676 m_read32_rom7: @ 0x380000 - 0x3fffff
\r
679 m_read32_rom8: @ 0x400000 - 0x47ffff
\r
682 m_read32_rom9: @ 0x480000 - 0x4fffff
\r
685 m_read32_romA: @ 0x500000 - 0x57ffff
\r
688 m_read32_romB: @ 0x580000 - 0x5fffff
\r
691 m_read32_romC: @ 0x600000 - 0x67ffff
\r
694 m_read32_romD: @ 0x680000 - 0x6fffff
\r
697 m_read32_romE: @ 0x700000 - 0x77ffff
\r
700 m_read32_romF: @ 0x780000 - 0x7fffff
\r
703 m_read32_rom10: @ 0x800000 - 0x87ffff
\r
706 m_read32_rom11: @ 0x880000 - 0x8fffff
\r
709 m_read32_rom12: @ 0x900000 - 0x97ffff
\r
712 m_read32_rom13: @ 0x980000 - 0x9fffff
\r
727 orr r0, r0, r1, lsl #16
\r
733 bxne lr @ invalid read
\r
741 orr r0, r0, r1, lsl #16
\r
746 bic r0, r0, #0xff0000
\r
749 ldrh r1, [r1, #2] @ 2ci
\r
750 orr r0, r1, r0, lsl #16
\r
753 m_read32_above_rom:
\r
765 orr r0, r0, r1, lsl #16
\r
770 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
772 PicoWriteRomHW_SSF2: @ u32 a, u32 d
\r
774 movs r0, r0, lsr #1
\r
778 ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg
\r
789 ldr r3, =m_read8_def_table
\r
790 ldr r2, =m_read8_table
\r
791 ldr r12, [r3, r1, lsl #2]
\r
792 str r12, [r2, r0, lsl #2]
\r
794 ldr r3, =m_read16_def_table
\r
795 ldr r2, =m_read16_table
\r
796 ldr r12, [r3, r1, lsl #2]
\r
797 str r12, [r2, r0, lsl #2]
\r
799 ldr r3, =m_read32_def_table
\r
800 ldr r2, =m_read32_table
\r
801 ldr r12, [r3, r1, lsl #2]
\r
802 str r12, [r2, r0, lsl #2]
\r
806 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
808 @ Here we only handle most often used locations,
\r
809 @ everything else is passed to generic handlers
\r
811 PicoWrite8: @ u32 a, u8 d
\r
812 bic r0, r0, #0xff000000
\r
813 and r2, r0, #0x00e00000
\r
814 cmp r2, #0x00e00000 @ RAM?
\r
816 biceq r0, r0, #0x00ff0000
\r
818 streqb r1, [r3, r0]
\r
821 m_m68k_write8_misc:
\r
822 bic r2, r0, #0x1f @ most commonly we get i/o port write,
\r
823 cmp r2, #0xa10000 @ so check for it first
\r
829 ldr r3, =(Pico+0x22000) @ Pico.ioports
\r
830 tst r2, #0x20 @ 6 button pad?
\r
831 streqb r1, [r3, r0, lsr #1]
\r
835 bne m_write8_io_done @ not likely to happen
\r
836 add r2, r3, #0x200 @ Pico+0x22200
\r
839 streqb r12,[r2,#0x18]
\r
840 strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0
\r
842 beq m_write8_io_done
\r
843 ldrb r12,[r3, r0, lsr #1]
\r
845 bne m_write8_io_done
\r
847 ldreqb r12,[r2,#0x0a]
\r
848 ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
850 streqb r12,[r2,#0x0a]
\r
851 strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
853 strb r1, [r3, r0, lsr #1]
\r
858 and r2, r0, #0xff0000
\r
859 cmp r2, #0xa00000 @ z80 area?
\r
860 bne m_write8_not_z80
\r
862 bne m_write8_z80_not_ram
\r
863 ldr r3, =(Pico+0x20000) @ Pico.zram
\r
864 add r2, r3, #0x02200 @ Pico+0x22200
\r
865 ldrb r2, [r2, #9] @ Pico.m.z80Run
\r
866 bic r0, r0, #0xff0000
\r
867 bic r0, r0, #0x00e000
\r
869 streqb r1, [r3, r0] @ zram
\r
872 m_write8_z80_not_ram:
\r
873 and r2, r0, #0x6000
\r
875 bne m_write8_z80_not_ym2612
\r
882 .if EXTERNAL_YM2612
\r
884 ldreq r2, =YM2612Write_
\r
885 ldrne r2, =YM2612Write_940
\r
896 str r1, [r2] @ emustatus|=YM2612Write(a&3, d);
\r
899 m_write8_z80_not_ym2612: @ not too likely
\r
900 mov r2, r0, lsl #17
\r
903 orr r3, r3, #0x0011
\r
904 cmp r3, r2, lsr #17 @ psg @ z80 area?
\r
906 and r2, r0, #0x7f00
\r
907 cmp r2, #0x6000 @ bank register?
\r
908 bxne lr @ invalid write
\r
910 m_write8_z80_bank_reg:
\r
911 ldr r3, =(Pico+0x22208) @ Pico.m
\r
912 ldrh r2, [r3, #0x0a]
\r
914 orr r2, r1, r2, lsr #1
\r
915 bic r2, r2, #0xfe00
\r
916 strh r2, [r3, #0x0a]
\r
921 and r2, r0, #0xe70000
\r
922 cmp r2, #0xc00000 @ VDP area?
\r
923 bne OtherWrite8 @ passthrough
\r