2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2011
4 * This work is licensed under the terms of the GNU GPLv2 or later.
5 * See the COPYING file in the top-level directory.
11 #include <sys/types.h>
14 #include <sys/ioctl.h>
19 #include "common/input.h"
20 #include "common/menu.h"
21 #include "warm/warm.h"
22 #include "plugin_lib.h"
25 #include "in_tsbutton.h"
31 static int fbdev = -1, memdev = -1, battdev = -1;
32 static volatile unsigned short *memregs;
33 static volatile unsigned int *memregl;
34 static void *fb_vaddrs[2];
35 static unsigned int fb_paddrs[2];
36 static int fb_work_buf;
37 static int cpu_clock_allowed, have_warm;
38 static unsigned int saved_video_regs[2][6];
39 #define FB_VRAM_SIZE (320*240*2*2*2) // 2 buffers with space for 24bpp mode
41 static unsigned short *psx_vram;
42 static unsigned int psx_vram_padds[512];
43 static int psx_step, psx_width, psx_height, psx_bpp;
44 static int psx_offset_x, psx_offset_y;
45 static int fb_offset_x, fb_offset_y;
47 // TODO: get rid of this
49 struct vout_fbdev *layer_fb;
50 int g_layer_x, g_layer_y, g_layer_w, g_layer_h;
52 int omap_enable_layer(int enabled)
57 static void *fb_flip(void)
59 memregl[0x406C>>2] = memregl[0x446C>>2] = fb_paddrs[fb_work_buf];
60 memregl[0x4058>>2] |= 0x10;
61 memregl[0x4458>>2] |= 0x10;
63 return fb_vaddrs[fb_work_buf];
66 static void pollux_changemode(int bpp, int is_bgr)
68 int code = 0, bytes = 2;
71 printf("changemode: %dbpp %s\n", bpp, is_bgr ? "bgr" : "rgb");
73 memregl[0x4004>>2] = 0x00ef013f;
74 memregl[0x4000>>2] |= 1 << 3;
83 code = is_bgr ? 0xc342 : 0x4432;
87 code = is_bgr ? 0xc653 : 0x4653;
91 printf("unhandled bpp request: %d\n", bpp);
95 // program both MLCs so that TV-out works
96 memregl[0x405c>>2] = memregl[0x445c>>2] = bytes;
97 memregl[0x4060>>2] = memregl[0x4460>>2] = 320 * bytes;
99 r = memregl[0x4058>>2];
100 r = (r & 0xffff) | (code << 16) | 0x10;
101 memregl[0x4058>>2] = r;
103 r = memregl[0x4458>>2];
104 r = (r & 0xffff) | (code << 16) | 0x10;
105 memregl[0x4458>>2] = r;
108 /* note: both PLLs are programmed the same way,
109 * the databook incorrectly states that PLL1 differs */
110 static int decode_pll(unsigned int reg)
115 p = (reg >> 18) & 0x3f;
116 m = (reg >> 8) & 0x3ff;
122 v = 27000000; // master clock
123 v = v * m / (p << s);
127 int plat_cpu_clock_get(void)
129 return decode_pll(memregl[0xf004>>2]) / 1000000;
132 int plat_cpu_clock_apply(int mhz)
134 int adiv, mdiv, pdiv, sdiv = 0;
137 if (!cpu_clock_allowed)
139 if (mhz == plat_cpu_clock_get())
142 // m = MDIV, p = PDIV, s = SDIV
143 #define SYS_CLK_FREQ 27
145 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
148 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
150 // attempt to keep the AHB divider close to 250, but not higher
151 for (adiv = 1; mhz / adiv > 250; adiv++)
154 vf000 = memregl[0xf000>>2];
155 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
156 memregl[0xf000>>2] = vf000;
157 memregl[0xf004>>2] = vf004;
158 memregl[0xf07c>>2] |= 0x8000;
159 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
162 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
164 // stupid pll share hack - must restart audio
165 extern long SPUopen(void);
166 extern long SPUclose(void);
173 int plat_get_bat_capacity(void)
175 unsigned short magic_val = 0;
179 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
190 #define TIMER_BASE3 0x1980
191 #define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
193 static __attribute__((unused)) unsigned int timer_get(void)
195 TIMER_REG(0x08) |= 0x48; /* run timer, latch value */
199 static void timer_cleanup(void)
201 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
202 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
203 TIMER_REG(0x00) = 0; /* clear counter */
204 TIMER_REG(0x40) = 0; /* clocks off */
205 TIMER_REG(0x44) = 0; /* dividers back to default */
208 void plat_video_menu_enter(int is_rom_loaded)
210 if (pl_vout_buf != NULL) {
212 // have to do rgb conversion for menu bg
213 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
215 memset(pl_vout_buf, 0, 320*240*2);
218 pollux_changemode(16, 0);
221 void plat_video_menu_begin(void)
225 void plat_video_menu_end(void)
227 g_menuscreen_ptr = fb_flip();
230 void plat_video_menu_leave(void)
232 if (psx_vram == NULL) {
233 fprintf(stderr, "GPU plugin did not provide vram\n");
237 in_set_config_int(in_name_to_id("evdev:pollux-analog"),
238 IN_CFG_ABS_DEAD_ZONE, analog_deadzone);
240 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
241 g_menuscreen_ptr = fb_flip();
242 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
244 pollux_changemode(psx_bpp, 1);
247 void *plat_prepare_screenshot(int *w, int *h, int *bpp)
249 bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
256 static void pl_vout_set_raw_vram(void *vram)
265 if ((long)psx_vram & 0x7ff)
266 fprintf(stderr, "GPU plugin did not align vram\n");
268 for (i = 0; i < 512; i++) {
269 psx_vram[i * 1024] = 0; // touch
270 psx_vram_padds[i] = warm_virt2phys(&psx_vram[i * 1024]);
274 static void spend_cycles(int loops)
278 "0: subs r0,r0,#1 ;\n"
280 :: "r" (loops) : "cc", "r0");
283 #define DMA_BASE6 0x0300
284 #define DMA_REG(x) memregl[(DMA_BASE6 + x) >> 2]
286 /* this takes ~1.5ms, while ldm/stm ~1.95ms */
287 static void raw_flip_dma(int x, int y)
289 unsigned int dst = fb_paddrs[fb_work_buf] +
290 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;
291 int spsx_line = y + psx_offset_y;
292 int spsx_offset = (x + psx_offset_x) & 0x3f8;
293 int dst_stride = 320 * psx_bpp / 8;
294 int len = psx_width * psx_bpp / 8;
297 warm_cache_op_all(WOP_D_CLEAN);
298 pcnt_start(PCNT_BLIT);
303 if (DMA_REG(0x0c) & 0x90000) {
304 printf("already runnig DMA?\n");
305 DMA_REG(0x0c) = 0x100000;
307 if ((DMA_REG(0x2c) & 0x0f) < 5) {
308 printf("DMA queue busy?\n");
312 for (i = psx_height; i > 0; i--, spsx_line += psx_step, dst += dst_stride) {
313 while ((DMA_REG(0x2c) & 0x0f) < 4)
316 // XXX: it seems we must always set all regs, what is autoincrement there for?
317 DMA_REG(0x20) = 1; // queue wait cmd
318 DMA_REG(0x10) = psx_vram_padds[spsx_line & 511] + spsx_offset * 2; // DMA src
319 DMA_REG(0x14) = dst; // DMA dst
320 DMA_REG(0x18) = len - 1; // len
321 DMA_REG(0x1c) = 0x80000; // go
325 pl_vout_buf = g_menuscreen_ptr;
326 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x);
329 g_menuscreen_ptr = fb_flip();
335 #define make_flip_func(name, blitfunc) \
336 static void name(int x, int y) \
338 unsigned short *vram = psx_vram; \
339 unsigned char *dst = (unsigned char *)g_menuscreen_ptr + \
340 (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8; \
341 unsigned int src = (y + psx_offset_y) * 1024 + x + psx_offset_x; \
342 int dst_stride = 320 * psx_bpp / 8; \
343 int len = psx_width * psx_bpp / 8; \
346 pcnt_start(PCNT_BLIT); \
348 for (i = psx_height; i > 0; i--, src += psx_step * 1024, dst += dst_stride) { \
350 blitfunc(dst, vram + src, len); \
353 if (psx_bpp == 16) { \
354 pl_vout_buf = g_menuscreen_ptr; \
355 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x); \
358 g_menuscreen_ptr = fb_flip(); \
361 pcnt_end(PCNT_BLIT); \
364 make_flip_func(raw_flip_soft, memcpy)
365 make_flip_func(raw_flip_soft_368, blit320_368)
366 make_flip_func(raw_flip_soft_512, blit320_512)
367 make_flip_func(raw_flip_soft_640, blit320_640)
369 static void *pl_vout_set_mode(int w, int h, int bpp)
371 static int old_w, old_h, old_bpp;
372 int poff_w, poff_h, w_max;
374 if (!w || !h || !bpp || (w == old_w && h == old_h && bpp == old_bpp))
377 printf("psx mode: %dx%d@%d\n", w, h, bpp);
379 switch (w + (bpp != 16)) {
381 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_640;
385 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_512;
390 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_368;
394 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
407 poff_w = w / 2 - w_max / 2;
412 fb_offset_x = 320/2 - w / 2;
414 poff_h = h / 2 - 240/2;
417 fb_offset_y = 240/2 - h / 2;
419 psx_offset_x = poff_w;
420 psx_offset_y = poff_h;
425 if (fb_offset_x || fb_offset_y) {
426 // not fullscreen, must clear borders
427 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
428 g_menuscreen_ptr = fb_flip();
429 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
432 pollux_changemode(bpp, 1);
437 static void *pl_vout_flip(void)
442 static void save_multiple_regs(unsigned int *dest, int base, int count)
444 const volatile unsigned int *regs = memregl + base / 4;
447 for (i = 0; i < count; i++)
451 static void restore_multiple_regs(int base, const unsigned int *src, int count)
453 volatile unsigned int *regs = memregl + base / 4;
456 for (i = 0; i < count; i++)
462 const char *main_fb_name = "/dev/fb0";
463 struct fb_fix_screeninfo fbfix;
464 int rate, timer_div, timer_div2;
465 int fbdev, ret, warm_ret;
467 memdev = open("/dev/mem", O_RDWR);
469 perror("open(/dev/mem) failed");
473 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
474 if (memregs == MAP_FAILED) {
475 perror("mmap(memregs) failed");
478 memregl = (volatile void *)memregs;
480 // save video regs of both MLCs
481 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
482 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
484 fbdev = open(main_fb_name, O_RDWR);
486 fprintf(stderr, "%s: ", main_fb_name);
491 ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
493 perror("ioctl(fbdev) failed");
496 printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
497 fb_paddrs[0] = fbfix.smem_start;
498 fb_paddrs[1] = fb_paddrs[0] + 320*240*4; // leave space for 24bpp
500 fb_vaddrs[0] = mmap(0, FB_VRAM_SIZE, PROT_READ|PROT_WRITE,
501 MAP_SHARED, memdev, fb_paddrs[0]);
502 if (fb_vaddrs[0] == MAP_FAILED) {
503 perror("mmap(fb_vaddrs) failed");
506 fb_vaddrs[1] = (char *)fb_vaddrs[0] + 320*240*4;
508 pollux_changemode(16, 0);
509 g_menuscreen_w = 320;
510 g_menuscreen_h = 240;
511 g_menuscreen_ptr = fb_flip();
513 g_menubg_ptr = calloc(320*240*2, 1);
514 if (g_menubg_ptr == NULL) {
515 fprintf(stderr, "OOM\n");
519 warm_ret = warm_init();
520 have_warm = warm_ret == 0;
521 warm_change_cb_upper(WCB_B_BIT, 1);
523 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
524 * by reprogramming the PLL0 then, as it overclocks system bus */
525 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
526 cpu_clock_allowed = 1;
528 cpu_clock_allowed = 0;
529 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
533 /* find what PLL1 runs at, for the timer */
534 rate = decode_pll(memregl[0xf008>>2]);
535 printf("PLL1 @ %dHz\n", rate);
538 timer_div = (rate + 500000) / 1000000;
540 while (timer_div > 256) {
544 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
545 int timer_rate = (rate >> timer_div2) / timer_div;
546 if (TIMER_REG(0x08) & 8) {
547 fprintf(stderr, "warning: timer in use, overriding!\n");
550 if (timer_rate != 1000000)
551 fprintf(stderr, "warning: timer drift %d us\n", timer_rate - 1000000);
553 timer_div2 = (timer_div2 + 3) & 3;
554 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
555 TIMER_REG(0x40) = 0x0c; /* clocks on */
556 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
559 fprintf(stderr, "warning: could not make use of timer\n");
562 DMA_REG(0x0c) = 0x20000; // pending IRQ clear
564 battdev = open("/dev/pollux_batt", O_RDONLY);
566 perror("Warning: could't open pollux_batt");
568 pl_rearmed_cbs.pl_vout_flip = pl_vout_flip;
569 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
570 pl_rearmed_cbs.pl_vout_set_mode = pl_vout_set_mode;
571 pl_rearmed_cbs.pl_vout_set_raw_vram = pl_vout_set_raw_vram;
580 void plat_finish(void)
585 memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
586 restore_multiple_regs(0x4058, saved_video_regs[0], ARRAY_SIZE(saved_video_regs[0]));
587 restore_multiple_regs(0x4458, saved_video_regs[1], ARRAY_SIZE(saved_video_regs[1]));
588 memregl[0x4058>>2] |= 0x10;
589 memregl[0x4458>>2] |= 0x10;
590 munmap(fb_vaddrs[0], FB_VRAM_SIZE);
595 munmap((void *)memregs, 0x20000);
599 void in_update_analogs(void)
603 /* Caanoo stuff, perhaps move later */
604 #include <linux/input.h>
606 struct in_default_bind in_evdev_defbinds[] = {
607 { KEY_UP, IN_BINDTYPE_PLAYER12, DKEY_UP },
608 { KEY_DOWN, IN_BINDTYPE_PLAYER12, DKEY_DOWN },
609 { KEY_LEFT, IN_BINDTYPE_PLAYER12, DKEY_LEFT },
610 { KEY_RIGHT, IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
611 { BTN_TOP, IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
612 { BTN_THUMB, IN_BINDTYPE_PLAYER12, DKEY_CROSS },
613 { BTN_THUMB2, IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
614 { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
615 { BTN_BASE3, IN_BINDTYPE_PLAYER12, DKEY_START },
616 { BTN_BASE4, IN_BINDTYPE_PLAYER12, DKEY_SELECT },
617 { BTN_TOP2, IN_BINDTYPE_PLAYER12, DKEY_L1 },
618 { BTN_PINKIE, IN_BINDTYPE_PLAYER12, DKEY_R1 },
619 { BTN_BASE, IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
623 static const char * const caanoo_keys[KEY_MAX + 1] = {
624 [0 ... KEY_MAX] = NULL,
627 [KEY_RIGHT] = "Right",
636 [BTN_BASE2] = "Lock",
639 [BTN_BASE5] = "Push",
642 int plat_rescan_inputs(void)
645 in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
646 caanoo_keys, sizeof(caanoo_keys));