2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2010
4 * This work is licensed under the terms of any of these licenses
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
9 * See the COPYING file in the top-level directory.
11 * <random_info=mem_map>
12 * 00000000-029fffff linux (42MB)
13 * 02a00000-02dfffff fb (4MB, 153600B really used)
14 * 02e00000-02ffffff sound dma (2MB)
15 * 03000000-03ffffff MPEGDEC (?, 16MB)
22 #include <sys/types.h>
27 #include <sys/ioctl.h>
28 #include <linux/soundcard.h>
31 #include "plat_gp2x.h"
32 #include "pollux_set.h"
35 static int battdev = -1, mixerdev = -1;
36 static int cpu_clock_allowed;
37 static unsigned short saved_memtimex[2];
38 static unsigned int saved_video_regs[2][6];
39 static unsigned int timer_drift; // count per real second
42 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
45 /* note: both PLLs are programmed the same way,
46 * the databook incorrectly states that PLL1 differs */
47 static int decode_pll(unsigned int reg)
52 p = (reg >> 18) & 0x3f;
53 m = (reg >> 8) & 0x3ff;
59 v = 27000000; // master clock
65 static void set_ram_timings(void)
67 pollux_set_fromenv(memregs, "POLLUX_RAM_TIMINGS");
70 static void unset_ram_timings(void)
74 memregs[0x14802>>1] = saved_memtimex[0];
75 memregs[0x14804>>1] = saved_memtimex[1] | 0x8000;
77 for (i = 0; i < 0x100000; i++)
78 if (!(memregs[0x14804>>1] & 0x8000))
81 printf("RAM timings reset to startup values.\n");
84 #define TIMER_BASE3 0x1980
85 #define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
87 static unsigned int gp2x_get_ticks_us_(void)
89 unsigned int div = TIMER_REG(0x08) & 3;
90 TIMER_REG(0x08) = 0x48 | div; /* run timer, latch value */
94 static unsigned int gp2x_get_ticks_ms_(void)
96 /* approximate /= 1000 */
97 unsigned long long v64;
98 v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
102 static void timer_cleanup(void)
104 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
105 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
106 TIMER_REG(0x00) = 0; /* clear counter */
107 TIMER_REG(0x40) = 0; /* clocks off */
108 TIMER_REG(0x44) = 0; /* dividers back to default */
111 static void save_multiple_regs(unsigned int *dest, int base, int count)
113 const volatile unsigned int *regs = memregl + base / 4;
116 for (i = 0; i < count; i++)
120 static void restore_multiple_regs(int base, const unsigned int *src, int count)
122 volatile unsigned int *regs = memregl + base / 4;
125 for (i = 0; i < count; i++)
129 int pollux_get_real_snd_rate(int req_rate)
131 int clk0_src, clk1_src, rate, div;
133 clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
134 clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
135 if (clk0_src > 1 || clk1_src != 7) {
136 fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
140 rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
143 div = ((memregl[0xdbc4>>2] >> 4) & 0x3f) + 1;
145 div = ((memregl[0xdbc8>>2] >> 4) & 0x3f) + 1;
149 //printf("rate %d\n", rate);
150 rate -= rate * timer_drift / 1000000;
151 printf("adjusted rate: %d\n", rate);
153 if (rate < 8000-1000 || rate > 44100+1000) {
154 fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
162 static int pollux_cpu_clock_get(void)
164 return decode_pll(memregl[0xf004>>2]) / 1000000;
167 int pollux_cpu_clock_set(int mhz)
169 int adiv, mdiv, pdiv, sdiv = 0;
172 if (!cpu_clock_allowed)
174 if (mhz == pollux_cpu_clock_get())
177 // m = MDIV, p = PDIV, s = SDIV
178 #define SYS_CLK_FREQ 27
180 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
183 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
185 // attempt to keep the AHB divider close to 250, but not higher
186 for (adiv = 1; mhz / adiv > 250; adiv++)
189 vf000 = memregl[0xf000>>2];
190 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
191 memregl[0xf000>>2] = vf000;
192 memregl[0xf004>>2] = vf004;
193 memregl[0xf07c>>2] |= 0x8000;
194 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
197 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
201 static int pollux_bat_capacity_get(void)
203 unsigned short magic_val = 0;
207 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
218 static int step_volume(int *volume, int diff)
228 else if (*volume < 0)
234 ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
243 void pollux_init(void)
245 int rate, timer_div, timer_div2;
247 memdev = open("/dev/mem", O_RDWR);
249 perror("open(/dev/mem) failed");
253 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED,
255 if (memregs == MAP_FAILED) {
256 perror("mmap(memregs) failed");
259 memregl = (volatile void *)memregs;
261 saved_memtimex[0] = memregs[0x14802>>1];
262 saved_memtimex[1] = memregs[0x14804>>1];
266 // save video regs of both MLCs
267 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
268 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
270 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
271 * by reprogramming the PLL0 then, as it overclocks system bus */
272 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
273 cpu_clock_allowed = 1;
275 cpu_clock_allowed = 0;
276 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
280 /* find what PLL1 runs at, for the timer */
281 rate = decode_pll(memregl[0xf008>>2]);
282 printf("PLL1 @ %dHz\n", rate);
285 timer_div = (rate + 500000) / 1000000;
287 while (timer_div > 256) {
291 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
292 int timer_rate = (rate >> timer_div2) / timer_div;
293 if (TIMER_REG(0x08) & 8) {
294 fprintf(stderr, "warning: timer in use, overriding!\n");
297 timer_drift = timer_rate - 1000000;
298 if (timer_drift != 0)
299 fprintf(stderr, "warning: timer drift %d us\n",
302 timer_div2 = (timer_div2 + 3) & 3;
303 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
304 TIMER_REG(0x40) = 0x0c; /* clocks on */
305 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
307 gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
308 gp2x_get_ticks_us = gp2x_get_ticks_us_;
311 fprintf(stderr, "warning: could not make use of timer\n");
313 // those functions are actually not good at all on Wiz kernel
314 gp2x_get_ticks_ms = plat_get_ticks_ms_good;
315 gp2x_get_ticks_us = plat_get_ticks_us_good;
318 battdev = open("/dev/pollux_batt", O_RDONLY);
320 perror("Warning: could't open pollux_batt");
322 mixerdev = open("/dev/mixer", O_RDWR);
324 perror("open(/dev/mixer)");
326 plat_target.cpu_clock_get = pollux_cpu_clock_get;
327 plat_target.cpu_clock_set = pollux_cpu_clock_set;
328 plat_target.bat_capacity_get = pollux_bat_capacity_get;
329 plat_target.step_volume = step_volume;
332 void pollux_finish(void)
338 restore_multiple_regs(0x4058, saved_video_regs[0],
339 ARRAY_SIZE(saved_video_regs[0]));
340 restore_multiple_regs(0x4458, saved_video_regs[1],
341 ARRAY_SIZE(saved_video_regs[1]));
342 memregl[0x4058>>2] |= 0x10;
343 memregl[0x4458>>2] |= 0x10;
349 munmap((void *)memregs, 0x20000);