1 diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
2 index 89716fa0..02a8d7c5 100644
3 --- a/libpcsxcore/new_dynarec/emu_if.c
4 +++ b/libpcsxcore/new_dynarec/emu_if.c
5 @@ -320,13 +320,18 @@ static void ari64_shutdown()
8 new_dyna_pcsx_mem_shutdown();
10 + (void)ari64_execute_block;
13 +extern void intExecuteT();
14 +extern void intExecuteBlockT();
20 - ari64_execute_block,
26 @@ -395,7 +400,7 @@ static u32 memcheck_read(u32 a)
27 return *(u32 *)(psxM + (a & 0x1ffffc));
32 void do_insn_trace(void)
34 static psxRegisters oldregs;
35 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
36 index 190f8fc7..5feb7a02 100644
37 --- a/libpcsxcore/new_dynarec/pcsxmem.c
38 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
39 @@ -289,6 +289,8 @@ static void write_biu(u32 value)
43 +extern u32 handler_cycle;
44 +handler_cycle = psxRegs.cycle;
45 memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
46 psxRegs.biuReg = value;
48 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
49 index 18bd6a4e..bc2eb3f6 100644
50 --- a/libpcsxcore/psxcounters.c
51 +++ b/libpcsxcore/psxcounters.c
52 @@ -389,9 +389,12 @@ void psxRcntUpdate()
54 /******************************************************************************/
56 +extern u32 handler_cycle;
58 void psxRcntWcount( u32 index, u32 value )
60 verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
61 +handler_cycle = psxRegs.cycle;
63 _psxRcntWcount( index, value );
65 @@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
66 void psxRcntWmode( u32 index, u32 value )
68 verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
69 +handler_cycle = psxRegs.cycle;
71 _psxRcntWmode( index, value );
72 _psxRcntWcount( index, 0 );
73 @@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
74 void psxRcntWtarget( u32 index, u32 value )
76 verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
77 +handler_cycle = psxRegs.cycle;
79 rcnts[index].target = value;
81 @@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
82 u32 psxRcntRcount( u32 index )
85 +handler_cycle = psxRegs.cycle;
87 count = _psxRcntRcount( index );
89 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
90 index 27ddfeab..d7c6ff05 100644
91 --- a/libpcsxcore/psxhw.c
92 +++ b/libpcsxcore/psxhw.c
93 @@ -377,13 +377,14 @@ void psxHwWrite8(u32 add, u8 value) {
94 case 0x1f801803: cdrWrite3(value); break;
97 + if (add < 0x1f802000)
100 PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
104 - psxHu8(add) = value;
105 + //psxHu8(add) = value;
107 PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
109 @@ -506,6 +507,7 @@ void psxHwWrite16(u32 add, u16 value) {
113 + if (add < 0x1f802000)
114 psxHu16ref(add) = SWAPu16(value);
116 PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
117 @@ -701,9 +703,9 @@ void psxHwWrite32(u32 add, u32 value) {
121 - mdecWrite0(value); break;
122 + mdecWrite0(value); return;
124 - mdecWrite1(value); break;
125 + mdecWrite1(value); return;
129 @@ -761,6 +763,7 @@ void psxHwWrite32(u32 add, u32 value) {
133 + if (add < 0x1f802000)
134 psxHu32ref(add) = SWAPu32(value);
136 PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
137 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
138 index be15f782..6f07478f 100644
139 --- a/libpcsxcore/psxinterpreter.c
140 +++ b/libpcsxcore/psxinterpreter.c
141 @@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
143 assert(regs->subCycleStep >= 0x10000);
144 regs->subCycle += regs->subCycleStep;
145 - regs->cycle += regs->subCycle >> 16;
146 + regs->cycle += 2; //regs->subCycle >> 16;
147 regs->subCycle &= 0xffff;
150 @@ -434,7 +434,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
151 regs->CP0.n.Target = pc_final;
154 + psxRegs.cycle += 2;
156 + psxRegs.cycle -= 2;
159 static void doBranchReg(psxRegisters *regs, u32 tar) {
160 @@ -967,7 +969,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
164 -OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); }
165 +OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); }
168 static inline void psxNULLne(psxRegisters *regs) {
169 @@ -1175,18 +1177,19 @@ static void intReset() {
170 static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
178 regs->code = fetch(regs, memRLUT, pc);
179 psxBSC[regs->code >> 26](regs, regs->code);
180 + psxRegs.cycle += 2;
183 static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
190 if (execBreakCheck(regs, pc))
191 @@ -1195,6 +1198,7 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
193 regs->code = fetch(regs, memRLUT, pc);
194 psxBSC[regs->code >> 26](regs, regs->code);
195 + psxRegs.cycle += 2;
198 static void intExecute() {
199 @@ -1224,6 +1228,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
200 execI_(memRLUT, regs_);
203 +extern void do_insn_trace(void);
205 +void intExecuteT() {
206 + psxRegisters *regs_ = &psxRegs;
207 + u8 **memRLUT = psxMemRLUT;
212 + execIbp(memRLUT, regs_);
216 +void intExecuteBlockT() {
217 + psxRegisters *regs_ = &psxRegs;
218 + u8 **memRLUT = psxMemRLUT;
221 + while (!branchSeen) {
223 + execIbp(memRLUT, regs_);
227 static void intClear(u32 Addr, u32 Size) {
230 @@ -1271,7 +1299,7 @@ void intApplyConfig() {
231 assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
232 assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);
234 - if (Config.DisableStalls) {
236 psxBSC[18] = psxCOP2;
237 psxBSC[50] = gteLWC2;
238 psxBSC[58] = gteSWC2;
239 diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
240 index 54219ae0..41168ced 100644
241 --- a/libpcsxcore/psxmem.c
242 +++ b/libpcsxcore/psxmem.c
243 @@ -278,10 +278,13 @@ void psxMemOnIsolate(int enable)
244 : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
247 +extern u32 last_io_addr;
249 u8 psxMemRead8(u32 mem) {
253 + last_io_addr = mem;
255 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
256 if ((mem & 0xffff) < 0x400)
257 @@ -307,6 +310,7 @@ u16 psxMemRead16(u32 mem) {
261 + last_io_addr = mem;
263 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
264 if ((mem & 0xffff) < 0x400)
265 @@ -332,6 +336,7 @@ u32 psxMemRead32(u32 mem) {
269 + last_io_addr = mem;
271 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
272 if ((mem & 0xffff) < 0x400)
273 @@ -359,6 +364,7 @@ void psxMemWrite8(u32 mem, u8 value) {
277 + last_io_addr = mem;
279 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
280 if ((mem & 0xffff) < 0x400)
281 @@ -386,6 +392,7 @@ void psxMemWrite16(u32 mem, u16 value) {
285 + last_io_addr = mem;
287 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
288 if ((mem & 0xffff) < 0x400)
289 @@ -413,6 +420,7 @@ void psxMemWrite32(u32 mem, u32 value) {
293 + last_io_addr = mem;
294 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
296 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
297 @@ -431,6 +439,8 @@ void psxMemWrite32(u32 mem, u32 value) {
300 if (mem == 0xfffe0130) {
301 +extern u32 handler_cycle;
302 +handler_cycle = psxRegs.cycle;
303 psxRegs.biuReg = value;
306 diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
307 index dffbf6e7..0a3bdb65 100644
308 --- a/libpcsxcore/r3000a.c
309 +++ b/libpcsxcore/r3000a.c
310 @@ -124,6 +124,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
313 void psxBranchTest() {
314 + extern u32 irq_test_cycle;
315 + irq_test_cycle = psxRegs.cycle;
316 if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)