libpcsxcore/new_dynarec/patches/trace_intr

   1 diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
   2 index f879ad8c..0ec366d0 100644
   3 --- a/libpcsxcore/new_dynarec/emu_if.c
   4 +++ b/libpcsxcore/new_dynarec/emu_if.c
   5 @@ -323,13 +323,18 @@ static void ari64_shutdown()
   6  {
   7         new_dynarec_cleanup();
   8         new_dyna_pcsx_mem_shutdown();
   9 +       (void)ari64_execute;
  10 +       (void)ari64_execute_block;
  11  }
  12
  13 +extern void intExecuteT();
  14 +extern void intExecuteBlockT();
  15 +
  16  R3000Acpu psxRec = {
  17         ari64_init,
  18         ari64_reset,
  19 -       ari64_execute,
  20 -       ari64_execute_block,
  21 +       intExecuteT,
  22 +       intExecuteBlockT,
  23         ari64_clear,
  24         ari64_notify,
  25         ari64_apply_config,
  26 @@ -398,7 +403,7 @@ static u32 memcheck_read(u32 a)
  27         return *(u32 *)(psxM + (a & 0x1ffffc));
  28  }
  29
  30 -#if 0
  31 +#if 1
  32  void do_insn_trace(void)
  33  {
  34         static psxRegisters oldregs;
  35 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
  36 index 1f37dc29..357f753e 100644
  37 --- a/libpcsxcore/new_dynarec/pcsxmem.c
  38 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
  39 @@ -289,6 +289,8 @@ static void write_biu(u32 value)
  40                 return;
  41         }
  42
  43 +extern u32 handler_cycle;
  44 +handler_cycle = psxRegs.cycle;
  45         memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
  46         psxRegs.biuReg = value;
  47  }
  48 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
  49 index 18bd6a4e..bc2eb3f6 100644
  50 --- a/libpcsxcore/psxcounters.c
  51 +++ b/libpcsxcore/psxcounters.c
  52 @@ -389,9 +389,12 @@ void psxRcntUpdate()
  53
  54  /******************************************************************************/
  55
  56 +extern u32 handler_cycle;
  57 +
  58  void psxRcntWcount( u32 index, u32 value )
  59  {
  60      verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
  61 +handler_cycle = psxRegs.cycle;
  62
  63      _psxRcntWcount( index, value );
  64      psxRcntSet();
  65 @@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
  66  void psxRcntWmode( u32 index, u32 value )
  67  {
  68      verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
  69 +handler_cycle = psxRegs.cycle;
  70
  71      _psxRcntWmode( index, value );
  72      _psxRcntWcount( index, 0 );
  73 @@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
  74  void psxRcntWtarget( u32 index, u32 value )
  75  {
  76      verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
  77 +handler_cycle = psxRegs.cycle;
  78
  79      rcnts[index].target = value;
  80
  81 @@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
  82  u32 psxRcntRcount( u32 index )
  83  {
  84      u32 count;
  85 +handler_cycle = psxRegs.cycle;
  86
  87      count = _psxRcntRcount( index );
  88
  89 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
  90 index 10a2695f..7e4a64da 100644
  91 --- a/libpcsxcore/psxhw.c
  92 +++ b/libpcsxcore/psxhw.c
  93 @@ -437,13 +437,14 @@ void psxHwWrite8(u32 add, u8 value) {
  94                                 return;
  95                         }
  96
  97 +                       if (add < 0x1f802000)
  98                         psxHu8(add) = value;
  99  #ifdef PSXHW_LOG
 100                         PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
 101  #endif
 102                         return;
 103         }
 104 -       psxHu8(add) = value;
 105 +       //psxHu8(add) = value;
 106  #ifdef PSXHW_LOG
 107         PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
 108  #endif
 109 @@ -565,6 +566,7 @@ void psxHwWrite16(u32 add, u16 value) {
 110                                 return;
 111                         }
 112
 113 +                       if (add < 0x1f802000)
 114                         psxHu16ref(add) = SWAPu16(value);
 115  #ifdef PSXHW_LOG
 116                         PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
 117 @@ -756,9 +758,9 @@ void psxHwWrite32(u32 add, u32 value) {
 118                         return;
 119
 120                 case 0x1f801820:
 121 -                       mdecWrite0(value); break;
 122 +                       mdecWrite0(value); return;
 123                 case 0x1f801824:
 124 -                       mdecWrite1(value); break;
 125 +                       mdecWrite1(value); return;
 126
 127                 case 0x1f801100:
 128  #ifdef PSXHW_LOG
 129 @@ -826,6 +828,7 @@ void psxHwWrite32(u32 add, u32 value) {
 130                                 return;
 131                         }
 132
 133 +                       if (add < 0x1f802000)
 134                         psxHu32ref(add) = SWAPu32(value);
 135  #ifdef PSXHW_LOG
 136                         PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
 137 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
 138 index 5756bee5..4bf9248d 100644
 139 --- a/libpcsxcore/psxinterpreter.c
 140 +++ b/libpcsxcore/psxinterpreter.c
 141 @@ -238,7 +238,7 @@ static inline void addCycle(psxRegisters *regs)
 142  {
 143         assert(regs->subCycleStep >= 0x10000);
 144         regs->subCycle += regs->subCycleStep;
 145 -       regs->cycle += regs->subCycle >> 16;
 146 +       regs->cycle += 2; //regs->subCycle >> 16;
 147         regs->subCycle &= 0xffff;
 148  }
 149
 150 @@ -435,7 +435,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
 151                 regs->CP0.n.Target = pc_final;
 152         regs->branching = 0;
 153
 154 +       psxRegs.cycle += 2;
 155         psxBranchTest();
 156 +       psxRegs.cycle -= 2;
 157  }
 158
 159  static void doBranchReg(psxRegisters *regs, u32 tar) {
 160 @@ -960,7 +962,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
 161         }
 162  }
 163
 164 -OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); }
 165 +OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); }
 166
 167  // no exception
 168  static inline void psxNULLne(psxRegisters *regs) {
 169 @@ -1120,6 +1122,7 @@ OP(psxHLE) {
 170         }
 171         psxHLEt[hleCode]();
 172         branchSeen = 1;
 173 +       psxRegs.cycle -= 2;
 174  }
 175
 176  static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = {
 177 @@ -1169,18 +1172,20 @@ static void intReset() {
 178  static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
 179         u32 pc = regs->pc;
 180
 181 -       addCycle(regs);
 182 +       //addCycle(regs);
 183         dloadStep(regs);
 184
 185         regs->pc += 4;
 186         regs->code = fetch(regs, memRLUT, pc);
 187         psxBSC[regs->code >> 26](regs, regs->code);
 188 +       psxRegs.cycle += 2;
 189 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 190  }
 191
 192  static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 193         u32 pc = regs->pc;
 194
 195 -       addCycle(regs);
 196 +       //addCycle(regs);
 197         dloadStep(regs);
 198
 199         if (execBreakCheck(regs, pc))
 200 @@ -1189,6 +1194,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 201         regs->pc += 4;
 202         regs->code = fetch(regs, memRLUT, pc);
 203         psxBSC[regs->code >> 26](regs, regs->code);
 204 +       psxRegs.cycle += 2;
 205 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 206  }
 207
 208  static void intExecute() {
 209 @@ -1218,6 +1225,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
 210                 execI_(memRLUT, regs_);
 211  }
 212
 213 +extern void do_insn_trace(void);
 214 +
 215 +void intExecuteT() {
 216 +       psxRegisters *regs_ = &psxRegs;
 217 +       u8 **memRLUT = psxMemRLUT;
 218 +       extern int stop;
 219 +
 220 +       while (!stop) {
 221 +               do_insn_trace();
 222 +               execIbp(memRLUT, regs_);
 223 +       }
 224 +}
 225 +
 226 +void intExecuteBlockT() {
 227 +       psxRegisters *regs_ = &psxRegs;
 228 +       u8 **memRLUT = psxMemRLUT;
 229 +
 230 +       branchSeen = 0;
 231 +       while (!branchSeen) {
 232 +               do_insn_trace();
 233 +               execIbp(memRLUT, regs_);
 234 +       }
 235 +}
 236 +
 237  static void intClear(u32 Addr, u32 Size) {
 238  }
 239
 240 @@ -1246,7 +1277,7 @@ static void setupCop(u32 sr)
 241         else
 242                 psxBSC[17] = psxCOPd;
 243         if (sr & (1u << 30))
 244 -               psxBSC[18] = Config.DisableStalls ? psxCOP2 : psxCOP2_stall;
 245 +               psxBSC[18] = psxCOP2;
 246         else
 247                 psxBSC[18] = psxCOPd;
 248         if (sr & (1u << 31))
 249 @@ -1265,7 +1296,7 @@ void intApplyConfig() {
 250         assert(psxSPC[26] == psxDIV   || psxSPC[26] == psxDIV_stall);
 251         assert(psxSPC[27] == psxDIVU  || psxSPC[27] == psxDIVU_stall);
 252
 253 -       if (Config.DisableStalls) {
 254 +       if (1) {
 255                 psxBSC[18] = psxCOP2;
 256                 psxBSC[50] = gteLWC2;
 257                 psxBSC[58] = gteSWC2;
 258 diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
 259 index 42755e52..4fa4316b 100644
 260 --- a/libpcsxcore/psxmem.c
 261 +++ b/libpcsxcore/psxmem.c
 262 @@ -289,10 +289,13 @@ void psxMemOnIsolate(int enable)
 263                         : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
 264  }
 265
 266 +extern u32 last_io_addr;
 267 +
 268  u8 psxMemRead8(u32 mem) {
 269         char *p;
 270         u32 t;
 271
 272 +       last_io_addr = mem;
 273         t = mem >> 16;
 274         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 275                 if ((mem & 0xffff) < 0x400)
 276 @@ -318,6 +321,7 @@ u16 psxMemRead16(u32 mem) {
 277         char *p;
 278         u32 t;
 279
 280 +       last_io_addr = mem;
 281         t = mem >> 16;
 282         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 283                 if ((mem & 0xffff) < 0x400)
 284 @@ -343,6 +347,7 @@ u32 psxMemRead32(u32 mem) {
 285         char *p;
 286         u32 t;
 287
 288 +       last_io_addr = mem;
 289         t = mem >> 16;
 290         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 291                 if ((mem & 0xffff) < 0x400)
 292 @@ -370,6 +375,7 @@ void psxMemWrite8(u32 mem, u8 value) {
 293         char *p;
 294         u32 t;
 295
 296 +       last_io_addr = mem;
 297         t = mem >> 16;
 298         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 299                 if ((mem & 0xffff) < 0x400)
 300 @@ -397,6 +403,7 @@ void psxMemWrite16(u32 mem, u16 value) {
 301         char *p;
 302         u32 t;
 303
 304 +       last_io_addr = mem;
 305         t = mem >> 16;
 306         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 307                 if ((mem & 0xffff) < 0x400)
 308 @@ -424,6 +431,7 @@ void psxMemWrite32(u32 mem, u32 value) {
 309         char *p;
 310         u32 t;
 311
 312 +       last_io_addr = mem;
 313  //     if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
 314         t = mem >> 16;
 315         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 316 @@ -442,6 +450,8 @@ void psxMemWrite32(u32 mem, u32 value) {
 317  #endif
 318                 } else {
 319                         if (mem == 0xfffe0130) {
 320 +extern u32 handler_cycle;
 321 +handler_cycle = psxRegs.cycle;
 322                                 psxRegs.biuReg = value;
 323                                 return;
 324                         }
 325 diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
 326 index 48881068..47c40940 100644
 327 --- a/libpcsxcore/r3000a.c
 328 +++ b/libpcsxcore/r3000a.c
 329 @@ -127,6 +127,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 330  }
 331
 332  void psxBranchTest() {
 333 + extern u32 irq_test_cycle;
 334 + irq_test_cycle = psxRegs.cycle;
 335         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 336                 psxRcntUpdate();
 337