1 diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
2 index 2c82f58..8572981 100644
3 --- a/libpcsxcore/new_dynarec/emu_if.c
4 +++ b/libpcsxcore/new_dynarec/emu_if.c
5 @@ -417,13 +417,17 @@ static void ari64_shutdown()
8 new_dyna_pcsx_mem_shutdown();
12 +extern void intExecuteT();
13 +extern void intExecuteBlockT();
19 - ari64_execute_until,
23 #ifdef ICACHE_EMULATION
25 @@ -489,7 +493,7 @@ static u32 memcheck_read(u32 a)
26 return *(u32 *)(psxM + (a & 0x1ffffc));
31 void do_insn_trace(void)
33 static psxRegisters oldregs;
34 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
35 index dbcb989..0716f5e 100644
36 --- a/libpcsxcore/psxhw.c
37 +++ b/libpcsxcore/psxhw.c
38 @@ -373,13 +373,14 @@ void psxHwWrite8(u32 add, u8 value) {
39 case 0x1f801803: cdrWrite3(value); break;
42 + if (add < 0x1f802000)
45 PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
49 - psxHu8(add) = value;
50 + //psxHu8(add) = value;
52 PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
54 @@ -504,6 +505,7 @@ void psxHwWrite16(u32 add, u16 value) {
58 + if (add < 0x1f802000)
59 psxHu16ref(add) = SWAPu16(value);
61 PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
62 @@ -699,9 +701,9 @@ void psxHwWrite32(u32 add, u32 value) {
66 - mdecWrite0(value); break;
67 + mdecWrite0(value); return;
69 - mdecWrite1(value); break;
70 + mdecWrite1(value); return;
74 @@ -759,6 +761,7 @@ void psxHwWrite32(u32 add, u32 value) {
78 + if (add < 0x1f802000)
79 psxHu32ref(add) = SWAPu32(value);
81 PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
82 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
83 index 02e00a9..a007dc5 100644
84 --- a/libpcsxcore/psxinterpreter.c
85 +++ b/libpcsxcore/psxinterpreter.c
86 @@ -512,8 +512,9 @@ static void doBranch(u32 tar) {
90 - psxRegs.cycle += BIAS;
94 // check for load delay
95 tmp = psxRegs.code >> 26;
97 @@ -547,13 +548,15 @@ static void doBranch(u32 tar) {
103 psxBSC[psxRegs.code >> 26]();
106 psxRegs.pc = branchPC;
110 + psxRegs.cycle += BIAS;
113 /*********************************************************
114 @@ -636,12 +639,13 @@ void psxMULTU() {
115 psxRegs.GPR.n.hi = (u32)((res >> 32) & 0xffffffff);
118 +#define doBranchNotTaken() do { psxRegs.cycle -= BIAS; execI(); psxBranchTest(); psxRegs.cycle += BIAS; } while(0)
119 /*********************************************************
120 * Register branch logic *
121 * Format: OP rs, offset *
122 *********************************************************/
123 -#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_);
124 -#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } }
125 +#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_); else doBranchNotTaken();
126 +#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } else doBranchNotTaken(); }
128 void psxBGEZ() { RepZBranchi32(>=) } // Branch if Rs >= 0
129 void psxBGEZAL() { RepZBranchLinki32(>=) } // Branch if Rs >= 0 and link
130 @@ -711,7 +715,7 @@ void psxRFE() {
131 * Register branch logic *
132 * Format: OP rs, rt, offset *
133 *********************************************************/
134 -#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_);
135 +#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_); else doBranchNotTaken();
137 void psxBEQ() { RepBranchi32(==) } // Branch if Rs == Rt
138 void psxBNE() { RepBranchi32(!=) } // Branch if Rs != Rt
139 @@ -895,6 +899,9 @@ void MTC0(int reg, u32 val) {
141 psxRegs.CP0.r[12] = val;
149 @@ -1057,6 +1064,23 @@ void intExecuteBlock() {
150 while (!branch2) execI();
153 +extern void do_insn_trace(void);
155 +void intExecuteT() {
162 +void intExecuteBlockT() {
170 static void intClear(u32 Addr, u32 Size) {
173 diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
174 index c09965d..135a5d0 100644
175 --- a/libpcsxcore/psxmem.c
176 +++ b/libpcsxcore/psxmem.c
177 @@ -219,11 +219,13 @@ void psxMemShutdown() {
180 static int writeok = 1;
183 u8 psxMemRead8(u32 mem) {
187 + last_io_addr = mem;
189 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
190 if ((mem & 0xffff) < 0x400)
191 @@ -249,6 +251,7 @@ u16 psxMemRead16(u32 mem) {
195 + last_io_addr = mem;
197 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
198 if ((mem & 0xffff) < 0x400)
199 @@ -274,6 +277,7 @@ u32 psxMemRead32(u32 mem) {
203 + last_io_addr = mem;
205 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
206 if ((mem & 0xffff) < 0x400)
207 @@ -299,6 +303,7 @@ void psxMemWrite8(u32 mem, u8 value) {
211 + last_io_addr = mem;
213 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
214 if ((mem & 0xffff) < 0x400)
215 @@ -326,6 +331,7 @@ void psxMemWrite16(u32 mem, u16 value) {
219 + last_io_addr = mem;
221 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
222 if ((mem & 0xffff) < 0x400)
223 @@ -353,6 +359,7 @@ void psxMemWrite32(u32 mem, u32 value) {
227 + last_io_addr = mem;
228 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
230 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {