* the write-back phase. That will be emulated, if this option is enabled.\r
* This option also alters timing slightly.\r
*/\r
* the write-back phase. That will be emulated, if this option is enabled.\r
* This option also alters timing slightly.\r
*/\r
#define MEMHANDLERS_NEED_PREV_PC 0\r
#define MEMHANDLERS_NEED_FLAGS 0\r
#define MEMHANDLERS_NEED_CYCLES 1\r
#define MEMHANDLERS_CHANGE_PC 0\r
#define MEMHANDLERS_CHANGE_FLAGS 0\r
#define MEMHANDLERS_NEED_PREV_PC 0\r
#define MEMHANDLERS_NEED_FLAGS 0\r
#define MEMHANDLERS_NEED_CYCLES 1\r
#define MEMHANDLERS_CHANGE_PC 0\r
#define MEMHANDLERS_CHANGE_FLAGS 0\r
* encountered. All context members are valid and can be changed.\r
* If disabled, RESET opcode acts as an NOP.\r
*/\r
* encountered. All context members are valid and can be changed.\r
* If disabled, RESET opcode acts as an NOP.\r
*/\r