char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
int Cycles; // Current cycles for opcode\r
int pc_dirty; // something changed PC during processing\r
-static int arm_op_count;\r
+int arm_op_count;\r
\r
\r
void ot(const char *format, ...)\r
ot(" mov r11,r0\n");\r
}\r
\r
- ot(";@ swap OSP <-> A7?\n");\r
ot(" ldr r0,[r7,#0x44] ;@ Get SR high\n");\r
- ot(" tst r0,#0x20\n");\r
- ot(" bne no_sp_swap%i\n",ints);\r
- ot(";@ swap OSP and A7:\n");\r
- ot(" ldr r0,[r7,#0x3C] ;@ Get A7\n");\r
- ot(" ldr r1,[r7,#0x48] ;@ Get OSP\n");\r
- ot(" str r0,[r7,#0x48]\n");\r
- ot(" str r1,[r7,#0x3C]\n");\r
- ot("no_sp_swap%i%s\n",ints,ms?"":":");\r
-\r
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
- ot(" mov r1,r4,lsl #8\n");\r
- ot(" sub r1,r1,r10,lsl #8 ;@ r1 = Old PC\n");\r
- ot(" mov r1,r1,asr #8 ;@ push sign extended\n");\r
- OpPush32();\r
+ ot(" tst r0,#0x20\n");\r
+ ot(";@ get our SP:\n");\r
+ ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
+ ot(" ldreq r1,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
+ ot(" streq r0,[r7,#0x48]\n");\r
+ ot(" moveq r0,r1\n");\r
+\r
+ ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ ot(";@ Push r1 onto stack\n");\r
+ ot(" sub r0,r0,#4 ;@ Predecrement A7\n");\r
+ ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(1,2);\r
OpPushSr(1);\r
+\r
ot(" mov r0,r11\n");\r
ot(";@ Read IRQ Vector:\n");\r
MemHandler(0,2);\r
ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
ot(" mov r4,r0\n");\r
+#else\r
+ ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
#endif\r
ot("\n");\r
\r
}\r
}\r
\r
-// Trashes r0,r1\r
-void CheckInterrupt(int op)\r
-{\r
- ot(";@ CheckInterrupt:\n");\r
- ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
- ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
- ot(" beq NoInts%x\n",op);\r
- ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
- ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
- ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
- ot(" blgt CycloneDoInterrupt\n");\r
- ot("NoInts%x%s\n", op,ms?"":":");\r
- ot("\n");\r
-}\r
-\r
void FlushPC(void)\r
{\r
#if MEMHANDLERS_NEED_PC\r
ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
- ot(" blgt CycloneDoInterrupt\n");\r
- ot(";@ Check if interrupt used up all the cycles:\n");\r
- ot(" subs r5,r5,#0\n");\r
- ot(" blt CycloneEndNoBack\n");\r
+ ot(" bgt CycloneDoInterrupt\n");\r
ot("NoInts0%s\n", ms?"":":");\r
ot("\n");\r
ot(";@ Check if our processor is in stopped state and jump to opcode handler if not\n");\r
ot(" bx lr\n");\r
ot("\n");\r
#endif\r
+ // 68k: XNZVC, ARM: NZCV\r
if (ms) ot("CycloneSetSr\n");\r
else ot("CycloneSetSr:\n");\r
ot(" mov r2,r1,lsr #8\n");\r
ot(" str r3,[r0,#0x3C]\n");\r
ot(" str r2,[r0,#0x48]\n");\r
ot("setsr_noswap%s\n",ms?"":":");\r
- ot(" mov r2,r1,lsr #3\n");\r
- ot(" strb r2,[r0,#0x45] ;@ the X flag\n");\r
+ ot(" mov r2,r1,lsl #25\n");\r
+ ot(" str r2,[r0,#0x4c] ;@ the X flag\n");\r
ot(" bic r2,r1,#0xf3\n");\r
ot(" tst r1,#1\n");\r
ot(" orrne r2,r2,#2\n");\r
ot(" orrne r2,r2,#2\n");\r
ot(" tst r1,#2\n");\r
ot(" orrne r2,r2,#1\n");\r
- ot(" ldrb r1,[r0,#0x45] ;@ the X flag\n");\r
- ot(" tst r1,#2\n");\r
+ ot(" ldr r1,[r0,#0x4c] ;@ the X flag\n");\r
+ ot(" tst r1,#0x20000000\n");\r
ot(" orrne r2,r2,#0x10\n");\r
ot(" ldrb r1,[r0,#0x44] ;@ the SR high\n");\r
ot(" orr r0,r2,r1,lsl #8\n");\r
#endif\r
\r
ot(";@ DoInterrupt - r0=IRQ number\n");\r
+ ot("CycloneDoInterruptGoBack%s\n", ms?"":":");\r
+ ot(" sub r4,r4,#2\n");\r
ot("CycloneDoInterrupt%s\n", ms?"":":");\r
- ot(" stmdb sp!,{lr} ;@ Push ARM return address\n");\r
-\r
ot(";@ Get IRQ Vector address:\n");\r
ot(" mov r0,r0,asl #2\n");\r
ot(" add r11,r0,#0x60\n");\r
\r
ot(";@ Clear stopped states:\n");\r
ot(" str r2,[r7,#0x58]\n");\r
- ot(" sub r5,r5,#%d ;@ Subtract cycles\n",44);\r
ot("\n");\r
#if USE_INT_ACK_CALLBACK\r
#if INT_ACK_NEEDS_STUFF\r
ot(" mov r9,r9,lsl #28\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
#endif\r
-#else // not USE_INT_ACK_CALLBACK\r
+#else // !USE_INT_ACK_CALLBACK\r
ot(";@ Clear irq:\n");\r
- ot(" strb r1,[r7,#0x47]\n");\r
+ ot(" strb r2,[r7,#0x47]\n");\r
#endif\r
- ot(" ldmia sp!,{pc} ;@ Return\n");\r
+ ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+ ot(" subs r5,r5,#44 ;@ Subtract cycles\n");\r
+ ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
+ ot(" b CycloneEnd\n");\r
ot("\n");\r
\r
ot("Exception%s\n", ms?"":":");\r
addrreg=0;\r
#endif\r
if (addrreg != 0)\r
+ {\r
+ ot(" add lr,pc,#4\n"); // helps to prevent interlocks\r
ot(" mov r0,r%i\n", addrreg);\r
- ot(" mov lr,pc\n");\r
+ }\r
+ else\r
+ ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);\r
\r
// Document what we are calling:\r
ot(" mov r0,#0x10\n");\r
ot(" bl Exception\n");\r
#endif\r
+ ot("\n");\r
Cycles=34;\r
OpEnd();\r
\r
ot(" mov r0,#0x28\n");\r
ot(" bl Exception\n");\r
#endif\r
+ ot("\n");\r
Cycles=4;\r
OpEnd();\r
\r
ot(" mov r0,#0x2c\n");\r
ot(" bl Exception\n");\r
#endif\r
+ ot("\n");\r
Cycles=4;\r
OpEnd();\r
\r
}\r
if(ip&1) ott("0x%.4x", 0, "\n",0,ip++,1);\r
if(ip&7) fseek(AsmFile, -1, SEEK_CUR); // remove last comma\r
- ot("\n");\r
if(ip&7) {\r
for(i = 8-(ip&7); i > 0; i--)\r
ot(",0x0000");\r
- ot("\n");\r
}\r
+ ot("\n");\r
if(ms) {\r
for(i = (0x2000-ip/2)/8+1; i > 0; i--)\r
ot(" dcd 0,0,0,0,0,0,0,0\n");\r
ot("\n;@ Dave's Cyclone 68000 Emulator v%x.%.3x - Assembler Output\n\n",CycloneVer>>12,CycloneVer&0xfff);\r
\r
ot(";@ (c) Copyright 2003 Dave, All rights reserved.\n");\r
- ot(";@ some code (c) Copyright 2005-2006 notaz, All rights reserved.\n");\r
+ ot(";@ some code (c) Copyright 2005-2007 notaz, All rights reserved.\n");\r
ot(";@ Cyclone 68000 is free for non-commercial use.\n\n");\r
ot(";@ For commercial use, separate licencing terms must be obtained.\n\n");\r
\r
notaz.gp2x.de / picodrive.git / blobdiff