// This should be much slower, like 12+ cycles/byte, it's like
// that because the CPU runs too fast and fifo is not emulated.
// See also set_dma_end().
- set_event(PSXINT_SPUDMA, words * 4);
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
return;
case 0x01000200: //spu to cpu transfer
psxCpu->Clear(madr, words_copy);
HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
- set_event(PSXINT_SPUDMA, words * 4);
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
return;
default:
HW_DMA2_MADR = SWAPu32(madr + words_copy * 4);
// careful: gpu_state_change() also messes with this
- HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
+ psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
// already 32-bit word size ((size * 4) / 4)
set_event(PSXINT_GPUDMA, words / 4);
return;
HW_DMA2_MADR = SWAPu32(madr);
// careful: gpu_state_change() also messes with this
- HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
+ psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
// already 32-bit word size ((size * 4) / 4)
set_event(PSXINT_GPUDMA, words / 4);
return;
madr_next = 0xffffff;
do_walking = Config.GpuListWalking;
- if (do_walking < 0)
+ if (do_walking < 0 || Config.hacks.gpu_timing1024)
do_walking = Config.hacks.gpu_slow_list_walking;
madr_next_p = do_walking ? &madr_next : NULL;
if ((int)size <= 0)
size = gpuDmaChainSize(madr);
- HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
HW_DMA2_MADR = SWAPu32(madr_next);
- // Tekken 3 = use 1.0 only (not 1.5x)
+ // a hack for Judge Dredd which is annoyingly sensitive to timing
+ if (Config.hacks.gpu_timing1024)
+ size = 1024;
- // Einhander = parse linked list in pieces (todo)
- // Rebel Assault 2 = parse linked list in pieces (todo)
+ psxRegs.gpuIdleAfter = psxRegs.cycle + size + 16;
set_event(PSXINT_GPUDMA, size);
return;
DMA_INTERRUPT(2);
}
-// note: this is also (ab)used for non-dma prim command
-// to delay gpu returning to idle state, see gpu_state_change()
void gpuInterrupt() {
if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
{
- u32 size, madr_next = 0xffffff;
- size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
+ u32 size, madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR);
+ size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, &madr_next);
HW_DMA2_MADR = SWAPu32(madr_next);
+ psxRegs.gpuIdleAfter = psxRegs.cycle + size + 64;
set_event(PSXINT_GPUDMA, size);
return;
}
HW_DMA2_CHCR &= SWAP32(~0x01000000);
DMA_INTERRUPT(2);
}
- HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
}
void psxDma6(u32 madr, u32 bcr, u32 chcr) {
PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
if (chcr == 0x11000002) {
+ madr &= ~3;
mem = getDmaRam(madr, &words_max);
if (mem == INVALID_PTR) {
log_unhandled("bad6 dma madr %x\n", madr);