+/*
+ * PicoDrive
+ * (C) notaz, 2009,2010
+ *
+ * This work is licensed under the terms of MAME license.
+ * See COPYING file in the top-level directory.
+ */
#include "../pico_int.h"
#include "../sound/ym2612.h"
-SH2 sh2s[2];
struct Pico32x Pico32x;
+SH2 sh2s[2];
-static void sh2_irq_cb(int id, int level)
+static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
{
- // diagnostic for now
- elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
+ if (sh2->pending_irl > sh2->pending_int_irq) {
+ elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
+ sh2->is_slave ? 's' : 'm', level, sh2->pc);
+ return 64 + sh2->pending_irl / 2;
+ } else {
+ elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
+ sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
+ sh2->pending_int_irq = 0; // auto-clear
+ sh2->pending_level = sh2->pending_irl;
+ return sh2->pending_int_vector;
+ }
}
-void p32x_update_irls(void)
+// if !nested_call, must sync CPUs before calling this
+void p32x_update_irls(int nested_call)
{
int irqs, mlvl = 0, slvl = 0;
+ int mrun, srun;
// msh2
irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
slvl++;
slvl *= 2;
- elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
- sh2_irl_irq(&msh2, mlvl);
- sh2_irl_irq(&ssh2, slvl);
- mlvl = mlvl ? 1 : 0;
- slvl = slvl ? 1 : 0;
- p32x_poll_event(mlvl | (slvl << 1), 0);
+ mrun = sh2_irl_irq(&msh2, mlvl, nested_call);
+ srun = sh2_irl_irq(&ssh2, slvl, nested_call);
+ p32x_poll_event(mrun | (srun << 1), 0);
+ elprintf(EL_32X, "update_irls: m %d/%d, s %d/%d", mlvl, mrun, slvl, srun);
}
void Pico32xStartup(void)
{
elprintf(EL_STATUS|EL_32X, "32X startup");
+ // TODO: OOM handling
PicoAHW |= PAHW_32X;
- PicoMemSetup32x();
-
sh2_init(&msh2, 0);
msh2.irq_callback = sh2_irq_cb;
- sh2_reset(&msh2);
-
sh2_init(&ssh2, 1);
ssh2.irq_callback = sh2_irq_cb;
- sh2_reset(&ssh2);
+
+ PicoMemSetup32x();
+ p32x_timers_recalc();
if (!Pico.m.pal)
Pico32x.vdp_regs[0] |= P32XV_nPAL;
PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
+ rendstatus_old = -1;
+
emu_32x_startup();
}
+#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
+void p32x_reset_sh2s(void)
+{
+ elprintf(EL_32X, "sh2 reset");
+
+ sh2_reset(&msh2);
+ sh2_reset(&ssh2);
+
+ // if we don't have BIOS set, perform it's work here.
+ // MSH2
+ if (p32x_bios_m == NULL) {
+ unsigned int idl_src, idl_dst, idl_size; // initial data load
+ unsigned int vbr;
+
+ // initial data
+ idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
+ idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
+ idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
+ if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
+ idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
+ elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
+ idl_src, idl_dst, idl_size);
+ }
+ else
+ memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
+
+ // GBR/VBR
+ vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
+ sh2_set_gbr(0, 0x20004000);
+ sh2_set_vbr(0, vbr);
+
+ // checksum and M_OK
+ Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
+ // program will set M_OK
+ }
+
+ // SSH2
+ if (p32x_bios_s == NULL) {
+ unsigned int vbr;
+
+ // GBR/VBR
+ vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
+ sh2_set_gbr(1, 0x20004000);
+ sh2_set_vbr(1, vbr);
+ // program will set S_OK
+ }
+
+ msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
+}
+
void Pico32xInit(void)
{
+ if (msh2.mult_m68k_to_sh2 == 0 || msh2.mult_sh2_to_m68k == 0)
+ Pico32xSetClocks(PICO_MSH2_HZ, 0);
+ if (ssh2.mult_m68k_to_sh2 == 0 || ssh2.mult_sh2_to_m68k == 0)
+ Pico32xSetClocks(0, PICO_MSH2_HZ);
}
void PicoPower32x(void)
{
memset(&Pico32x, 0, sizeof(Pico32x));
- Pico32x.regs[0] = 0x0082; // SH2 reset?
+ Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
Pico32x.sh2_regs[0] = P32XS2_ADEN;
}
void PicoUnload32x(void)
{
if (Pico32xMem != NULL)
- free(Pico32xMem);
+ plat_munmap(Pico32xMem, sizeof(*Pico32xMem));
Pico32xMem = NULL;
+ sh2_finish(&msh2);
+ sh2_finish(&ssh2);
PicoAHW &= ~PAHW_32X;
}
void PicoReset32x(void)
{
- extern int p32x_csum_faked;
- p32x_csum_faked = 0; // tmp
+ if (PicoAHW & PAHW_32X) {
+ Pico32x.sh2irqs |= P32XI_VRES;
+ p32x_update_irls(0);
+ p32x_poll_event(3, 0);
+ p32x_timers_recalc();
+ }
}
static void p32x_start_blank(void)
{
+ if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
+ int offs, lines;
+
+ pprof_start(draw);
+
+ offs = 8; lines = 224;
+ if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
+ offs = 0;
+ lines = 240;
+ }
+
+ // XXX: no proper handling of 32col mode..
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
+ (Pico.video.reg[12] & 1) && // 40col mode
+ (PicoDrawMask & PDRAW_32X_ON))
+ {
+ int md_bg = Pico.video.reg[7] & 0x3f;
+
+ // we draw full layer (not line-by-line)
+ PicoDraw32xLayer(offs, lines, md_bg);
+ }
+ else if (Pico32xDrawMode != PDM32X_32X_ONLY)
+ PicoDraw32xLayerMdOnly(offs, lines);
+
+ pprof_end(draw);
+ }
+
// enter vblank
Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
}
Pico32x.sh2irqs |= P32XI_VINT;
- p32x_update_irls();
+ p32x_update_irls(0);
p32x_poll_event(3, 1);
}
-static __inline void run_m68k(int cyc)
+/* events */
+static void pwm_irq_event(unsigned int now)
{
-#if defined(EMU_C68K)
- PicoCpuCM68k.cycles = cyc;
- CycloneRun(&PicoCpuCM68k);
- SekCycleCnt += cyc - PicoCpuCM68k.cycles;
-#elif defined(EMU_M68K)
- SekCycleCnt += m68k_execute(cyc);
-#elif defined(EMU_F68K)
- SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
-#endif
+ Pico32x.emu_flags &= ~P32XF_PWM_PEND;
+ p32x_pwm_schedule(now);
+
+ Pico32x.sh2irqs |= P32XI_PWM;
+ p32x_update_irls(0);
}
-// ~1463.8, but due to cache misses and slow mem
-// it's much lower than that
-//#define SH2_LINE_CYCLES 735
-#define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
+static void fillend_event(unsigned int now)
+{
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_nFEN;
+ p32x_poll_event(3, 1);
+}
-#define PICO_32X
-#define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
-{ \
- int slice; \
- SekCycleAim += m68k_cycles; \
- while (SekCycleCnt < SekCycleAim) { \
- slice = SekCycleCnt; \
- run_m68k(SekCycleAim - SekCycleCnt); \
- slice = SekCycleCnt - slice; /* real count from 68k */ \
- if (SekCycleCnt < SekCycleAim) \
- elprintf(EL_32X, "slice %d", slice); \
- if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
- sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
- if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
- sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
- } \
+typedef void (event_cb)(unsigned int now);
+
+static unsigned int event_times[P32X_EVENT_COUNT];
+static unsigned int event_time_next;
+static event_cb *event_cbs[] = {
+ [P32X_EVENT_PWM] = pwm_irq_event,
+ [P32X_EVENT_FILLEND] = fillend_event,
+};
+
+// schedule event at some time (in m68k clocks)
+void p32x_event_schedule(enum p32x_event event, unsigned int now, int after)
+{
+ unsigned int when = (now + after) | 1;
+
+ elprintf(EL_32X, "new event #%u %u->%u", event, now, when);
+ event_times[event] = when;
+
+ if (event_time_next == 0 || (int)(event_time_next - now) > after)
+ event_time_next = when;
+}
+
+static void run_events(unsigned int until)
+{
+ int oldest, oldest_diff, time;
+ int i, diff;
+
+ while (1) {
+ oldest = -1, oldest_diff = 0x7fffffff;
+
+ for (i = 0; i < P32X_EVENT_COUNT; i++) {
+ if (event_times[i]) {
+ diff = event_times[i] - until;
+ if (diff < oldest_diff) {
+ oldest_diff = diff;
+ oldest = i;
+ }
+ }
+ }
+
+ if (oldest_diff <= 0) {
+ time = event_times[oldest];
+ event_times[oldest] = 0;
+ elprintf(EL_32X, "run event #%d %u", oldest, time);
+ event_cbs[oldest](time);
+ }
+ else if (oldest_diff < 0x7fffffff) {
+ event_time_next = event_times[oldest];
+ break;
+ }
+ else {
+ event_time_next = 0;
+ break;
+ }
+ }
+
+ if (oldest != -1)
+ elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next);
+}
+
+// compare cycles, handling overflows
+// check if a > b
+#define CYCLES_GT(a, b) \
+ ((int)((a) - (b)) > 0)
+// check if a >= b
+#define CYCLES_GE(a, b) \
+ ((int)((a) - (b)) >= 0)
+
+#define sync_sh2s_normal p32x_sync_sh2s
+//#define sync_sh2s_lockstep p32x_sync_sh2s
+
+/* most timing is in 68k clock */
+void sync_sh2s_normal(unsigned int m68k_target)
+{
+ unsigned int now, target, timer_cycles;
+ int cycles, done;
+
+ elprintf(EL_32X, "sh2 sync to %u", m68k_target);
+
+ if (!(Pico32x.regs[0] & P32XS_nRES))
+ return; // rare
+
+ now = msh2.m68krcycles_done;
+ if (CYCLES_GT(now, ssh2.m68krcycles_done))
+ now = ssh2.m68krcycles_done;
+ timer_cycles = now;
+
+ while (CYCLES_GT(m68k_target, now))
+ {
+ if (event_time_next && CYCLES_GE(now, event_time_next))
+ run_events(now);
+
+ target = m68k_target;
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+
+ while (CYCLES_GT(target, now))
+ {
+ elprintf(EL_32X, "sh2 exec to %u %d,%d/%d, flags %x", target,
+ target - msh2.m68krcycles_done, target - ssh2.m68krcycles_done,
+ m68k_target - now, Pico32x.emu_flags);
+
+ if (Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL)) {
+ ssh2.m68krcycles_done = target;
+ }
+ else {
+ cycles = target - ssh2.m68krcycles_done;
+ if (cycles > 0) {
+ done = sh2_execute(&ssh2, C_M68K_TO_SH2(ssh2, cycles));
+ ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
+
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+ }
+ }
+
+ if (Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL)) {
+ msh2.m68krcycles_done = target;
+ }
+ else {
+ cycles = target - msh2.m68krcycles_done;
+ if (cycles > 0) {
+ done = sh2_execute(&msh2, C_M68K_TO_SH2(msh2, cycles));
+ msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
+
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+ }
+ }
+
+ now = msh2.m68krcycles_done;
+ if (CYCLES_GT(now, ssh2.m68krcycles_done))
+ now = ssh2.m68krcycles_done;
+ }
+
+ p32x_timers_do(now - timer_cycles);
+ timer_cycles = now;
+ }
}
#define STEP_68K 24
-#define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
-{ \
- int i; \
- for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
- run_m68k(STEP_68K); \
- if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
- sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
- if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
- sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
- } \
- /* last step */ \
- i = (m68k_cycles) - i; \
- run_m68k(i); \
- if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
- sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
- if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
- sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
-}
-
-#define CPUS_RUN CPUS_RUN_SIMPLE
-//#define CPUS_RUN CPUS_RUN_LOCKSTEP
+void sync_sh2s_lockstep(unsigned int m68k_target)
+{
+ unsigned int mcycles;
+
+ mcycles = msh2.m68krcycles_done;
+ if (ssh2.m68krcycles_done < mcycles)
+ mcycles = ssh2.m68krcycles_done;
+
+ while (mcycles < m68k_target) {
+ mcycles += STEP_68K;
+ sync_sh2s_normal(mcycles);
+ }
+}
+
+#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
+ SekRunM68k(m68k_cycles); \
+ if (Pico32x.emu_flags & P32XF_68KPOLL) \
+ p32x_sync_sh2s(SekCycleCntT + SekCycleCnt); \
+} while (0)
+
+#define PICO_32X
#include "../pico_cmn.c"
void PicoFrame32x(void)
{
- pwm_frame_smp_cnt = 0;
-
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
}
+// calculate multipliers against 68k clock (7670442)
+// normally * 3, but effectively slower due to high latencies everywhere
+// however using something lower breaks MK2 animations
+void Pico32xSetClocks(int msh2_hz, int ssh2_hz)
+{
+ float m68k_clk = (float)(OSC_NTSC / 7);
+ if (msh2_hz > 0) {
+ msh2.mult_m68k_to_sh2 = (int)((float)msh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
+ msh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)msh2_hz);
+ }
+ if (ssh2_hz > 0) {
+ ssh2.mult_m68k_to_sh2 = (int)((float)ssh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
+ ssh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)ssh2_hz);
+ }
+}
+
+// vim:shiftwidth=2:ts=2:expandtab
notaz.gp2x.de / picodrive.git / blobdiff